Failure Mode Classification for Prognostics and Health Monitoring of Electronic-Systems under Mechanical Shock by Prashant Gupta A dissertation submitted to the Graduate Faculty of Auburn University in partial fulfillment of the requirements for the Degree of Doctor of Philosophy Auburn, Alabama May 7, 2012 Keywords: Prognostics and Health Monitoring, Feature Vectors, Damage Initiation and Progression, Fault Isolation, Electronic Systems Copyright 2012 by Prashant Gupta Approved by Pradeep Lall, Chair, T. Walter Professor of Mechanical Engineering Jeffrey C. Suhling, Quina Distinguished Professor of Mechanical Engineering George T. Flowers, Professor of Mechanical Engineering Michael J. Bozack, Professor of Physics i 6 Abstract Electronics have become an integral part of most systems and subsystems used in various fields such as avionics, defense, space exploration, manufacturing, household appliances, health care (implantable biological devices such as pacemakers, defibrillators), portable electronics (laptops, PDA?s, cell phones) etc. The electronics experience accidental drop and shock at various stages of their life-cycle i.e. manufacturing, transportation, and deployment in field. In this research work, strain based techniques are developed and implemented on test vehicles with ball grid array packages (BGA?s) to address various aspects of health monitoring such as damage detection, diagnostics, study of damage trends, fault mode classifications and isolation. The methodologies developed in present work are completely independent of continuous monitoring of daisy chain resistance. The most common damage quantification techniques currently in use in electronics are, continuous monitoring of daisy chain resistance, and use of built in self-test (BIST) which are purely based on reactive failure. Auxiliary devices such as fuses and canaries are also used to detect damage in electronic systems. Though these techniques are significantly efficient in damage diagnostics, they do not provide any prior knowledge on damage initiation, damage progression, failure mode identification and isolation of dominant fault modes. This can lead to catastrophic failure and shutdown of the system under consideration. Prognostics and health monitoring framework developed in this research work focuses on addressing leading indicators of failure in pre-failure space, hence prior knowledge about various aspects of system state and its health can be known and monitored in real time. ii Damage detection and study of damage trends is implemented on feature vectors derived from spectral analysis, and joint time-frequency analysis of transient strain histories obtained from test assemblies under drop and shock. Statistical pattern recognition techniques are used for quantification of damage initiation. Autoregressive models are used for studying damage trends on feature vectors derived from the above mentioned domains. Once damage is detected in the electronic assemblies, various data driven techniques for fault mode classification and isolation are developed. The focus is on developing methodologies which can address damage initiation and draw inference on its progression as well as identification of dominant fault modes. Before fault mode classification is addressed, experimental and simulation data sets are procured from test assemblies under study. Explicit finite element simulations of pristine state of the system, and the system with various dominant failure modes such as inter-connect cracking, complete inter-connect failure, die cracking, chip de-lamination and part fall off etc. are performed. Experimental data sets are procured from mechanical drop tests on assemblies according to JEDEC drop standards. The time domain data sets are used for extracting shock features in time-frequency domain. De-correlation of the feature space from time-frequency analysis of the data sets is performed using statistical classifier: Karhunen-Lo?ve transform. An artificial intelligence based framework for fault monitoring is also developed for test assemblies. Unsupervised neural nets based on a self-organization algorithm are used for detection and isolation of failure modes. Supervised neural trainers in conjunction with non- linear mapping technique, such as sammon?s mapping, are designed for real time monitoring of the system state. Hard parity between different failure modes in the feature space is achieved. Early classification of failure modes in assemblies under drop and shock is novel. iii The results of classification of various dominant fault modes are statistically validated using a number of statistical tests: multi-variate analysis of variance, box M-test, and Hotelling?s T-square along with paired t-test and principal component similarity factor. Failure analysis of the test assemblies is also performed by studying experimental cross-sections of the failed packages. Currently there is no prognostics and health monitoring (PHM) decision framework for electronics at component or system level, hence there is a need for developing a platform of techniques which can address various health monitoring issues in systems with varying degree of complexity. The techniques developed in this work are scalable to system level reliability. These techniques are data driven in nature, hence provide capability to tailor need for reliability depending on the application. The framework developed in this work can help schedule pro- active maintenance and prevent catastrophic shutdown of the system. The objective of prognostics and health monitoring (PHM) is to make critical systems cost effective, safe and reliable. This can be achieved by enabling pre-planned maintenance, forestalling failure and making systems operationally more reliable. The work presented in this thesis is advancement towards achieving these objectives. iv 7 Acknowledgments I would like to acknowledge the invaluable guidance, support and patience of my advisor Dr. Pradeep Lall during the course of this degree. It was a great experience working under the mentorship of Dr. Lall which gave me opportunity to learn new things and grow as a professional. Special thanks go to Dr. Jeff C. Suhling, under whom I took several courses and learned a lot. I feel fortunate to have got a chance to interact with Dr. Suhling at various stages of this degree and his constant support was invaluable. Thanks to all the other committee members Dr. George T. lowers and Dr. Michael J. Bozack for serving on this committee and helping me finish this degree. Thanks to Dr. Michael Hamilton for serving as external reader for this dissertation. Thanks to all the sponsors at CAVE3 for providing financial support for my graduate studies. I would like to thank my mother Mrs. Anita Gupta, father Dr. Kshitij Gupta, brother Dr. Shashank Gupta for their priceless love, support and motivation. Many thanks go to my aunt Dr. Amita Agarwal and uncle Dr. Rajiv Agarwal for their unwavering encouragement, support and love throughout the course of this degree at Auburn. Finally, I would also like to recognize help, support and encouragement from my friends and colleagues: Darshan Shinde, Ajay Sharda, Vaishali Sharda, Aniket Shirgaokar, Amit Gabale, Mandar Kulkarni, Mahendra Harsha, Sandeep Shantaram, Robert Hinshaw, Jordan Roberts, Ryan Lowe and many others whose names are not mentioned here. v 8 Table of Contents Abstract ............................................................................................................................................ i Acknowledgments.......................................................................................................................... iv List of Figures ................................................................................................................................ xi List of Tables??. ................................................................................................... ????... xxi Chapter-1 Introduction .................................................................................................................... 1 1.1 Motivation ............................................................................................................. 1 1.2 Overview of Electronic Packaging ........................................................................ 2 1.3 Overview of Structural Health Monitoring (SHM) ............................................... 7 1.4 Prognostics and Health Monitoring of Electronics ............................................... 9 Chapter-2 Literature Review ........................................................................................................ 13 2.1 Statistical Pattern Recognition ............................................................................ 13 2.2 Existing State of art of Damage Monitoring/Testing In Electronics ................... 16 2.2.1 Built-In-Self Test (BIST) .............................................................................. 16 2.2.2 Auxiliary Devises Fuses and Canaries .......................................................... 17 2.2.3 Monitoring of Daisy Chain Resistance ......................................................... 18 2.2.4 Other Experimental approach........................................................................ 19 2.3 Drop and Shock Testing ...................................................................................... 20 2.4 Shock Modeling by Finite Element Methods ...................................................... 22 2.5 Life Prediction Models ........................................................................................ 23 2.6 Research Objective: ............................................................................................. 25 vi Chapter-3 Stage-I of Prognostics and Health Monitoring: Damage Diagnostics ......................... 30 3.1 Overview ............................................................................................................. 30 3.2 Test Vehicle ......................................................................................................... 31 3.3 Statistical Pattern Recognition ............................................................................ 33 3.4 Development of Training Signal ......................................................................... 34 3.5 Time-Frequency Analysis ................................................................................... 39 3.6 Wavelet Packet Energy........................................................................................ 44 3.7 Mahalonobis Distance ......................................................................................... 46 3.8 Auto-Regressive Technique ................................................................................ 47 3.9 Results of Damage Detection in Error Seeded Models: Correlation of Underlying Damage ................................................................................................................ 51 3.10 Prediction of Damage Evolution and Damage Trends ........................................ 58 3.11 Solder Joint Built in Self-Test (SJ-BIST) ............................................................ 60 3.11.1 PSPICE Simulation ....................................................................................... 61 3.11.2 Experimental Validation ............................................................................... 63 3.12 Summary.............................................................................................................. 66 Chapter-4 Stage II of Prognostics and Health Monitoring: Fault Mode Classification and Isolation...................................................................................................................................... 68 4.1 Data Organization ................................................................................................ 68 4.2 Benchmarking Data Set ....................................................................................... 69 4.3 Organization of Data for Prognostics and Health Monitoring of Electronics ..... 70 4.4 Fundamental Approach to Classification ............................................................ 71 4.5 Test Vehicles ....................................................................................................... 75 4.5.1 Test Vehicle-A: FPGA Test Board ............................................................... 75 vii 4.5.2 Test Vehicle-B: TABGA Test Board ............................................................ 78 4.5.3 Test Vehicle-C: CAVE-PBGA324 Test Board ............................................. 80 4.6 Simulation Data Sets: Error Seeding of Failure Modes by Explicit Finite Elements Simulations .......................................................................................... 82 4.6.1 Solder Ball Failure and Cracking .................................................................. 87 4.6.2 Chip Fracture ................................................................................................. 90 4.6.3 Chip Delamination ........................................................................................ 91 4.6.4 Part Fall Off ................................................................................................... 93 4.7 Experimental Data Set ......................................................................................... 95 4.7.1 Development of Transient Signal for Test Board-A ..................................... 95 4.7.2 Development of Transient Signal for Test Vehicle-C ................................... 98 4.8 Summary............................................................................................................ 100 Chapter-5 De-correlated Framework for Fault Mode Classification in Electronics under Drop and Shock........................................................................................................................................ 101 5.1 Introduction ....................................................................................................... 101 5.2 Karhunen?Lo?ve Transform ............................................................................. 104 5.3 Benchmarking of Karhunen Loeve Transform on IRIS Data Set ..................... 109 5.4 Results of Classification of Failure Modes by Karhunen Loeve Transform ..... 111 5.5 Validation of Clustering .................................................................................... 119 5.5.1 Mahalonobis Distance Classifier ................................................................. 120 5.5.2 Principal Component Similarity Factor....................................................... 123 5.5.3 Failure Analysis by Cross Section .............................................................. 126 5.6 Conclusion ......................................................................................................... 131 viii Chapter-6 Supervised Learning of Damage Initiation, Progression and Fault Isolation using Neural Nets .............................................................................................................................. 132 6.1 Introduction ....................................................................................................... 132 6.2 Neural Networks: Overview of Theory ............................................................. 134 6.3 Sammon?s Mapping........................................................................................... 140 6.4 Benchmarking of Sammon?s Mapping on IRIS Data Set ................................. 144 6.5 Design and Development of a Neural Controller: For Multi-class Parity by Supervised Training/ Learning .......................................................................... 146 6.5.1 Training of a Single Neuron by Delta Rule................................................. 146 6.5.2 Benchmarking of the Concept: Example of Extraction of Receptive field (Classification Region in the feature Space) for a XOR (Exclusive OR) problem? .......................................................................................................... 153 6.6 Hard Parity and Multi-mode Classification of Failure Modes in Electronic Assemblies ......................................................................................................... 166 6.6.1 Training of Network for Hard Parity of Fault-Modes in Electronic Assemblies ......................................................................................................... 171 6.6.2 Results of Classification of Failure Modes in Test Assemblies .................. 179 6.7 Validation of Classified Failure Modes ............................................................. 187 6.7.1 Simulation of the Designed Neural Network .............................................. 188 6.7.2 Statistical Validation: Multivariate Analysis of Variance (MANOVA) ..... 194 6.7.3 Statistical Validation: Hotelling?s T-square ................................................ 195 6.7.4 Validation by Experimental Cross Sections ................................................ 200 6.8 Conclusion ......................................................................................................... 202 Chapter-7 Self Organization of Failure Modes in Electronic Systems under Drop Impact ...... 204 7.1 Introduction ....................................................................................................... 204 7.2 Self Organized Mapping (SOM): Overview ..................................................... 205 ix 7.3 Training of Network by Self Organization ........................................................ 209 7.3.1 Competition: ................................................................................................ 209 7.3.2 Cooperation ................................................................................................. 211 7.3.3 Synaptic Adaptation .................................................................................... 215 7.4 Visualization of Classified Failure Modes ........................................................ 218 7.4.1 Euclidean Distance Matrix (Dmat) ............................................................. 219 7.4.2 Unified Distance Matrix (Umat) ................................................................. 219 7.4.3 Labeled Map with Best Matching Unit (BMU) .......................................... 220 7.5 Benchmarking of Self Organization Algorithm on IRIS data set...................... 223 7.6 Implementation of Self Organization to Electronic Systems under Drop and shock .................................................................................................................. 226 7.6.1 Data Set Orientations and Processing for Self Organization of Failure Modes? ............................................................................................................ 227 7.6.2 Results of Classification of Failure Modes ................................................. 235 7.7 Validation of Classified Failure Modes by Self Organization .......................... 242 7.8 Summary............................................................................................................ 250 Chapter-8 Classification of Multiple Failure Modes in 3D Packaging Architectures: Package-On- Package (PoP) Assemblies using Feature Vectors for Progression of Accrued Damage ........ 252 8.1 Introduction ....................................................................................................... 252 8.2 PoP Test Vehicle ............................................................................................... 255 8.3 Development of Experimental Features ............................................................ 257 8.4 Development of Error-seeded Features (Simulation) ........................................ 259 8.5 Development of Feature Vectors for Fault Mode Identification ....................... 266 8.5.1 Joint Time Frequency Analysis for Shock Signals ..................................... 267 x 8.5.2 De-Correlation of the Feature Space by Karhunen Lo?ve Transforms (KLT)? ............................................................................................................. 271 8.6 Development of Multiplayer Perceptron Network for Hard Parity of Failure Modes ................................................................................................................ 277 8.6.1 Delta Rule .................................................................................................... 277 8.6.2 Algorithm: Pseudo-code for Training Perceptron in this study .................. 281 8.7 Hard Parity of Fault-Modes in Package-On-Package Test Assembly............... 282 8.8 Result: Inference on Multiple Failure Modes .................................................... 285 8.9 Validation of Classification ............................................................................... 290 8.10 Inference on Damage Initiation and Progression .............................................. 294 8.11 Summary and Conclusion.................................................................................. 297 Chapter-9 Summary and Conclusions ........................................................................................ 298 9.1 Silent Features and Key Advancements in this Work ....................................... 298 9.2 Suggestions for Future work ............................................................................. 300 References?.?.. ........................................................................................................ ???? 302 Appendix A Benchmarking Data Set: Iris Flower Data Set ....................................................... 321 xi 9 List of Figures Figure 1.1: Schematic representing different levels of electronic packaging. [Dally 2008] .......... 5 Figure 1.2: Trends of reduction in package size and connection of first level packages on board. [Dally 2008]. ................................................................................................................ 5 Figure 1.3: Trends in chip carriers. [Dally 2008] ........................................................................... 6 Figure 1.4: First level chip BGA with flip chip on board [Dally 2008] ......................................... 7 Figure 2.1 : Schematic of drop testing set up from [board level drop test method of components for handheld electronic products JESD22-B111]. ..................................................... 21 Figure 2.2: Strain based framework of prognostics and health monitoring under development for electronics under drop and shock?????????????? ???..?. 26 Figure 2.3: Fault mode isolation capability of CAVE-3 (Center for Advanced Vehicle and Extreme Environment Electronics, Auburn University) for electronics under mechanical shock. ...................................................................................................... 27 Figure 3.1: 1156 interconnect field programmable gate array (FPGA) (a) 35 x 35 mm with 34 x 34 solder array. (b) Area array interconnect configuration. ...................................... 32 Figure 3.2: Test vehicle with four field programmable gate array packages. ............................... 33 Figure 3.3: (a) Test vehicle mounted on drop tower. (b) Schematic of high speed imaging in drop testing. (c) Measurement of relative displacement and velocity during impact at point on the board mounted in 0 degree orientation on drop tester. ................................... 36 Figure 3.4: 3D contour of strain in longitudinal direction from digital image correlation (DIC) of FPGA Test Board in 0-degree drop orientation at different time intervals of drop event: (a)-0 ms, (b)-2.5 ms, (c)-4.8ms and (d)-5.7ms. ............................................... 38 Figure 3.5: Time Frequency Distribution for a sample transient strain. (a) 3D view of time- frequency window. (b) Top view of time-frequency window. .................................. 41 Figure 3.6: Modal Analysis of FPGA Test board (a) Mode-1: 140.46Hz (b) Mode-2: 238.89Hz (c) Mode-3: 293.98 Hz (d) Mode-4: 379.13Hz. ........................................................ 43 xii Figure 3.7: Original transient strain history and the estimate of strain history from the autoregressive and moving average model. ............................................................... 49 Figure 3.8: JEDEC drop orientation of FPGA test board. ............................................................ 51 Figure 3.9: Correlation between transient strains from model predictions and digital image correlation. ................................................................................................................. 51 Figure 3.10: Solder interconnect completely failed. ..................................................................... 53 Figure 3.11: Confidence value for solder interconnect damage. .................................................. 54 Figure 3.12: Confidence values for solder interconnect crack. .................................................... 54 Figure 3.13: Simulation of chip fracture in FPGA package. ........................................................ 55 Figure 3.14: Confidence chart for chip crack. .............................................................................. 56 Figure 3.15: Simulation of chip delamination. ............................................................................. 57 Figure 3.16: Confidence chart for chip delamination. .................................................................. 57 Figure 3.17: Correlation between the measured and autoregressive model prediction of mode-159 Figure 3.18: Correlation between the measured and autoregressive model prediction of wavelet packet energy. ............................................................................................................ 59 Figure 3.19: FPGA internal network for fault detection in the solder interconnect. .................... 60 Figure 3.20: FPGA fault detection process in solder interconnects.............................................. 61 Figure 3.21: Functionality of SJ-BIST by an RC circuit. ............................................................. 61 igure 3.22: Waveform in 1? capacitor for various defects. (a) R< 1 ohm, (b) R= 1 ohm, (c) R= 10 ohm, (d) R=100 ohm............................................................................................. 63 Figure 3.23: Waveform from healthy FPGA ................................................................................ 64 Figure 3.24: Waveform from Faulty FPGA. ................................................................................. 64 Figure 3.25: Confidence value plot for repeatability of FPGAs Waveform. ................................ 64 Figure 3.26: Confidence value plot for repeatability of FPGAs transient strain from optical imaging. ..................................................................................................................... 65 Figure 3.27: Confidence plot for FPGA's when subjected to JEDEC drop. ................................. 66 xiii Figure 4.1 : Schematic of the approach implemented for fault mode classification. .................... 73 Figure 4.2: Process describing fault mode classification in test assemblies under shock. ........... 74 Figure 4.3: Test Board-A: 1156 FPGA (a) 35 x 35 mm with 34 x 34 solder array. (b) Area Array interconnect configuration. ........................................................................................ 76 Figure 4.4: Test vehicle-A (4-FPGA test board assembly). .......................................................... 77 Figure 4.5: Test Board-B, (a) TABGA test board. (b) Inter-connect configurations. .................. 80 Figure 4.6: Test Board-C: (a) Area array configuration of inter-connects of plastic ball grid array package with 324 I/O count (PBGA324-18x18 mm grid). (b) Test vehicle-C. ........ 82 Figure 4.7: JEDEC drop orientation of (a) test vehicle -A (b) test vehicle-B (c) test vehicle-C. . 86 Figure 4.8: Cross sectional view of modeling details. (a) test vehicle -A (b) test vehicle-B (c) test vehicle-C .................................................................................................................... 87 Figure 4.9: Simulation of solder interconnect cracking and solder interconnect completely failed for (a) test vehicle -A (b) test vehicle-B (c) test vehicle-C ........................................ 89 Figure 4.10: Simulated chip fracture in drop event. (a) test vehicle -A (b) test vehicle-B (c) test vehicle-C. ................................................................................................................... 91 Figure 4.11: Simulation of chip de-lamination in the package. (a) test vehicle -A (b) test vehicle- B (c) test vehicle-C. ................................................................................................... 93 Figure 4.12: Simulation of part fall off. (a) test vehicle -A (b) test vehicle-B (c) test vehicle-C. 95 Figure 4.13: Lansmont drop table with test vehicle-A. ................................................................ 96 Figure 4.14: 3D contour of strain in longitudinal direction from digital image correlation of FPGA Test board in 0-degree orientation at 5.7ms time instant of shock. ................ 97 Figure 4.15: Sample strain history and damage detection by daisy chain monitoring. ................ 97 Figure 4.16: Lansmont drop table (Lansmont model 23 shock system) with test vehicle-C mounted. .................................................................................................................... 98 Figure 4.17: 3D contour of strain in longitudinal direction from digital image correlation of test board-C in 0-degree orientation. ................................................................................ 99 Figure 4.18: Sample strain history and damage detection by daisy chain monitoring for test vehicle-C. ................................................................................................................... 99 xiv Figure 5.1: Generic Rectangular data set on Karhunen Loeve Transform ................................. 105 Figure 5.2: Phases of Karhunen Loeve Transform (a) En-coder (b) De-coder. ......................... 109 Figure 5.3: Scree plot of IRIS data. ............................................................................................ 110 Figure 5.4: Scatter plot of first two principal components. ........................................................ 110 Figure 5.5: Test Vehicle-A- Scree Plot of cumulative contribution of principal components. (a) Simulation data (b) Experimental data .................................................................... 112 Figure 5.6: Test Vehicle-B- scree plot of cumulative contribution of principal components. (a) Simulation data (b) Experimental data .................................................................... 113 Figure 5.7: (a) De-correlated pre-failure feature space of test vehicle-A. (b) Dominant direction of failure mode in pre-failure feature space in test vehicle A. ................................. 115 Figure 5.8: (a) De-correlated Pre failure feature space of test vehicle-B. (b) Dominant direction of failure mode in pre-failure feature space of test vehicle B. ................................. 117 Figure 5.9: Test Vehicle-A, overlap of simulation and experimental feature spaces. ................ 118 Figure 5.10: Test Vehicle-B, overlap of simulation and experimental feature spaces. .............. 119 Figure 5.11: Confidence plot based of mahalonobis distance classifier for simulation data set. (a) Test Vehicle-A (b) Test Vehicle-B. ......................................................................... 121 Figure 5.12: Combined confidence plot based of Mahalonobis distance classifier for experimental data set. (a) test vehicle-A (b) test vehicle-B. .................................... 122 Figure 5.13: Solder joint failures near IMC layer on (a) board and package side and (b) package side. .......................................................................................................................... 127 Figure 5.14: Failure modes in second level interconnect (a) Interface cracks near the PCB pad (b) Solder bulk on PCB-side. ........................................................................................ 129 Figure 5.15: Failure modes, (a) Resin Crack (b) Solder-Copper pad on PCB-side. ................... 130 Figure 5.16: Failure Modes, (a) resin crack (b) solder-copper pad on PCB-side(c) solder-copper pad on package-side (d) copper trace failure ........................................................... 130 Figure 6.1: (a) Abstract neuron input\output characteristics. (b) Computational model of neural processing unit. ........................................................................................................ 135 Figure 6.2: Primary objective of Sammon's mapping [Sammon?s 1969]. .................................. 141 xv Figure 6.3: Basic algorithm for implementation of Sammon's mapping. ................................... 143 Figure 6.4: Scatter plot of dimension-1 and dimension-2 after running Sammon's mapping on the IRIS data. ................................................................................................................. 145 Figure 6.5: Evolution of Sammon's stress factor on IRIS data set. ............................................ 145 Figure 6.6: Schematic of a single layer perceptron..................................................................... 147 Figure 6.7: Soft activation function (tangent hyperbolic) for bipolar neurons. .......................... 148 Figure 6.8: Soft activation function (tangent hyperbolic at gain=1) and its derivative for a bipolar Neurons. ................................................................................................................... 150 Figure 6.9: Flow chart of representing training procedure of the single unit perceptron. .......... 152 Figure 6.10: Graphical layout of XOR problem. ........................................................................ 154 Figure 6.11: Schematic of a neuron representing an equation of line in a 2D space. ................. 155 Figure 6.12: (a) Training summary of for obtaining weights of line-1. (b) Error plot for training line-1. ....................................................................................................................... 156 Figure 6.13: Evolution of weights at every iteration for training of line-1. (a) iteration-1, (b) iteration-2, (c) iteration-3, (d) iteration-4. ............................................................... 159 Figure 6.14: (a) Training summary of for obtaining weights of line-2. (b) Error plot for training line-2. ....................................................................................................................... 161 Figure 6.15: (a) XOR problem (b) Designed neural trainer. ....................................................... 164 Figure 6.16: Computer simulation of XOR problem. (a) Simulated stepwise parity of XOR problem, (b) Validation of the designed neural trainer for XOR problem to classify region of class-1. (c) Top view of the validation of the designed trainer of XOR problem, with hard parity of region belonging to class-1. ....................................... 166 Figure 6.17: Sample time frequency distribution for test vehicle-C; (a) 3D view of time- frequency distribution (b) top view of time-frequency distribution. ....................... 168 Figure 6.18: Sample feature vector- frequency moment for test vehicle-C. ............................... 169 Figure 6.19: Sample classification matrix orientation; (a) image of classification matrix (b) matrix Orientation. ................................................................................................... 170 Figure 6.20: Data processing sequence implemented for fault isolation. ................................... 170 xvi Figure 6.21: Training for the parity of feature space test vehicle-C (a) healthy (b) interconnect completely failed (c) chip cracking (d) chip de-lamination (e) part fall off. ........... 174 Figure 6.22: Training for the parity of feature Space test vehicle-B (a) healthy (b) interconnect completely failed (c) chip cracking (d) chip de-lamination (e) part fall off. ........... 176 Figure 6.23: Schematic of designed neural network used for fault mode classification in test assembly-B. ............................................................................................................. 178 Figure 6.24: Designed feed-forward neural network for fault isolation (test vehicle-A). .......... 184 Figure 6.25: Classified simulation feature space of test vehicle-A. ........................................... 185 Figure 6.26: Classification in experimental data set. Overlapped experimental and simulation feature space of test vehicle-A. ................................................................................ 185 Figure 6.27: Classified simulation feature space of test vehicle-B. ............................................ 186 Figure 6.28: Classification in experimental data set. Overlapped experimental and simulation feature space of test vehicle-B. ................................................................................ 186 Figure 6.29: Validation of the failure modes by simulation of the designed network. Test vehicle-C, (a) healthy, (b) inter-connect cracking (c) interconnect completely cracked, (d) chip cracking, (e) chip de-lamination, (f) part fall off. ........................ 191 Figure 6.30: Validation of the failure modes by simulation of the designed network. Test Vehicle-B, (a) healthy, (b) inter-connect Cracking (c) interconnect completely cracked, (d) chip cracking, (e) chip de-lamination, (f) part fall off. ........................ 193 Figure 6.31: Experimental cross sections with interconnect fracture. ........................................ 201 Figure 6.32: Failure Modes, (a) resin crack (b) solder-copper pad on PCB-side(c) solder-copper pad on package-side (d) copper trace failure. .......................................................... 202 Figure 7.1 : Neuro-biological motivation to self organized mapping. Cyto-architectural map of cerebral cortex. ........................................................................................................ 206 Figure 7.2: Schematic of Kohonen layer. ................................................................................... 207 Figure 7.3: Schematic for mapping feature from continuous input space and discrete output space. ....................................................................................................................... 208 Figure 7.4: Activation function used in competitive learning for linear neurons. ...................... 211 Figure 7.5: Evolution of map in continuous input space. ........................................................... 211 xvii Figure 7.6: Competitive feed-forward learning network with lateral connection. ..................... 212 Figure 7.7: Shrinkage of Gaussian neighborhood with time. ..................................................... 213 Figure 7.8: Variation of neighborhood radius with time. ........................................................... 214 Figure 7.9: Sample hexagonal layout of 2-D lattice. .................................................................. 215 Figure 7.10: Variation of forgetting parameter with time........................................................... 217 Figure 7.11: Variation of learning rate with time. ...................................................................... 218 Figure 7.12: Evolution of unified distance matrix. ..................................................................... 221 Figure 7.13: 3-Stage training by self organization...................................................................... 222 Figure 7.14: Training schematic for self organization algorithm. .............................................. 223 Figure 7.15: Trained map in the continuous input space of IRIS data set. ................................. 224 Figure 7.16: Trained lattice of neuron representing euclidean space for classification of species in IRIS data set. ............................................................................................................ 225 Figure 7.17: Trained lattice of neuron representing unified distance matrix and labeled lattice for classification of species in IRIS data set.................................................................. 226 Figure 7.18: Representative sample image of the data set formed by combining frequency moments. .................................................................................................................. 228 Figure 7.19: Data matrix of combined frequency moment representative of time-frequency feature Space ............................................................................................................ 228 Figure 7.20: Sample time-frequency distribution. (a) isometric view (b) top view. .................. 229 Figure 7.21: Sample frequency moment (test vehicle-B). .......................................................... 230 Figure 7.22: Structure of transformed input matrix after principal component analysis. ........... 231 Figure 7.23: Test vehicle-C, scree plot (a) simulation data set (b) experimental data set. ......... 231 Figure 7.24: Test vehicle-B, scree plot (a) simulation data set (b) experimental data set. ......... 232 Figure 7.25: Data orientation for self organization of data sets. (a) simulation, (b) experiment. 234 xviii Figure 7.26: Classification of simulation data set in test-vehicle C. (a) unified distance matrix, (b) label map. ........................................................................................................... 237 Figure 7.27: Classification of Simulation data set in test-vehicle C Isometric view of Euclidean Distance of the trained lattice. ................................................................................. 237 Figure 7.28: Classification of simulation data set in test-vehicle-B. (a) unified distance matrix, (b) label map. ........................................................................................................... 238 Figure 7.29: Classification of simulation data set in test-vehicle B. Isometric view of euclidean distance of the trained lattice. .................................................................................. 238 Figure 7.30: Classification of combined data set in test-vehicle-C. (a) unified distance matrix, (b) label map. ................................................................................................................. 240 Figure 7.31: Classification of combined data set in test-vehicle-C. Isometric view of euclidean distance of the trained lattice. .................................................................................. 240 Figure 7.32: Classification of combined data set in test-vehicle-B. (a) unified distance matrix, (b) label map. ................................................................................................................. 241 Figure 7.33: Classification of combined data set in test-vehicle-B. Isometric-view of euclidean distance of the trained lattice. .................................................................................. 242 .Figure 7.34: Cracking of solder interconnects. .......................................................................... 243 Figure 7.35: Observed cracking of in the solder interconnects. ................................................. 243 Figure 8.1: (a) CAVE-3 Package-On-Package test assembly. (b) PoP stack with significant dimensions. .............................................................................................................. 256 Figure 8.2: PoP component mounted on Lansmont shock system in zero degree JEDEC drop orientation. ............................................................................................................... 258 Figure 8.3: Monitoring of Shock induced damage by daisy chain resistance in PoP assembly. 258 Figure 8.4: Sample transient dynamic strain from a shock event of PoP assembly. .................. 259 Figure 8.5: 3D contour of strain in longitudinal direction from DIC of PoP test assembly in 0- degree orientation. ................................................................................................... 259 Figure 8.6: Global zero degree JEDEC drop of PoP assembly................................................... 261 Figure 8.7: Cross Section of detailed modeling of PoP module using explicit finite elements on ABAQUS. ................................................................................................................ 262 xix Figure 8.8: Error seeded explicit finite element models: solder interconnect failed. ................. 263 Figure 8.9: Error seeded explicit finite element models: die cracking. ...................................... 264 Figure 8.10: Error seeded explicit finite element models: chip delamination. ........................... 265 Figure 8.11: Error seeded explicit finite element models: part fall off. ...................................... 265 Figure 8.12: Data processing sequence for real time fault monitoring. ...................................... 267 Figure 8.13: Joint time frequency feature space of a transient strain signal. .............................. 269 Figure 8.14: (a) Sample frequency moment feature vector for transient strain signal from a JEDEC drop ............................................................................................................. 270 Figure 8.15: Sample classification matrix for fault isolation. ..................................................... 272 Figure 8.16: Scree plots of PoP test board (a) simulation (b) experiment. ................................. 276 Figure 8.17: De-correlated space (a) error seeded data set (b) experimental data set overlapped on error seeded data. ................................................................................................ 276 Figure 8.18: Generic perceptron layout. ..................................................................................... 280 Figure 8.19: Soft sigmoidal activation function for a unipolar neuron....................................... 281 Figure 8.20: Training for the parity of feature space representing PoP test vehicle. failure mode: die delamination (a) Truth table for supervised parity (b) Parity by planes in 3D space for die delamination, (b) Error plot for training of perceptron representing die delamination. ........................................................................................................... 284 Figure 8.21: Schematic of designed neural network used for isolation of a single fault mode (die delamination) in PoP test assembly. ........................................................................ 285 Figure 8.22: Final designed neural network for health monitoring of PoP test assembly. ......... 288 Figure 8.23: Harp parity of error seeded feature space populated in 3 dimensions for various failure modes (a) View-1: represents region of feature space belonging to pristine state and die delamination, (b) View-2: represents regions of various fault mode (eg. snterconnect cracking, interconnect missing, die cracking, falling component). .... 289 Figure 8.24: Overlap of error seeded space and experimental space populated in 3 dimensions. (a) View-1: represents region of feature space belonging to pristine state with pristine experimental shocks and die delamination, (b) View-2: represents regions of various fault mode (eg. interconnect cracking, interconnect missing, die cracking, falling component). .................................................................................................. 290 xx Figure 8.25: Experimental cross sections of 2nd level interconnects with cracking and fracture.(a) Board side, (b) Package side .................................................................................... 294 Figure 8.26: Inference on damage initiation and progression from statistical hypothesis. (a) error seeded feature space (b) experimental feature space. .............................................. 296 xxi 10 List of Tables Table 4.1: Attributes of FPGA Test Board. TV-A. ....................................................................... 78 Table 4.2 : Attributed of TABGA test board. (TV-B). ................................................................. 79 Table 4.3: Attributes of CAVE Test vehicle. ................................................................................ 81 Table 5.1 : SPCA calculation for simulation vs. simulation cases. (a) Test Vehicle-A (b) Test Vehicle-B. ................................................................................................................ 124 Table 5.2: SPCA calculation for experiment vs. experiment cases. (a) Test Vehicle-A (b) Test Vehicle-B. ................................................................................................................ 125 Table 5.3: SPCA calculation for experiment vs. simulation cases (Cut of Level- 90%). (a) Test Vehicle-A (b) Test Vehicle-B. ................................................................................. 126 Table 6.1 : Some examples of different types of neurons and activation functions. .................. 136 Table 6.2: Truth table for XOR problem. ................................................................................... 154 Table 6.3: Training summary of line-1. (learning rate=10; gain=1, max error: 0.001) .............. 157 Table 6.4: Training Summary of Line-2. .................................................................................... 159 Table 6.5: Truth table for parity (test vehicle-B and test vehicle-C), (a)healthy, (b)solder completely failed, (c)chip cracking, (d) chip de-lamination, (e) part fall off .......... 171 Table 6.6: Weights of hidden layer-1: (a) test vehicle-C (b) test vehicle-B. .............................. 178 Table 6.7: Weights of hidden layer-2: (a) test vehicle-C (b) test vehicle-B. .............................. 179 Table 6.8: Summary of de-correlation of feature space by Sammon's mapping. ....................... 183 Table 6.9: Nomenclature of dominant failure modes ................................................................. 183 Table 6.10: Relevance of each neuron in the designed network (test vehicle-A). ...................... 183 Table 6.11: Summary of classified failure modes. ..................................................................... 187 xxii Table 6.12: Multivariate analysis of variance. (a) test vehicle-C (b) test vehicle-B. ................. 195 Table 6.13: Similarity of simulation data set. (a) test vehicle-C (b) test vehicle-B. ................... 197 Table 6.14: Similarity of experimental data set. (a) test vehicle-C (b) test vehicle-B. ............... 198 Table 6.15: Combined similarity (Experimental space overlapped over simulation feature space). (a) test vehicle-C (b) test vehicle-B. ........................................................................ 199 Table 7.1: Failure modes nomenclature ...................................................................................... 235 Table 7.2: Results of Box M-test for test vehicle-C. .................................................................. 244 Table 7.3: Results of Box M-test for test vehicle-B. .................................................................. 244 Table 7.4: Results of multivariate analysis of a variance (MANOVA) for test vehicle-C. ........ 246 Table 7.5: Results of multivariate analysis of a variance (MANOVA) for test vehicle-B ......... 246 Table 7.6: Simulation data set similarity matrix for test vehicle-C ............................................ 247 Table 7.7: Simulation data set similarity matrix for test vehicle-B ............................................ 248 Table 7.8: Combined data set similarity matrix for test vehicle-C ............................................. 248 Table 7.9: Combined data set similarity matrix for test vehicle-B ............................................. 249 Table 8.1 Specification of PoP component. ................................................................................ 256 Table 8.2: Labels for different fault scenarios. ........................................................................... 287 Table 8.3: Significance of classification by multivariate analysis of variance (MANOVA). .... 291 Table 8.4: Similarity matrix for different fault modes. (a) error seeded data set (b) experimental data set. .................................................................................................................... 292 Table 8.5: Output combinations of neurons for inference on fault initiation. ............................ 295 1 1 Chapter-1 Introduction 1.1 Motivation Electronics have become an integral part of various systems and subsystems involved amongst others in various diverse fields such as avionics, military, defense, automobile, implantable medical devices and household appliances. The electronic packages in these systems experience varying degree of harsh environments at different stages of manufacturing, transportation, and deployment in field. Currently the reliability of electronics in harsh environment is broadly categorized into thermo-mechanical reliability, and shock and vibration reliability. Over the years the focus has shifted to high density packaging with miniaturization of components, hence there is a greater need for high reliability in systems. This high reliability perception of systems in fields such as avionics, defense and military has shifted the focus towards prognostics and health management (PHM) of these electronic-rich systems. Prognostics and health management of systems over the years have transformed the conventional approaches of system maintenance. In the PHM framework, a greater emphasis is placed on pro-active maintenance than performance based maintenance. Innovation is a continual process and electronic packages are integral part of modern day technology. Electronics are found virtually in every machine and engineering system we come across such as the sophisticated ones like flight control guidance systems, automobile engines, braking systems, to mundane home appliances such as washing machines. The shift from a primarily mechanical to software-electronic based vehicle systems has transformed the entire automobile, aviation and defense industry. Electronic packaging is playing an important role in 2 revolutionizing the design of products and sub-components of practically all engineering systems. Optimal performance and quality of these systems largely depends on the robustness of the electronic packages integrated in these systems. This shall be a major challenge for modern day engineers. Currently there is no prognostics and health monitoring (PHM) decision framework existing for electronics at the component or system level, hence there is a need for developing a platform of techniques which can address various health monitoring issues such as damage detection, fault classification and estimation of remaining useful life (RUL) of systems with varying degree of complexity. The methodologies developed in the present dissertation can help schedule pro-active maintenance and prevent catastrophic shutdown of the system. Prognostics and Health Monitoring (PHM) contributes in development of cost effective, reliable and safe systems. The framework developed and presented in this work is advancement towards rendering systems operationally more reliable. 1.2 Overview of Electronic Packaging It is important to have an overview of electronics packaging before addressing the issue of life prediction and life assessment by prognostic based reliability of micro-electronic components and devices. Electronic packaging is defined as a science of making inter- connections between different layers and levels of electronic devices, components, modules and systems [Dally 2008]. Accordingly, packaging of electronic systems refers to placing and making connections between number of electronic and electro-mechanical components in an enclosure, protecting the system from environment and enabling easy access for maintenance. Primarily electronic packaging has the following functions. It provides signals and power distribution between different circuits and layers of electronic devices. It also facilitates cooling 3 of the electronic device by efficient heat dissipation and provides protection of components and inter-connections from harsh environments. Electronic packaging has various levels of packaging. Figure 1.1 shows different levels of packaging, where chip may consist of resistors, capacitors and transistor which form an electrical circuit on the die. The die is placed in chip carrier which is called first level of packaging. The chip carrier can be placed on a substrate or printed circuit board which is called second level of packaging. The printed circuit board is placed on a motherboard through edge connectors which forms the third level of packaging. Fourth level of packaging comprises the complete cabinet holding printed circuit board on motherboard panel, cables and power supplies together. It is important to have safe and reliable packaging of electronics for efficient working. In many systems, more than 50% of the electronic product cost is taken up by the packaging aspects of the devices. There is a constant effort in electronic packaging industry and research community to push for smaller and smaller electronic devices. Moore?s Law is followed in semiconductor technology which deals with the rate of scaling of the minimum feature size of a semiconductor device. This facilitates denser integration and high functional requirements of the semiconductor device. This has led to shifting focus from VLSI (very large scale integration) to ULSI (ultra large scale integration) systems. There are several issues which have to be addressed and solved for following Moore?s Law with ULSI. It is important to have input-output ports sufficiently large for human handling. Also increased line resistance is seen with reduction in cross section of circuit lines in second and third levels of packaging. Moreover, with miniaturization the cost has increased for first level packages. High I/O counts in chip carriers are replacing wire bond technology making them expensive. Also high performance of chips demands higher power supplies. This leads to more heat generation in the chips, hence efficient heat dissipation 4 mechanisms are needed. Figure 1.2 represents the reduction in the package size in semiconductor technology with time. Now first level packages are the chip carriers which have following functions. They protect chip from environmental humidity, dust etc. They also protect chip from abusive handling at the time of assembly. Chip carriers also provide protection from shock and vibration on the die which may be caused either while transporting or when deployed in the field. Finally they also provide interconnection in the form of pins, solder joints, pads, between board and the circuit in the chip. Chip carriers also facilitate efficient heat dissipation mechanisms. Currently, first level packages are categorized by the technology used for mounting. Through-hole and surface mount are two widely used technologies for mounting chip carriers on the board. Through-hole technology includes single-in-line package (SIP), dual-in-line package (DIP), and pin grid array (PGA). Surface mount approach consists of packages with solder ball interconnection such as BGA (ball grid array), and CSP (chip scale packages). Surface mount also includes packages which are leadless. In these leadless packages, a metalized pad on the chip carrier is soldered on the board for interconnection. Leadless packages are typically quad flat pack, resistors, capacitors etc. Surface mount also has leaded packages. The leads can be J- leads on the first level packages which are soldered on the board. Some examples of leaded packages are small outline integrated circuits (SOIC), quad flat packs (QFP), discrete devices like a DPACK or SOT (small outline transistor). Passive components such as capacitors, resistors, diodes are also called first level packages. They have been implemented using through- hole as well as surface mounting approach on the board. Through-hole technology is becoming obsolete and no longer used since that makes the package bulky. Figure 1.2 shows evolution of through-hole technology to surface mount technology over time. Figure 1.3 shows the trends in the chip carriers used in electronic packaging over the years. First level packages i.e. chip 5 carriers, have various key features such as cost, package size, heat dissipation and thermal resistance, I/O counts etc. Figure 1.1: Schematic representing different levels of electronic packaging. [Dally 2008] Figure 1.2: Trends of reduction in package size and connection of first level packages on board. [Dally 2008]. 6 In the present research work, first level packages such as BGA?s and CSP?s are used on the PCB board assembly. These packages are extensively used currently in semiconductor technology. Figure 1.4 shows a schematic of a BGA chip carrier. BGA?s have capability to carry high I/O counts which cannot be achieved by J-leads or gull wings. This facilitates increased circuit density. They are also available in small sizes, weights and, reduced cost. They are easy to manufacture as they posses self centering capability at reflow, reduced effect of weak leads while handling, prevention of solder bridging as pitch could be adjusted. These features lead to high yield of the BGA packages in manufacturing. A disadvantage of BGA?s is that it is difficult to rework an individual solder joint. Visual inspection can be very difficult under the package. CSP?s have several advantages. Some of the features worth mentioning about CSP?s are that they are reliable in absence of under fill, and they can be reworked easily. They also provide enhanced chip protection, and have high yield as they are easy to handle at the time of assembly. Figure 1.3: Trends in chip carriers. [Dally 2008] 7 Figure 1.4: First level chip BGA with flip chip on board [Dally 2008] 1.3 Overview of Structural Health Monitoring (SHM) Structural health monitoring (SHM) [Farrar 2007] is the development of methodologies for detecting any flaw, damage, anomaly in civil, mechanical and aerospace structures. Structural health monitoring helps in maintaining performance of these systems to an optimum. Any kind of deviations of the system from its normal operation which can lead to degradation in performance of the system can be understood as an anomaly or damage in the system. The scope of structural health monitoring (SHM) in conventional fields such as civil, mechanical and aerospace structures is very much limited to diagnostics. As per [Farrar 2007], structural health monitoring is closely related to condition based monitoring [Gupta 2008], non destructive testing [Shull 2002] and statistical process control [Montgomery 1997]. The emphasis is on condition based monitoring, where measurements on the system under study are taken in time domain. These measurements are usually vibration measurements, which are often sensitive to capture any defect in the system. These time domain signatures are analyzed and an inference on the system state is drawn. Condition-based-maintenance provides a warning of failure as damage increases in the system on time basis. The warning is utilized for reducing downtimes in manufacturing industry and for scheduling repairs. 8 Structural health monitoring is implemented extensively in civil structures as presented by [Chang 2003], who emphasizes the need for global health monitoring as well as the local health monitoring. Often detection of damage can only suggest that in a global sense there is some flaw in the structure. However there may be a need to measure the location and the severity of the damage. The process of quantifying the extent of damage and its site is referred as local health monitoring. Non-destructive testing is often used for local structural health monitoring. A change in dynamic characteristics such as resonating frequencies, and mode shapes are used for detecting damage in civil structures such as bridges. Application of structural health monitoring in aerospace structures [Hedley 2004, Hickman 1991, Castanien 1996] is also very popular. Aerospace structures are complex integration of different systems. Aircraft monitoring is categorized into aero-performance and mechanical performance [Tumer 1999]. EPR (engine pressure ratio), F/F (fuel\fuel) ratio, rpm of the rotors are measurements for monitoring aero performance. For mechanical performance, typically oil consumption and vibration amplitudes are studied. Other commonly measured parameters in aircraft health monitoring [Tumer 1999] are temperatures and pressure at several locations such as the inlet, outside air, exhaust gas, compressor, turbine, and bleed air. Vibrations of most rotating parts [Tumer 1999] such as rotor, shaft, reduction gears, bearings, transmissions and accessories like afterburners are measured. Health monitoring of aircrafts also used HUMS [Boakes 2003] (health monitoring and usage monitoring systems) for increased safety and reliability of the helicopters and for providing on-board diagnostics. Health monitoring and usage monitoring systems (HUMS) specifically diagnoses the drive train faults effectively. Structural health monitoring (SHM) is also extensively used in mechanical systems. The structural health monitoring approach is widely popular in rotating machinery as for detection of 9 a crack in a shaft [Lebold 2004, Gyekenyesi 2003]. Vibration based condition monitoring [Carden 2004] is adopted in studying rotors, which are extensively used in practically all systems such as automobiles, manufacturing machinery [Lee 1995, Chuang 2004, Wegerich 2003], offshore drilling oil explorations etc. The vibration signals are acquired in time domain and processed in spectral domain. Patterns are studied in spectral domain to quantify presence of damage. [Gupta 2008] presented a study of vibration signatures in time, frequency and wavelet domains for condition monitoring of a geared system. Research in structural health monitoring has been in progress for last 30-50 years [Farrar 2007]. The structural health monitoring is primarily implemented through condition based maintenance. However the research community has shifted its focus towards damage prognosis. The prognostics and health management is a relatively new concept for researchers in different fields. Statistical pattern recognition is used for developing prognostic based health monitoring techniques. In particular the prognostics and health monitoring of electronics is a new direction which is not yet fully explored by researchers in semiconductor industry. 1.4 Prognostics and Health Monitoring of Electronics Currently reliability models for electronics and life prediction models such as Paris laws, S-N diagrams, Coffin Mansion?s relationship are based on linear superposition of damage. They are based on pristine states of the system with knowledge about environmental conditions. Hence these provide a limited insight of the remaining useful life (RUL) of electronics under complex environmental conditions. It is envisioned that prognostics and health monitoring (PHM) methodologies can circumvent this deficiency and can lead to development of new life prediction models which are based on non-linear damage superposition, which will take into account the evolved life cycle of the system under consideration. This will lead to an accurate prognosis of 10 remaining useful life (RUL) and can be implemented in wide array of applications such as avionics, portable electronics, health care, military applications, space exploration missions etc. Prognostics and health monitoring (PHM) can be defined as a decision framework which gives an inference on the system state. One may be interested in various aspects of system state like diagnostics of damage, quantification of accrued damage, potential fault mode and its failure sites, and estimation of remaining useful life (RUL). Prognostics and health monitoring (PHM) techniques provide information on these issues prior to the actual damage taking place in time. This can be extremely useful in scheduling part replacements and repairs. Prognostics and health monitoring (PHM) approach presented in the present work is based on leading indicators of failure. The methodology presents a prior interrogation of electronic system in a pre-failure feature space. The inference on damage initiation and propagation is quantified using deviation of the feature vectors obtained from pristine state (normal operating condition) of the system to deviated state. The current state-of-art of health monitoring is quite well established for fields such as civil structures, mechanical systems etc. Prognostics and health monitoring is a relatively new concept which is evolving in its infancy stages. Considerable progress has been made by research community in development and implementation of prognostics and health monitoring (PHM) techniques in civil structures like bridges, and mechanical systems such as manufacturing [Johnson 2005] machineries or gear trains. However most applications these days involve extensive integration of electronics, hence in order to achieve a complete system level reliability, prognostics and health monitoring (PHM) of electronics needs to be addressed. Electronic circuits and microelectronic devices present a different kind of challenge due to their miniaturization. Hence in order to monitor their performance, special sensors or testing 11 techniques are required for data acquisition which can act as a proxy for degradation in electronic component as well as system health. [Cheng 2010] categorizes prognostics and health monitoring (PHM) approach into three broad categories i.e. physics-of-failure (PoF) based techniques, data driven techniques and model-based techniques. In physics of failure based techniques the failure mechanisms are studied using a mathematical relationship between loading and its location where failure mechanism is probable to initiate. Physics-of-failure (PoF) requires knowledge of material parameters, geometric architecture, environmental conditions and such parameters. [Lall 2011a] presents physics-of-failure (PoF) approach for prognostication of remaining useful life (RUL) in electronic assemblies under harsh thermo-mechanical environment. Data-driven techniques on the other hand do not require knowledge of such aspects as mentioned above. Sensors are mounted on the system and in-situ measurements of the system response are taken to draw an inference on the system state. Various techniques such as statistical pattern recognition, artificial intelligence based techniques like neural networks, and fuzzy logic fall in this category of prognostics and health monitoring (PHM) approach. [Peel 2008] presents a prognostication approach for estimating remaining useful life (RUL) of a complex engineering system using data-driven models of Kalman filter and neural networks. The data sets used were procured from sensors placed on the system. In model based prognostics, the interactions between different components in a system and subsystems are studied using mathematical relationships such as differential equations or mapping techniques. Also models are made to study and understand mechanisms of failure and statistical techniques are used for detections and classification. [Lall 2011b] presented a model based prognostics approach for addressing damage initiation and progression along with fault mode parity in electronic systems 12 using supervised neural nets. [Saha 2009] presented a prognostic approach using Bayesian framework for lithium batteries. In the present work, data driven as well as model-based approaches are used for developing Prognostics and health monitoring (PHM) framework for electronics. The framework is implemented on leaded (Pb) assemblies first and then implemented in lead-free (Pb-free) assemblies as well. The framework presents methodologies which are independent of continuous monitoring of daisy chain resistance. Damage initiation and its progression along with dominant failure modes can be isolated at component level. The approach is scalable to system level reliability. 13 2 Chapter-2 Literature Review 2.1 Statistical Pattern Recognition Statistical pattern recognition is an approach for developing prognostics based health monitoring framework. It consists of four stages [Farrar 2007] i.e. operational evaluation, data acquisition and cleansing, feature extraction and information compression and statistical model development. Operational evaluation prioritizes the parameters used for damage quantification. Not all parameters measured on the system can show enough resolution on damage. Operational evaluation narrows the window of understanding issues which define the damage in the system. Data acquisition comprises of acquiring data from the system by means of an appropriate sensor. Data can be historical data and/or real-life sensor data. Sensors can measure different parameters and can be classified into following categories [Cheng 2010] such as electrical: resistance, voltage, current etc.; mechanical: stress, strain, displacement, velocity etc.; environmental: humidity, temperature, acoustics, vibration, pressure; operational parameters: power usage, frequency ranges, heat dissipations etc. Variability in the data acquisition can come from changes in environmental and operation conditions. It is important to have a repeatable measurement. Normalization provides elimination of the effect caused in the measured data due to these changing conditions, without compromising variance evolution in the data caused due to damage initiation and propagation in time. Feature extraction is extraction of relevant features of the measured data which are unique and act as proxy for pointing out damage in the system. Often the data from a system is in 14 time domain, hence very little can be inferred on damage on-set and its growth in the system as time progresses. Features are unique signatures extracted in spectral domain, wavelet domain, and joint time-frequency domain or in the form of some statistical measure such as a distance metric. Different domains can greatly impact the information presented by the extracted feature. While spectral and time domain features can only tell about presence of a phenomenon such as a natural frequency or rpm of shaft or gear mesh frequency [Gupta 2006], but if an interest is in tracking when an event occurs then time-frequency analysis or wavelet domain [Gupta 2008] is used. This is performed using the time-frequency distribution of the signal. From the joint time- frequency distribution, relevant statistics such as higher moments are calculated for degradation assessment. Statistical model development refers to implementation of pattern recognition algorithms which can differentiate between a damaged state and an undamaged state. The model should be robust enough to address existence, location, type, severity/extent of damage and estimation of remaining useful life (RUL) [Rytter 1993]. Pure statistical models such as regression models or hypothesis testing provide indexes for quantifying probability of failure based on historical and real life-sensor data. Statistical models can also be based on linear and non-linear projection schemes. Principal component analysis [Fekedulegn 2002] is a linear projection scheme while self organization [Kohonen 1995] is referred as non-linear principal component. Artificial intelligence based techniques such as neural networks also help in discriminating pristine and damaged states. Neural networks are often used in systems which behave in nonlinear manner and a closed form analytical method is not available for degradation assessment. Damage assessment can also be seen as a classification and clustering problem. Statistical methods such as logistic regression [Pacheco 2009, Torres 2009], hierarchical [Wang_2009, Aghagolzadeh 15 2007, Mathy 2002] and nonhierarchical clustering [Chaudhuri 1997, Shim 2005], are some of the most commonly used statistical techniques for classification and clustering. These techniques have found application in various fields such as bioinformatics [Dabney 2005], image processing [Turrubiates 2008], genealogy [Moon 2006, Yeung 2003], biology [Mitchell 2009], and ecology [Agarwal 2005]. Supervised neural networks have also been used for solving classification problem. Some of the examples of neural networks used in other disciplines are textual document classification [Muhammad 2007], image analysis and optical character recognition (OCR), speech analysis [He 1995] and recognition [Timothy 1994], signal processing and radar [Bharitkar 2001, Hofmann 1998], industrial and real world measurements and robotics [Hariadi 2002], mathematical problems [Burrascano 1991], and machine learning [Kamimura 2009]. Prognosis and forecasting models are also used for addressing occurrence of damage and estimation of remaining useful life (RUL) of the system. Neural networks [Rozaida 2009, Prodan 2009, Balestrassi 2009, Zhang 2009] and statistical models have been successfully applied for prognosis in various other fields such as finance [Hendry 2008], meteorology [Illia 2009], clinical decisions [Kates 2000], telecommunication [Gerardo 2008], medicine [Baadsgaard 2004]. To summarize, statistical pattern recognition has been applied in various different science and technology disciplines. A wide range of approaches come under statistical pattern recognition for solving problems in various fields. A detailed overview for possible candidate techniques based on statistical pattern recognition, is given by [Jain 2000]. Some other examples of statistical pattern recognition applications are by [Zheng 1992, Djurdjanovic 2002] for time series methods (time-frequency moments) for monitoring machine tools, [Yuan 2004] for FFT based spectral analysis techniques for machine monitoring, [Wegerich 2003] for multivariate 16 similarity modeling, [Logan 2003, Shao 2000, Lei 2003, Casoetto 2003, Yan 2004, Engel 2000] for implementation of auto-regression models for machine health monitoring, [Atlas 1996, Sick 1998, Chuang 2004] for probabilistic and artificial neural networks with fuzzy logic to study faults in gas turbine engines, [Heck 1991], hidden Markov models for machine tool wear assessment, and [National Research Council Canada 1999] for statistical data compression for diagnostics of railway bearings. In this dissertation, many of the techniques mentioned above such as neural network (supervised and unsupervised), projection schemes (linear and nonlinear) are implemented in different mentioned domains such as the spectral, wavelet and joint time-frequency domains. The objective is to have a platform of techniques which can be used for different applications of electronic systems with competing packaging architectures. 2.2 Existing State of art of Damage Monitoring/Testing In Electronics 2.2.1 Built-In-Self Test (BIST) Built-in-self-test (BIST) [Stroud 2002, Vichara 2006] is additional hardware circuit often designed and supported by a software package for diagnosing anomalies and their location. It is a self-testing technique and current versions of BIST [Harris 2002, Hashempour 2004, Suthar 2006, Steininger 2000] are based on reactive failure. BIST has ability to self-test and detect failure with support from external testing equipment [Chandramouli 1996, Drees 2004, Hassan 1992, Williams 1983, Zorian 1994]. It is very effective in detection of anomaly, once it is present in the device, but BIST does not provide any prior knowledge about failure mechanism, instant of on-set of failure and remaining useful life. BIST also suffers from the disadvantage of implementation of additional hardware in the system. If a BIST is implemented on chip, then additional area on chip as well as extra pins are needed at input-output interface. This can often 17 be challenging for packaging engineers with continuous shrinking in package sizes. BIST has found applications in testing of various devices such as L2 cache, VMEbus ASIC, ECC RAM, serial EPROM, Flash, VRAM and real-time clock [Motorola Built-In Test Diagnostic Software (2002)]. BIST is also prone to false alarms [Allen 2003, Drees 2004, Gao 2002, Rosenthal 1990] which can lead to delays and costly replacements and loss of performance. Despite BIST being an effective diagnostic tool, it lacks in addressing prognostication of damage scenarios. 2.2.2 Auxiliary Devises Fuses and Canaries Fuses and canaries [Vichara 2006, Mishra 2002] are forms of auxiliary devices used for diagnosing damage. Fuses are intermittent switches in the electronic circuitry. Fuses are designed to fail (open switch in the circuit) if any surge in current, voltage, temperature or any form of transients occur beyond a desirable limit in the electrical circuit. Fuses can lead to open circuit thereby cutting supply of the current, voltage or pressure to the main circuit responsible of operating the electronic device [Ramakrishnan 2000]. This characteristic of fuses helps in safeguarding of the electronic system and prevents a catastrophic shutdown. Canaries [Anderson 2004] are another form of auxiliary device. They are a physics-of-failure based approach for monitoring damage and estimating RUL of the system. Canaries are dummy components which have a similar mechanism of failure, which would occur in the main system under consideration. The main characteristic of canary is that, the failure mechanism responsible of failing a canary mounted on the system under monitoring will fail first as it is designed to fail in an accelerated time frame. Since the canary is mounted on the system when it is deployed in the field, it experiences same load and environmental conditions. Hence with canary failing earlier than the system, it gives a warning signal about approaching damage in failure horizon. This warning signal can be used for maintenance and repairs. Fuses and canaries are also based on reactive 18 failure; hence they work effectively once damage has taken place, but provide no prior knowledge about damage initiation and its trend of progression, different failure modes, and RUL. 2.2.3 Monitoring of Daisy Chain Resistance Solder inter-connect failure (fracture) is detected by continuous monitoring of daisy chain resistance of the electronic packages. The daisy chain resistance can be either continuously monitored using a data logger or by manual probing of the daisy chain at the package outlet by multi-meter. According to [IPC 9701] for a data logger, definition of failure is ?20% nominal resistance increase within a five consecutive reading scans? and for event detectors [IPC 9701] states failure as ?first interruption for a period of one microsecond or less and increase in daisy chain resistance to 1000 or more and affirmation of the failure by nine or more additional events within 10% of the cycles to initial failure?. Daisy chain is an effective way of quantifying failure, but it is again based on reactive failure. It provides no early warnings and prior knowledge about damage initiation and its trends of progression. Also it is only effective in monitoring solder-interconnect fracture in 2nd level interconnects. Failure modes due to significant out of plane deflection of PCB assemblies under mechanical shock can take place. Other failure modes can be anomalies emerging in component such as silicon die cracking, and de-lamination between chip and BT (bismaleimide triazine) substrate. Daisy chain resistance lacks capability to detect such kind of defects. Also daisy chain monitoring can lead to false warnings about failure due to instrumentation in the test setup, which can be misleading. 19 2.2.4 Other Experimental approach Electronic systems primarily have two failure mechanisms i.e. ductile fracture of the inter- connect due to low cycle fatigue with CTE mismatch in thermal cycling environments, and brittle fracture in interconnects due to high-strain rate drop phenomenon for board level reliability in the vicinity of second level interconnects. With continuous miniaturization of electronics taking place and more and more portable electronics being used, the brittle fracture in drop environment has become a significant failure mechanism for researchers to investigate. Research community has put significant effort in studying various factors affecting strength of solder joint under a drop impact. [Date 2004] performed a Charpy test for quantifying the shear strength of the solder joint, and compared the Charpy test at a higher shear rate of 1m/sec compared to 20 ?m/sec, to study the transition of ductile to brittle failure in solder inter connect under impact. [Hanabe 2004] studied package to board interconnection shear strength (PBISS) for a drop impact problem, and examined different failure modes such as shear deformation of solder interconnect, copper trace fracture and build-up-layer fracture. It was seen that rate of shear deformation and package type greatly influenced the interconnection strength of different elements on board under mechanical drop and interconnection strength had direct impact on product reliability. [Chiu 2004] studied the effect of solder alloy composition and inter-metallic compound on the drop reliability of the lead free BGA?s. [Chiu 2004] studied the brittle fracture in the IMC layer formed between solder bulk and Cu pad under drop impact and thermal aging, and also conducted pull test and shear test of solder interconnects at the component level which qualified at product level as well. 20 2.3 Drop and Shock Testing Portable electronics such as ipods, laptops, PDA?s, ipads etc. are increasingly used in our day to day life. Most of these electronics undergo accidental drop and shock under usage as well as at the time of manufacturing and transportation. In order to access the performance and reliability of these portable electronics under accidental drop and shock, drop tests are used. Drop tests are categorized by [Dally 2008] into constrained and unconstrained (free drop) drop tests. The electronics depending on the application can be subjected to a wide range of G-levels. The G-levels can vary from 1G to 10000G?s. An example of this can be an electronic rich system in a space shuttle or rocket that experiences ultra high G?s during taking off and landing. Electronic assemblies are tested at component level as well as at product level. It is often seen that component level drop test may not qualify product level tests. Product level tests are expensive time consuming and complicated to conduct. Also product level tests are highly influenced by angle of impact [Liu 2005, Seah 2002] which makes them tedious to conduct. In the present work, a component level health monitoring framework is developed. A commonly used drop test for handheld electronics is the JEDEC drop test. It is a component level test often used for studying board level reliability of PCB assemblies [JESD22-B111]. JEDEC drop test is a standard test where a PCB assembly surface mounted with 1st level packages is subjected to a 1500G, 0.5 millisecond half-sine shock pulse. The standards of the JEDEC test are detailed in [JESD22-B111]. In JEDEC drop test the board is customized in terms of size of the board, heights of stand-offs, number of components on the board and loadings. This customization is seen by researchers as a constraint which may not represent true scenarios of damage under impact. To overcome this, [Zhao 2007] presented a board design with a single loading condition. Response spectra of JEDEC board were studied for different JEDEC conditions by [Tsai 2007]. 21 Though JEDEC suffers from drawbacks, it is still widely used by researchers for assessing component level testing of electronics under drop and shock. [Chong 2005] compared vertical drop with horizontal drop and concluded that vertical drop produces less flexing of the solder joints in the PCB when compared with horizontal drop. Figure 2.1 : Schematic of drop testing set up from [board level drop test method of components for handheld electronic products JESD22-B111]. In the present study JEDEC test of the test assemblies is performed and strain response is procured. Researchers have used JEDEC drop as a standard test which has 0 degree drop or horizontal drop as shown in Figure 2.1. Other researchers have addressed various aspects of drop testing. Some of them are mentioned here. [Mattila 2007] conducted component level tests at 22 different temperatures. Effect of overlapping environments was studied by [Lall 2006], where components were first thermal cycled and then subjected to impact. Current experimental techniques and testing procedure cannot track initiation of damage prior to the actual failure has taken place. Hence these techniques and procedures mentioned above are not useful for prognostication of electronic life. 2.4 Shock Modeling by Finite Element Methods Finite element modeling of drop and shock phenomenon is a popular way of assessing reliability of electronics under drop impact. It is economical and an efficient way of studying the drop impact phenomenon. A correctly modeled and simulated test assembly can provide information about stresses and strains in the solder interconnect which is often very difficult to estimate using experimental techniques. [Dally 2008] has suggested various modeling approaches with varying computational time. These are as follows: (1) Equivalent layer models for simulation of shock behavior. (2) BGA?s are studied by using half the PCB board assembly with solid-to-solid sub- modeling. (3) Shell to solid sub-modeling quarter symmetry models of beam-shells, for significant computational efficiency. (4) Reduced model size and reduced computation time by exploiting symmetry in loadings and boundary conditions. Researchers have used various types of models as well as simulation schemes to study transient dynamics of the PCB assemblies. [Gu 2004, 2005] simulated drop phenomenon by equivalent layer approach for solder interconnects. [Clech 1996, 1998, Jie 2004, Lall 2004, 2005] used volumetric averaging for making packages of the PCB assembly as smeared property. [Ren et al. 2003, 2004] used a shell to solid sub-modeling approach on quarter symmetry models for studying impact loads on the PCB assemblies. [Tee 2003, Wong 2003, Zhu 2003, 2004] studied global local sub-models. [Lall 2006] studied brittle fracture in IMC layer for electronics in drop 23 and shock by using cohesive zone elements. [Yeh 2004] applied input acceleration to the supports of the test vehicle and used implicit solver for studying board dynamics. [Luan 2004] performed implicit transient analysis using input G method. [Pitaressi 2004, Irving 2004] used implicit analysis to study global models. System level drop simulations were carried by [Wu 1998] to study structural cracking of housing, LCD damage etc in phones. Other system level tests were carried by [Zhu 2005]. Full cell phone models, bare boards and boards with fixture were studied for drop and shock environment by [Zhu 2005]. In the present work, explicit scheme is used for simulating transient drop event. Reduced integration elements are used to model smeared property and conventional shell with Timoshenko beam element models. 2.5 Life Prediction Models Most widely used life prediction models are [Manson 1966] and [Coffin 1954, 1963] which correlate plastic strain amplitude. [Norris 1969] correlates cyclic life with material and geometric parameters in thermo-mechanical environment. [Goldmann 1969] correlates geometric and material parameters with cyclic life and plastic strain with fatigue life. Paris Law of fracture mechanics [Paris 1960, 1961] which correlates stress intensity factor with crack propagation rate is used by [Liu 2006] for life prediction of BGA?s. [Wong 2007] used Miner?s rule which is based on cumulative damage, for life prediction of BGA?s in random vibration. [Darveaux 1995, 1996, 2000] used correlation of cyclic life with inelastic strain energy density in thermo- mechanical loadings. Solder joint stresses and forces were studies by [Vandevelde 1998] using thermo-mechanical models. Life prediction based on closed form solution of the area of hysteresis loop was given by [Clech 1996]. Cycles to failure were estimated using creep shear strain by [Knecht 1991]. [Lall 2004, 2005, 2007] developed statistical life prediction models using multiple linear regression and principal component regression for flex-substrate ball grid 24 array, flip chip, core-no core assemblies in harsh thermo-mechanical environment. The models related fatigue life with material, geometric and packaging architecture type. [Luan 2008] used life prediction model for relating drop life with maximum stress at substrate/package interface of critical solder joint. [Lall 2007] used Timoshenko-beam failure and cohesive zone failure model for prediction of crack in the corner solder joint. [Lall 2010] used XFEM based shock reliability models and peridynamic theory [Lall 2010] for studying crack in the solder interconnects of test assemblies under shock. [Lall 2010] proposed board copper-trace low cycle fatigue failure models in PCB assemblies under drop impact. [Syed 2004] used time-fraction rule and Monkmann-Grant equation for creep rupture as life prediction parameters. [Luan 2005] proposed life prediction models for peeling stress and mean impact life of assemblies under JEDEC drop. [Sogo 2001, Mishiro 2002] studied board level and [Lim 2002, 2003] studied product level dynamic responses of assemblies. [Pang 2004, Perkins 2004] developed stress based fatigue models for flip chips and ceramic column grid array packages (CCGA). A wide range of life prediction models with different approaches are available for electronics under harsh thermo-mechanical environment where prime mode of failure is the low cycle ductile fatigue failure of the solder interconnect in die shadow region of the package. In present research work the harsh environment taken is as the drop and shock environment. Very few and effective life prediction models are proposed by researchers for electronics under drop and shock. Most of these life prediction model are based either on linear superposition of damage or take into account pristine systems, require acquisition and storage of environmental data and have limited capability for accurate life prediction in complex environments. Most of the life prediction models presented above can not accurately predict life before onset of damage. Hence 25 there is a need to develop prognostics based reliability models which can predict remaining useful life more accurately. 2.6 Research Objective: In this research, prognostics and health monitoring (PHM) framework for electronics under mechanical shock and drop impact has been developed. The framework developed in present work is based on strain measurements from test assemblies under drop impact. The techniques implemented are capable of monitoring damage initiation along with damage progression in time. This framework is independent of continuous monitoring of daisy chain resistance. Health monitoring primarily has following stages, damage detection/diagnostics, fault mode classification and Isolation, estimation of remaining useful life, mitigation and assurance. This research work focuses on addressing first two stages of health monitoring i.e. damage detection and fault mode classification. Figure 2.2 represents a general layout of the framework developed in this work at CAVE-3 (Center for Advanced Vehicle and Extreme Environment Electronics, Auburn University). This is a feature vector based approach, where a continuous stream of time domain data in the form of strain histories is collected from the test assemblies. This time domain data is processed in different domains such as wavelet domain, spectral domain or joint time-frequency domain, or it could also be a statistical measure in the form of Mahalanobis distance. Once feature vectors are extracted from time domain data, the variance is probed using statistical pattern recognition techniques to see if feature vectors are shifting from pristine state. If feature vectors shift from pristine state, and the shift is found to be significant statistically, then damage initiation and progression is quantified. Hence based on damage pre- cursors in the form of feature vectors, damage diagnostics is addressed. 26 Figure 2.2: Strain based framework of prognostics and health monitoring under development for electronics under drop and shock. Also auto-regressive modeling is performed on various time series extracted from spectral analysis of transient strain histories. Damage trends are studied for propagation of damage with drop events in time. Therefore stage-1 of prognostics and health monitoring i.e. damage detection is addressed. Next stage of prognostics and health monitoring is fault mode classification and isolation. The problem of fault mode isolation is dealt as a classification problem for electronics under drop and shock. This problem is solved in a multivariate framework with high dimensionality in the data sets. Two data sets (simulation and experimental data sets) are procured and used for classification in a multivariate framework. Explicit finite element modeling of test assemblies is performed for transient strain histories of simulation data set. For experimental data set, both contact (strain gage) and non-contact techniques (Digital image correlation: DIC) are implemented for data acquisition. Orientation of classification matrix in a multivariate framework for different domains is explained. Also all the techniques developed in this fault S u p e r v i s e d L e a r n i n g M u l t i - L a y e r P e r c e p t r o n ( M L P ) B y E r r o r B a c k P r o p a g a t i o n ( L a l l 2 0 1 1 ) D r o p O r i e n t a t i o n F r e e V e r t i c a l D r o p H o r i z o n t a l D r o p F a i l u r e M o d e s I n t e r c o n n e c t - F a i l u r e C h i p - C r a c k i n g C h i p - D e l a m i n a t i o n P a d F a i l u r e C l o s e d F o r m M o d e l s E x p l i c i t F i n i t e E l e m e n t M o d e l s E u l e r - L a g r a n g e M o d e l s H i g h - S p e e d E x p e r i m e n t a l D a t a U l t r a - H i g h S p e e d V i d e o H i g h - S p e e d I m a g e D A Q D a t a A c q u i s i t i o n ( S t r a i n H i s t o r i e s ) D a m a g e D e t e c t i o n a n d P r o g r e s s i o n b a s e d o n D a m a g e P r e - c u r s o r s W a v e l e t P a c k e t E n e r g y D e c o m p o s i t i o n ( L a l l 2 0 0 6 ) J o i n t T i m e - F r e q u e n c y A n a l y s i s ( L a l l 2 0 0 7 , 2 0 0 8 ) F r e q u e n c y B a n d E n e r g y ( L a l l 2 0 0 7 ) A R M A M o d e l i n g ( L a l l 2 0 0 8 ) C l a s s i f i c a t i o n o f D o m i n a n t f a i l u r e - m o d e s i n P r e - f a i l u r e F e a t u r e S p a c e M a h a l a n o b i s d i s t a n c e ( L a l l 2006) S t a g e - I o f P H M ( D i a g n o s i s ) F a u l t D e t e c t i o n S t a g e - I I o f P H M : F a u l t M o d e s C l a s s i f i c a t i o n S t a g e - I I I o f P H M : P r e d i c t i o n o f R e m a i n i n g U s e f u l L i f e ( R U L ) ( P r o g n o s i s ) K a r h u r n e n L o e v e T r a n s f o r m ( K L T ) ( L a l l 2 0 0 9 ) Un - s u p e r v i s e d L e a r n i n g S e l f O r g a n i z e d M a p p i n g ( S O M ) ( L a l l 2 0 1 0 ) P r o g n o s t i c s H e a l t h M o n i t o r i n g B y N e u r a l N e t w o r k s F e a t u r e S p a c e E x t r a c t i o n / D e v e l o p m e n t P r o g n o s t i c s H e a l t h M o n i t o r i n g B y S t a t i s t i c a l P a t t e r n R e c o g n i t i o n C l a s s i f i c a t i o n o f D o m i n a n t f a i l u r e - m o d e s i n P r e - f a i l u r e F e a t u r e S p a c e D a m a g e T r e n d A n a l y s i s S a m m o n ?s M a p p in g ( L a l l 2 0 1 0 ) 27 isolation module are benchmarked against IRIS flower data set. The orientation of benchmark data set i.e. IRIS data set is also explained for understanding of fault mode classification problem in electronic systems. Figure 2.3 represents the fault classification module of the prognostics and health monitoring framework developed at CAVE-3 (Center for Advanced Vehicle and Extreme Environment Electronics, Auburn University). Figure 2.3: Fault mode isolation capability of CAVE-3 (Center for Advanced Vehicle and Extreme Environment Electronics, Auburn University) for electronics under mechanical shock. Karhunen-Lo?ve Transform is a linear projection scheme used for fault mode classification in electronic systems under drop and shock. Various fault modes such as interconnect cracking, chip de-lamination, die cracking etc. have been classified. Test boards consisting of field programmable gate array (FPGA) and chip scale packages are used in this study. The classified failure modes are validated, statistically by paired t-test and principal component similarity factor. Failure analysis of the failed package is also performed using Mu l t i - L a ye r Pe rce p t ro n (Su p e rvi se d L e a rn i n g ) Se l f O rg a n i ze d Ma p p i n g (U n su p e rvi se d L e a rn i n g ) Ka rh u n e n L o e ve T ra n sf o rm (L i n e a r Pro j e ct i o n ) Sa mmo n ?s Ma p p in g (Mu l t i - D i me n si o n a l Sca l i n g ) St a t i st i ca l Ap p ro a ch Art i f i ci a l I n t e l l i g e n ce Ap p ro a ch C A VE 3 F a u l t C l a s s i fi c a ti o n C a p a b i l i ty 28 experimental cross-section. Joint time-frequency feature space is de-correlated to see different fault modes. A decision framework is presented with design and development of supervised neural networks for fault detection as well as fault isolation. Non-linear mapping approach by Sammon?s mapping is implemented on de-correlation of the feature space formed by time- frequency analysis of transient time domain strain histories. Multi-layer perceptron network is designed for hard separation of failure modes. The principal of hard parity between different classes is explained and benchmarked on a simple exclusive OR problem (XOR). Failure mode classification is a multi-class problem for which supervised neural networks are developed. Delta learning rule is used for training of perceptron. This supervised artificial neural networks approach is also implemented on de-correlated feature space extracted by Karhunen-Lo?ve transform. Multiple test boards with plastic ball grid array packages and chip scale packages are used in this work. The classified failure modes are statistically validated by multivariate analysis of variance (MANOVA), and Hotelling?s T-square. Experimental cross-sections of the failed samples are also performed. Finally real time damage detection and fault monitoring is performed using simulation of the designed neural net. A decision framework is represents using self-organization scheme for fault isolation. Unsupervised learning scheme of self-organized mapping is implemented on feature vectors derived from joint time frequency analysis of data sets procured from drop testing of the test assemblies. Various test assemblies with plastic ball grid array packages and chip scale packages are used in this work. Self-organization being a nonlinear projection scheme, it can deal with non-homogenous covariance structures in the data sets. Hence various dominant failure modes such as interconnect cracking, part fall off, chip cracking, chip de-lamination along with mixed 29 modes are also classified. Isolated failure modes are statistically validated using multivariate analysis of variance (MANOVA), box M test, Hotelling?s T-square. Failed samples of the packages are also cross-sectioned for correlation of underlying damage analysis. The effectiveness and approach of self-organization is benchmarked on IRIS flower data set. All the techniques implemented in the fault isolation module (Figure 2.3) of prognostics and health monitoring framework are capable of addressing stage-1 of prognostics and health monitoring i.e. damage detection as well as stage-2 i.e. fault mode classification. The techniques can address both stages simultaneously, hence providing better inference on the state of the system. These techniques are data driven in nature, where a continuous stream of time domain strain data is taken as input. Hence feature vectors derived from this time domain data, form a pre-failure feature space. The techniques implemented in this work exploit damage pre-cursors in this pre-failure feature space to perform prognosis of the health of the electronic system. Hence work presented in this research can be used for prognostics of electronic system under drop and shock. 30 3 Chapter-3 Stage-I of Prognostics and Health Monitoring: Damage Diagnostics 3.1 Overview In this chapter, stage-1 of prognostics and health monitoring is addressed. A damage detection and quantification approach is presented for electronics under drop and shock. A system-level prognostication methodology is implemented on electronics used in implantable biological electronic devices. Methodologies adopted in this study are built-in reliability test (BIRT), auto-regressive moving average (ARMA), fast Fourier transform (FFT) based statistical- pattern recognition, and time-frequency moments based statistical pattern recognition techniques for feature extraction and health monitoring. Leading indicators of failure have been developed to identify impending failure. The proposed research will enhance the state-of-art in health monitoring of electronic systems. Presently, the health monitoring methodologies such as the built-in self test (BIST) provide reactive fault detection but only limited insight into damage progression, remaining-life and residual-reliability. Early indicators of system degradation can signal impending failure. Diagnosing impending loss of functionality provides a window for the identification of potential failures and trigger repair or replacement significantly prior to failure. Functional FPGA?s have been used in place of daisy-chained circuits. Spectral estimates have been obtained for the vibration signals from different shock-events, using auto-regressive moving average (ARMA) models. Degradation in confidence values has been correlated to the underlying damage. Autoregressive coefficients have been computed by several methods, including Yule-Walker [Monson 1996], Burg?s [Kay 1988] and Least-Squares [Jackson 1989]. AR series for undamaged system, has been compared with those of systems with latent damage 31 and correlated to change in the condition of the system. The second approach involves the application of the reduced interference distribution (RID) kernel for time-frequency analysis of the transient dynamic data. The time-frequency analysis using a reduced interference distribution (RID) kernel has been used to derive specific-time and frequency-localized information of the transient strain signals which cannot be obtained from a wavelet packet spectrum or by using the Mahalanobis distance approach. The joint time-frequency analysis allows the study of the energy densities of the signal in both time and frequency domains, hence it has the ability to provide information about the frequency content of a signal at any given time instant. This causes the feature vector obtained from the time-frequency analysis to be unique to a given signal. Explicit finite element models for printed circuit board (PCB) assemblies containing electronic packages have been modeled for various component placement configurations and boundary conditions. The pristine configurations of the assemblies have been perturbed to simulate the failure modes such as solder ball cracking, package fall off and solder ball failure, and these failure studies have been used to correlate underlying damage with drop in confidence value. 3.2 Test Vehicle The test assemblies used in this work were provided by Center for Advanced Vehicle and Extreme Environment Electronics (CAVE-3) sponsors. The test vehicle is a multilayer FR4 (fiberglass reinforced epoxy laminates which are flame retardant) printed circuit board with four 1156 interconnects (I/O) field programmable gate array packages (FPGAs). The packages are fully functional and not daisy-chained devices. The field programmable gate array (FPGA) test board is connected to a LabView data-acquisition system through a NI 6541 Digital generator and CB 2162 connector board to collect the digital data. 32 (a) (b) Figure 3.1: 1156 interconnect field programmable gate array (FPGA) (a) 35 x 35 mm with 34 x 34 solder array. (b) Area array interconnect configuration. The set-up enables each field programmable gate array (FPGA) to write a square-pulse across the solder interconnects, charge the capacitor and read the square-pulse back from the second pair of second-level interconnects. Figure 3.1a shows the location of FPGA solder interconnects being tested for detection of damage initiation and propagation. The solder interconnects being tested have been strategically selected based on the location of failure under thermo-mechanical loads, and shock and vibration loads. Area-array packages often fail in the die-shadow area under thermo-mechanical loads, while the corner interconnects fail under shock loads. Figure 3.1b shows the interconnect array configuration of the 1156 I/O FPGA package. The package is 35 x 35 mm in size, and has a full-array of solder interconnects in a 34 x 34 array configuration at 1 mm pitch. The packages have Sn3Ag0.5Cu solder interconnects 33 Figure 3.2: Test vehicle with four field programmable gate array packages. The test board has mounting holes at the board corners to enable board test in the JEDEC configuration (Figure 3.3a). Package substrate is multi-layer glass-epoxy substrate with solder- mask defined package-side pads. The die is 0.3 mm thick with in-plane dimensions 23 mm x 21 mm. Solder interconnects are 0.6 m in diameter. The pads are solder mask defined, 0.46 mm diameter. The package substrate is 0.56 mm thick, 4-layer FR4. 3.3 Statistical Pattern Recognition Statistical pattern recognition has been applied to strain signals from simulation and internal data generated by PGA?s. Auto-regressive modeling of the strain histories has been used to study the damage progression feature vector of the test vehicle subjected to shock and transient loads. Joint time-frequency approach has been used to study the evolution of the frequency content of the strain signals with time. A reduced interference distribution (RID) kernel has been used to localize the frequency content which cannot be obtained from a wavelet packet spectrum or by using the Mahalanobis distance approach. The health monitoring of the assembly is done by monitoring the confidence values computed by applying statistical pattern 34 recognition techniques to the pertinent data such as strain values, and the vibration mode shapes and frequencies of the electronic assembly under shock and drop. Statistical pattern recognition previously has been used for image analysis, character recognition, speech analysis, man and machine diagnostics, person identification and industrial inspection. Examples include neural networks applied to faults in gas turbine engines [Atlas 1996, Sick 1998, Chuang 2004], hidden Markov models applied to speech recognition and machine tool wear [Wang 2001, Heck 1991], multivariate similarity models applied to machine health monitoring [Wegerich 2003], auto-regression models applied to machine health monitoring [Logan 2003, Shao 2000, Lei 2003, Casoetto 2003, Yan 2004, Engel 2000], wavelet packet approach applied to tool wear [Yan 2005], fast Fourier transform (FFT) based frequency- domain analysis applied to machine monitoring [Yuan 2004], time-series methods applied to machine tool monitoring [Zheng 1992, Djurdjanovic 2002], and statistical data comparison applied to railway bearing diagnostics [National Research Council Canada 1999]. Application of statistical pattern recognition to health monitoring of implantable biological electronic assemblies subjected to shock and vibration environments is a novel application. 3.4 Development of Training Signal The test boards were dropped in their horizontal orientation with a weight attached to its top edge (Figure 3.3). The FPGAs mounted on the test vehicle were powered at the time of drop event. The waveform generated by FPGAs was acquired using high-end DAC card and digital oscilloscopes. Strains were measured using two techniques including digital image correlation in conjunction with ultra-high speed video and strain gages in conjunction with high speed data acquisition systems. Strain gages were mounted at different locations on the test board on both the package and the board side. 35 (a) (b) 36 (c) Figure 3.3: (a) Test vehicle mounted on drop tower. (b) Schematic of high speed imaging in drop testing. (c) Measurement of relative displacement and velocity during impact at point on the board mounted in 0 degree orientation on drop tester. (a) tim e= 0 ms tim e= 2.5 ms tim e= 5.7 mstim e= 4.8 ms 37 (b) (c) tim e= 0 ms tim e= 2.5 ms tim e= 5.7 mstim e= 4.8 ms tim e= 0 ms tim e= 2.5 ms tim e= 5.7 mstim e= 4.8 ms 38 (d) Figure 3.4: 3D contour of strain in longitudinal direction from digital image correlation (DIC) of FPGA Test Board in 0-degree drop orientation at different time intervals of drop event: (a)-0 ms, (b)-2.5 ms, (c)-4.8ms and (d)-5.7ms. Repeatability of drop orientation is critical to measuring a repeatable response and development of training signal for statistical pattern recognition. Small variations in the drop orientation can produce vastly varying transient dynamic board responses. Significant effort was invested in developing a repeatable drop set-up. The FPGAs were powered during the drop testing and data was acquired during the drop event using a high speed data acquisition system at 10 giga samples per second. The drop event was simultaneously monitored with ultra high speed video camera operating at 50,000 frames per second. The cameras have been placed on the rigid floor as shown in Figure 3.3, and make an angle of 25 degrees with each other when facing the speckled test board. Targets were mounted on the edge of the board to allow high speed measurement of relative displacement during drop. The cameras are calibrated before the start of tim e= 0 ms tim e= 2.5 ms tim e= 5.7 mstim e= 4.8 ms 39 the experiment. In addition, optical techniques including digital image correlation and image tracking have been used to quantitatively measure displacements and strains during the drop event. Figure 3.3a show the test vehicle mounted on the drop tester in 0 degree orientation. Figure 3.3b shows the schematic of high speed imaging used for dynamic measurements and Figure 3.3c shows a typical angle, and relative displacement plot measured during the drop event. The position of the vertical line in the plot represents the present location of the board (i.e. just prior to impact in this case) in the plot with ?pos (m)? as the ordinate axis. The plot trace subsequent to the white scan is the relative displacement of the board targets with respect to the specified reference. Figure 3.4a-d shows the full-field strain contours during different time intervals of a drop event. 3.5 Time-Frequency Analysis Transient response of the circuit board assemblies have frequency content that varies over time in the signal. Using a joint time-frequency analysis (JTFA) on such a signal provides the exact behavior of the frequency content and its variation over time. This provides an opportunity to study the energy density of a signal simultaneously in time and frequency and also helps in removing noise and interference from the signal. Techniques studied for health monitoring include, short time Fourier transform (STFT) spectrogram, continuous wavelet transform (CWT), Wigner-Ville distribution, and Cohen class of distribution [Wigner 1932, Ville 1948, Grossmann 1984, Cohen 1995]. The transient strain signal obtained during a drop event contains component signals of different frequency values and can be broken into a number of parts based on its frequency content [Wigner 1932, Ville 1948, Mark 1970]. The Cohen class of transforms applies the approach of computing the time-frequency analysis using a kernel, which is an auxiliary function [Cohen 1989, 1995, Williams 1994]. The 40 cross terms can be reduced by developing kernels that reduce the interference and such kernels are defined as the reduced interference distribution (RID) kernels. In this study the binomial time-frequency kernel proposed by [Jeong 1992a,b] has been applied to study the drop and shock characteristics of an electronic assembly. The binomial time-frequency distribution defined by [Jeong 1992a,b] is, ?? ?????? ???? ????? ???? ?? ????????????? ????? ??? ?????? 4i2 en(fn(f22 )(g(h),n(T F R (1) where ????? g( and (h are the time smoothing window and the frequency smoothing window respectively and )n(f represents the signal where N2,1n ?? . The term ???? , is used to define the RID kernel with the constraint that 0???? . The frequency smoothing window ???g( and the time smoothing window ??(h used here are a hamming window of size(N) as outlined in [Jeong 1991, Jeong 1992a,b, Williams 1994]. (a) 41 (b) Figure 3.5: Time Frequency Distribution for a sample transient strain. (a) 3D view of time- frequency window. (b) Top view of time-frequency window. The time-frequency moments have been used in present study to represent the time- frequency distribution of the transient signals obtained during the shock and drop testing of electronic assemblies. In this study the individual time moments and frequency moments of the signal are computed and used as a feature vector to study the damage progression in electronics in a shock and drop event. The above approach has also been applied to the transient strain response, the transient displacement response, vibration modeshapes and frequencies of the electronic assembly under drop and shock. The time-frequency analysis of the signal provides the frequency content of the transient strain signal at each given time instant. The time-frequency distribution obtained for a JEDEC standard horizontal drop of an electronic assembly is shown in Figure 3.5. The transient strain signal used to obtain the time-frequency signature is obtained from the strain sensors placed on the electronic assembly while performing drop and shock 42 testing. By studying the time-frequency distribution plot of a given strain signal the frequency content of the signal at any given time instant in the drop event can be obtained. The time moment and frequency moment distributions shown are unique to a given signal and represent the strain signals in the joint time-frequency spectrum. (a) (b) M o de - 1 M o de - 2 M o de - 3 M o de - 4 M o de - 1 M o de - 2 M o de - 3 M o de - 4 43 (c) (d) Figure 3.6: Modal Analysis of FPGA Test board (a) Mode-1: 140.46Hz (b) Mode-2: 238.89Hz (c) Mode-3: 293.98 Hz (d) Mode-4: 379.13Hz. The first order moments, in time and in frequency, of a time-frequency energy distribution, tfr(t,f), describe the averaged positions and spreads in time and in frequency of the signal. The time moment represents an estimation of instantaneous frequency at a given time M o de - 1 M o de - 2 M o de - 3 M o de - 4 M o de - 1 M o de - 2 M o de - 3 M o de - 4 44 instant during the drop event [Boashash 1989, Cohen 1995, Tacer 1995]. The frequency moment represents an estimation of the group delay of the signal for each frequency in the signal [Cohen 1995, Tacer 1996, Georgopoulos 1997]. As the time moment and frequency moment feature vectors are unique for each signal they are an appropriate choice for prognostics of electronic assemblies in drop and shock. ?? ??? ? ??? df)f,t(tfr df)f,t(tfrf)t(f m (2) ?? ??? ? ??? dt)f,t(tfr dt)f,t(tfrt)f(t m (3) where, tm is the first frequency moment, and fm is the first time moment of the signal. The frequency content of the strain signal obtained shows the effective contribution of the natural frequencies of vibration of the board and has been studied based on strain sensor location. The modal analysis of the plate has been performed using finite element models. The natural mode shapes that occur at the natural frequencies of vibration of the board have been obtained and are shown in Figure 3.6. 3.6 Wavelet Packet Energy Wavelets have been used in wide range of applications such as data and image processing [Martin 2001], geophysics [Kumar 1994], power signal studies [Santoso 1996], meteorological studies [Lau 1995], speech recognition [Favero 1994], medicine [Akay 1997], and motor vibration [Fu 2003, Yen 1999]. A wavelet transform is defined by dts ut)t(fs1,f)s,u(Wf *s,u ?????? ????? ????? (4) 45 where the base atom ?* is the complex conjugate of the wavelet function which is a zero average function, centered around zero with a finite energy. ?s? and ?u? represent the scale and translation factors which are used to decompose function f(t) into a set of basis functions called the wavelets. The transform has been used to analyze transient strain signals at different frequency bands with different resolutions by decomposing the transient signal into a coarse approximation and detail information. The signal is decimated into different frequency bands by successively filtering the time domain signal using low-pass and high-pass filters. The original stress signal is first passed through a half-band high-pass filter g[n] and a low-pass filter h[n]. After the filtering, half of the samples are eliminated according to the Nyquist?s rule, since the signal now has a highest frequency of p/2 radians instead of p. The signal is therefore sub-sampled by 2, simply by discarding every other sample. This constitutes one level of decomposition and can mathematically be expressed as follows: ? ? ??? ??? nl o w nh i g h ]nk2[h]n[s ig n a l]k[y ]nk2[g]n[s ig n a l]k[y (5) where yhigh[k] and ylow[k] are the outputs of the high-pass and low-pass filters, respectively, after sub-sampling by 2. The compression and de-noising in the wavelet packet transform is same as those for a wavelet transform framework. The only difference is that wavelet packets offer a more complex and flexible analysis, because in wavelet packet analysis, the details as well as the approximations are split. An entropy-based criterion is used to select the most suitable decomposition of a given signal. This implies that at each node of the decomposition tree, the information gained by performing a split is quantified. Simple and efficient algorithms exist for both wavelet packet 46 decomposition and optimal decomposition selection. Adaptive filtering algorithms, allow the wavelet packet transform to include the "Best Level" and "Best Tree" features that optimize the decomposition both globally and with respect to each node. For obtaining the optimal tree, a node is split into two nodes, if and only if the sum of entropy of the two nodes is lower than the sum of entropy of the initial node. After the wavelet packet transform, the wavelet packet energy is calculated at each node of the decomposition tree. An energy signature nE for each sequence of wavelet packet coefficients pk,nC , for 1p4.......2,1,0n ?? can be computed by using the formula ??? N 1k 2pn2n CN1E (6) where N is the total number of points in the signal at a given node in the wavelet packet tree, p is the decomposition depth, and Ci is the wavelet packet coefficients obtained during the wavelet packet transform at the particular node where energy is being calculated. The feature vector of length 1p4? , is formed for the signal. The packet energies obtained from the wavelet packet decomposition of the various mode shapes and frequencies of vibration of the electronic assembly are the basis for the computation of confidence values for health monitoring. The strain signal obtained from sensors placed on the electronic assembly is used to obtain the wavelet packet energy signature. 3.7 Mahalonobis Distance Mahalanobis distance is a multi-variate technique. It is also called quadratic distance [Johnson 2007]. If a multivariate data set consists of vectors ? ?n4321 x,x,x,x,xx ?? with means ? ?n4321 ,,,, ??????? ? then the distance of each vector from the mean vector of the data set is given by 47 ? ? ? ??????? ? xx)x(D 1TM (7) In a more generalized sense the quadratic distance between two vector ?X? and ?Y? is given by, ? ? ? ?yxyx)y,x(d 1T ?????? ???? ? (8) where? is the covariance of the population from which X and Y are randomly selected. It can also be interpreted as the dissimilarity between X and Y randomly selected from a population. In this work, Mahalanobis distance is used from measure of similarity between pristine feature vectors and feature vectors with some accrued damage in time. Mahalanobis distance takes into account the covariance?s and variance of the data set instead of the average values. This measure of distances forms the basis for confidence value computation. 3.8 Auto-Regressive Technique Auto-regressive moving average model has been developed for parametric spectral estimation of spectral content of a transient strain time series. The transient signal has been obtained from the test vehicle under shock loads using optical measurement techniques including digital image correlation, transient strain from strain gages, and from the FPGA sense circuits on the test board. The change of patterns in frequency contents of the signal in healthy and unhealthy states have been estimated with the ARMA model. The evolving textures of frequency have been quantified by application of statistical pattern recognition, to monitor damage level in the test vehicle. There is high correlation in the signal obtained from the test vehicle under repeated drop events. The Fourier transform of signal gives power spectral density from auto- correlation sequence of the signal. The Fourier transform approach is a non-parametric estimation technique. In parametric estimation techniques such as ARMA models, the time series 48 is not a function of auto correlation sequence. Instead the signal (time series) is a function of model parameters, which is used for estimation of power spectral density. Such estimation of spectrum is driven by a white noise which gives the model a dynamic nature. This noise drives the system forward [Brockwell 1996, Chatfield, 1980, DeHoon 1996, Marple 1987, Rust 2005]. The ARMA model is given by, ? ? ? ? ? ? ? ? ? ??? ?? ???? q 0kp 1k knykbknxkan'y (9) The above equation represents a general linear prediction equation where a forthcoming sequence value (output value) is written as a linear combination of previous known input [x(n)] and output [y(n)] values. Here ?a? and ?b? are the prediction coefficients. The time series model of y(n) represented by the above equation is an ?autoregressive and moving average (ARMA)? model. Moving average portion is formed by a[k] parameters and b[k] forms the autoregressive portion. When a[k] parameters are zero, the output depends completely on previous output values, and the equation reduces to, ? ? ? ? ? ??? ??? q 0k knykbn'y (10) In this work, the auto-regressive model has been used to study the spectral content of the transient strain histories. The prediction coefficients of the input terms vanish for a pure auto- regressive process. The prediction error of the signal is defined as difference between actual output and predicted output. Figure 3.7 represents the plot of estimated and original strain histories of the test vehicle. 49 Figure 3.7: Original transient strain history and the estimate of strain history from the autoregressive and moving average model. The error is given by, ? ? ? ? ? ?n'ynyne ?? (11) which can be written as, ? ? ? ? ? ? ? ??? ??? m 1k knykbnyne (12) The prediction error represents a linear prediction filter, whose coefficients b(k) are predictor coefficients and e(n) is noise in the model. Two parametric approaches have been used to estimate power spectral density by AR models including the Yule-Walker approach and the maximum entropy approach by Burg [Kay 1988]. The power spectral density of the auto- regressive model is given by, 2p 1j j wAR )tjif2e x p (a1 )f(P ????? ?? ?? t21ft21for ????? (13) where ?w is an adjustable parameter that can be estimated along with a1, a2, ????, a p by solving the (p+1) x (p+1) linear system of equations. E s t i m a t e d a n d O r i g i n a l S t r a i n H i s t o r i e s -6 0 0 -4 0 0 -2 0 0 0 200 400 -0 . 0 0 2 0 0 . 0 0 2 0 . 0 0 4 0 . 0 0 6 0 . 0 0 8 T i m e (s e c ) T ra n s ie n t Str a in (m ic ro s tr a in s ) O ri g i n a l W a v e f o rm Est i ma t e d W a v e f o rm 50 ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ???? ???? ???? ???? ?? ?? ??? ??? 0 ... 0 0 a ... a a 1 ... ............... ... ... ... w p 2 1 02p1pp 2p012 1p101 p210 (14) The ?-values in the equation are autocorrelations, i.e. is the correlation of a signal with itself. The autocorrelation of the time series or a process is simply the correlation of the process against a time-shifted version of itself, given by ? ? ? ? ? ? ?????? ?????? ?? ????? dttxt*x21lim (15) where x* is a complex conjugate of x(t). The Burg maximum entropy approach is often used when peaks are closely spaced in the spectrum. The spectrum of a drop event often has closely spaced peaks. The test vehicle subjected to repeated drop events consists of a wide frequency range. In this approach, the known autocorrelation sequence of the time series (strain history), is extrapolated to estimate autocorrelation sequence at unknown lags 0, ?t, 2?t,?,p?t. The extrapolation is such that entropy rate of the signal is maximized which makes it random in nature. The entropy rate of a Gaussian process is given by, ? ? ? ?? ??? ?? ? t2 1 t2 1 dffPln)f(Pb (16) where P(f) is the power spectral density of the signal given by, ???? ??????? d)if2e x p ()()f(P (17) Constraints are imposed at lags 0, ?t, 2?t,?,p?t, and then the set that maximizes the entropy rate out of all (p+1) non-negative functions P(f) is chosen. 51 3.9 Results of Damage Detection in Error Seeded Models: Correlation of Underlying Damage Explicit finite element models have been developed for the FPGA test-board in the JEDEC 0?-degree drop orientation. One package location has been modeled with 1156 interconnects, while the other package locations have been modeled with smeared properties (Figure 3.8). The package location with the detailed solder interconnects has been switched in turn for each FPGA. Figure 3.8: JEDEC drop orientation of FPGA test board. Figure 3.9: Correlation between transient strains from model predictions and digital image correlation. -300 -250 -200 -150 -100 -50 0 50 100 150 200 -0.005 0 0.005 0.01 Tim e (seco nd s) Tran sient Strain (Micros train) Model Predic tions Experime nt (DIC) 52 Various competing failure modes have been modeled on the detailed package and strain histories retrieved for studying degradation in confidence values. Failure modes studied include, solder interconnect failure, solder interconnect fracture, chip de-lamination and chip fracture taking place due to transient bend of PCB and mechanical shock during drop event. The board has been modeled using reduced integration conventional shell element i.e. S4R. The solder interconnects have been modeled using Timoshenko beam elements (B31). Various layers of the package including copper pad, mold compound, die, and package substrate which have been modeled using C3D8R elements. The floor of impact is modeled using R3D4 element and a weight is attached to the board. Figure 3.8 shows the board in zero-degree JEDEC configuration. Potential faults encountered in the test vehicle during drop event have been simulated in the model by error-seeding the assembly, and physical damage quantified in conjunction with statistical pattern recognition. The response of the healthy electronic assemblies has been correlated with transient strain measurements from digital image correlation in conjunction with high speed imaging. Figure 3.9 indicates that the model predictions correlate well with experimental measurements in both amplitude and phase. Also, the validated model has been used to investigate sensitivity of the leading indicators to underlying damage. The models have been error-seeded to incorporate specific failure modes and damage magnitudes. Solder Interconnect Damage The solder balls during the drop event accumulate damage and progress to failure. The explicit finite element model for the free drop has been analyzed in several configurations including, all solder beams intact, and the various corner solder beams damaged (cracked) and failed. The statistical pattern recognition methods described in this study have been applied to 53 the time history output of the strain signal obtained at the PCB surface below the center of the package, where the sensor would have been mounted in an experimental setup. The solder beam array in the failure simulations for solder ball failure is shown in Figure 3.10 and the various solder beams missing have been marked and shown for the models developed. Repeated shock impact of the board assembly may cause damage initiation and progression in solder balls leading to complete failure. The failure of corner solder balls has been simulated by removing the corner interconnects as the corner solder balls have the most stress concentration and hence are mostly the first to fail in a solder array. The cracking of the solder ball has been simulated by reducing the cross-sectional area of the corner solder beams and the model has been simulated for up to all four corner balls damaged, for both vertical and horizontal drop. Figure 3.10: Solder interconnect completely failed. ( a ) On e I n te r c onn e c t M is si ng ( b) Two I nt e r c onn e c ts Mi ss ing ( c ) Thr e e I nt e r c onn e c ts Mi ss ing ( d) F our I nte r c onne c ts Mi ss ing 54 Figure 3.11: Confidence value for solder interconnect damage. Figure 3.12: Confidence values for solder interconnect crack. Transient strain histories have been obtained for the drop events from elements at the center of the package on top of the mold compound, in addition to the printed circuit board. In the experimental setup, the optical strain measurements and strain sensor measurements have been obtained at the center of the package location on the board, as well as on the mold 0 0.2 0.4 0.6 0.8 1 1.2 0 1 2 3 4 Number of I nterco nne cts F aile d Confid enc e Valu e Wavelet Mahal onobi s FFT RID Time RID Freq AR_yul e AR_bu rg 0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1 0 1 2 3 4 Number of I nterco nne cts Crac ked Confid enc e Valu e Wavelet Mahal onobi s FFT RID Freq RID Time AR_yule AR_burg 55 compound. Statistical pattern recognition has been used to analyze the strain histories and degradation in confidence values. The confidence charts for solder ball failure and solder ball cracking are shown in Figure 3.11 and Figure 3.12. Chip Fracture The model has also been modified to represent the cracking of the silicon chip due to mechanical shock impact of the electronic assembly. The cracked surface on the chip is represented by detaching the chip and creating a contact surface representing the chip fracture between two parts of the detached chip. The contact surfaces present in the middle of the chip represent a crack. The chip fracture mode of failure is shown in Figure 3.13. Figure 3.13: Simulation of chip fracture in FPGA package. 56 Figure 3.14: Confidence chart for chip crack. Statistical pattern recognition has been used to analyze the transient strain history obtained at center of the package on top of the mold compound and the printed circuit board. Data has been extracted using digital image correlation data and strain gages in conjunction with high speed imaging and high speed data acquisition. The confidence value obtained for the JEDEC horizontal drop orientation has been plotted in Figure 3.14. Data indicates the expected degradation in confidence value with the fracture of the package in the assembly. Chip De-lamination Shock and drop of an assembly can also cause de-lamination between the chip and the substrate, thus causing failure in the assembly. The de-lamination is modeled by detaching part of the substrate from the chip. A contact surface is then created to represent the delaminated surface between the substrate and the chip attach. 0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1 Wavelet Mahal onob is FFT RID Time RID Freq AR_yule AR_B urg Con fidence Va lue Heal thy Unhe althy 57 Figure 3.15: Simulation of chip delamination. Figure 3.16: Confidence chart for chip delamination. The delaminated chip modeled by the contact surface between the chip and the substrate has been shown in Figure 3.15. Statistical pattern recognition has been used to analyze the transient strain histories obtained from the center of the package and center of the printed circuit 0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1 Wavelet Mah alon obis FFT RID Time RID Fre q AR_yule AR_Burg Confidence Value Heal thy Unhe althy 58 board at the location of each package. Strain histories have been captured using digital image correlation and strain gages in conjunction with high speed imaging and high speed data acquisition. The degradation in the confident values due to chip delamination has been shown in Figure 3.16. 3.10 Prediction of Damage Evolution and Damage Trends In this section, the ARMA model in conjunction with JTFA, and wavelet packet energy decomposition has been used to predict the progression of the leading indicators with progression of underlying damage. The progression of the various parameters of the feature vector including peak transient strain amplitude, mode-1 power spectral density, and wavelet packet energy density evolution has been measured with damage progression. Specifically, the evolution of the feature vector parameters has been predicted versus shock events. The predictions have been presented based on both the Yule?Walker approach and the Burg maximum entropy approach. The correlation between the ARMA model predicted and measured trends is shown in Figure 3.17 and Figure 3.18. The measured and ARMA prediction of mode-1 power spectral density exhibits a decrease in the magnitude with the progression of shock events. This is expected with the failure of second level interconnects, as more energy is now distributed to the higher frequencies and mode shapes. The measured and ARMA prediction of wavelet packet energy density exhibits a decrease in magnitude with the progression of shock events. This may be expected because of the failure of one or more second level interconnects, which may cause a reduction in transmitted strain during transient out-of-plane deformation in shock events. In each case, there is good correlation between the expected and measured progression of the feature vector parameters. 59 Figure 3.17: Correlation between the measured and autoregressive model prediction of mode-1 Figure 3.18: Correlation between the measured and autoregressive model prediction of wavelet packet energy. 0 20 40 60 80 100 120 140 -0.05 -0.04 -0.03 -0.02 -0.01 0 0.01 0.02 0.03 0.04 D r o p N u m b e r P o w e r S p e c t r a l D e n s i t y Ex pe rim e ntal Y ule Burg LPC Ex p-tre ndline y ule -tre ndline burg-tre ndline lpc-tre ndline 0 20 40 60 80 100 120 140 0 5 10 15 20 25 30 35 40 45 50 D r o p N u m b e r W a v e l e t P a c k e t E n e r g y E x p e r i m e n t a l Y u l e B u r g L P C E x p - t r e n d l i n e y u l e - t r e n d l i n e b u r g - t r e n d l i n e l p c - t r e n d l i n e 60 3.11 Solder Joint Built in Self-Test (SJ-BIST) Figure 3.19 and Figure 3.20 show the circuit incorporated in the chip of the 1156 package. It consists of a two logic circuits including a read and write circuit. The circuit behaves like a RC circuit across the solder interconnect. The output of the circuit is connected to a capacitor. Figure 3.19: FPGA internal network for fault detection in the solder interconnect. The PGA writes a logical ?1? to charge the capacitor and then reads the voltage across the charged capacitor. If the solder-joint network is undamaged, the write causes the capacitor to be fully charged and a logical ?1? is read by the data acquisition circuits. When the solder-joint network is sufficiently damaged (R > 100 Ohm), the RC time constant becomes large, the capacitor is insufficiently charged, a logical ?0? instead of a logical ?1? is read by the data- acquisition circuits, and a fault is reported. 61 Figure 3.20: FPGA fault detection process in solder interconnects. 3.11.1 PSPICE Simulation In this simulation the functionality of SJ-BIST has been demonstrated. Figure 3.21 shows a RC circuit which has been used to simulate fault detection by SJ-BIST. In a real FPGA there are two different solder joint pins which write and read from a single capacitor alternately. Figure 3.21: Functionality of SJ-BIST by an RC circuit. 62 (a) (b) (c) T im e ( 1 Div= 0 . 5 ? V ) V ( C5: + ) 0V 4 .0 V - 2 .0 V 6 .0 V T im e ( 1 Div= 0 . 5 ? V ) V ( C5: + ) 0V 4 .0 V - 2 .0 V 7 .0 V T im e ( 1 Div= 0 . 5 ? V ) V ( C5: + ) 0V 4 .0 V - 2 .0 V 7 .0 V T im e ( 1 Div= 0 . 5 ? V ) V ( C5 :+ ) 0V 2 .5 V 5 .0 V a) R<1 O hm b) R=1 O hm a) R=10 O hm b) R=100 O hm T im e ( 1 Div= 0 . 5 ? V ) V ( C5: + ) 0V 4 .0 V - 2 .0 V 6 .0 V T im e ( 1 Div= 0 . 5 ? V ) V ( C5: + ) 0V 4 .0 V - 2 .0 V 7 .0 V T im e ( 1 Div= 0 . 5 ? V ) V ( C5: + ) 0V 4 .0 V - 2 .0 V 7 .0 V T im e ( 1 Div= 0 . 5 ? V ) V ( C5 :+ ) 0V 2 .5 V 5 .0 V a) R<1 O hm b) R=1 O hm a) R=10 O hm b) R=100 O hm T im e ( 1 Div= 0 . 5 ? V ) V ( C5: + ) 0V 4 .0 V - 2 .0 V 6 .0 V T im e ( 1 Div= 0 . 5 ? V ) V ( C5: + ) 0V 4 .0 V - 2 .0 V 7 .0 V T im e ( 1 Div= 0 . 5 ? V ) V ( C5: + ) 0V 4 .0 V - 2 .0 V 7 .0 V T im e ( 1 Div= 0 . 5 ? V ) V ( C5 :+ ) 0V 2 .5 V 5 .0 V a) R<1 O hm b) R=1 O hm a) R=10 O hm b) R=100 O hm 63 (d) Figure 3.22: Waveform in 1? capacitor for various defects. (a) R< 1 ohm, (b) R= 1 ohm, (c) R= 10 ohm, (d) R=100 ohm In the PSPICE simulation (Figure 3.21), only 1 pin has been used to show the healthy and unhealthy state of the solder interconnect. A 5V voltage has been defined as a logic-state ?1? and the logic-state of ?0? has been defined as voltage below 3 V. rom Figure 3.22, it is clear that when the solder joint resistance becomes greater than 100 ohm, the voltage across the capacitor falls to about 2.5 V. Hence the digital logic reads it as ?0? instead of ?1? which is a state of fault defined in the logic built in FPGA. 3.11.2 Experimental Validation Statistical pattern recognition algorithms have been used to analyze the healthy state as well as the damaged states of the test board. Transient high speed data has been acquired including the waveform written by the FPGA to charge the capacitor and the transient full-field strain data gathered using digital image correlation. T im e ( 1 Div= 0 . 5 ? V ) V ( C5: + ) 0V 4 .0 V - 2 .0 V 6 .0 V T im e ( 1 Div= 0 . 5 ? V ) V ( C5: + ) 0V 4 .0 V - 2 .0 V 7 .0 V T im e ( 1 Div= 0 . 5 ? V ) V ( C5: + ) 0V 4 .0 V - 2 .0 V 7 .0 V T im e ( 1 Div= 0 . 5 ? V ) V ( C5 :+ ) 0V 2 .5 V 5 .0 V a) R<1 O hm b) R=1 O hm a) R=10 O hm b) R=100 O hm 64 Figure 3.23: Waveform from healthy FPGA Figure 3.24: Waveform from Faulty FPGA. Figure 3.25: Confidence value plot for repeatability of FPGAs Waveform. Confid enc e Plot of Re pea tibil ity 0 0.2 0.4 0.6 0.8 1 1.2 1 21 41 61 Shock Even t CV wavel et mahal onobi s distance FFT Time Moment Frequency Mome nt AR_yul e AR_bu rg 65 Figure 3.26: Confidence value plot for repeatability of FPGAs transient strain from optical imaging. Figure 3.23 shows the waveform from the FPGA when the package is in a healthy state. If the solder interconnect has little or no damage, indicated by low resistance, then FPGA writes a ?1? and the output waveform read by the PGA is nearly identical to the original waveform. Latent damage in the solder interconnect, significantly prior to failure is indicated by distortion of the waveform read across the read-pin of the FPGA, indicating an unhealthy state of solder interconnects. Figure 3.24 shows the waveform from an unhealthy FPGA. The voltage for healthy solder interconnects is in the neighborhood of 2.5V, while that for unhealthy solder interconnects has dropped to 1V. Repea tabi lity Plot fo r DIC 0 0.2 0.4 0.6 0.8 1 1.2 1 3 5 Shock Even t Confid enc e Valu e Wavelet Packet Mahalonobis FFT Time Moment Frequency Moment AR_yule AR_burg 66 Figure 3.27: Confidence plot for FPGA's when subjected to JEDEC drop. Similarity and dissimilarity of waveforms has been compared to identify the underlying damage in the solder interconnects. Techniques used include, autoregressive moving average models, joint time-frequency analysis, fast Fourier transforms, Mahalanobis distance, and wavelet packet energy decomposition. Figure 3.25 and Figure 3.26 show the confidence values for repeatable drops in undamaged assemblies based on FPGA input waveform and the optically measured transient strain waveform. Analysis indicates a high confidence value that the assembly is healthy. The analysis has been repeated for assemblies which have been tested to failure. Degradation in the confidence values correlates with impending system failure under dynamic loads (Figure 3.27). 3.12 Summary In this chapter, a new methodology for continuous health monitoring of system-level damage has been developed for electronic systems. The techniques presented in this chapter can be implemented on wide array of electronic applications such as automobile, avionics, household Con fidenc e Value Plot of Dr op Data of FPGA 0 0.2 0.4 0.6 0.8 1 1.2 1 21 41 61 Shock Even t CV Wavelet Mahal onobi ls Distance FFT Time Moment Frequency Mome nt AR_Yul e AR_bu rg 67 electronic appliances, portable electronics (cell phones, laptops etc)and in implantable biological electronic systems such as pacemakers and defibrillators. The approach is based on monitoring critical solder interconnects, and sensing the change in test-signal characteristics prior to failure, in addition to monitoring the transient strain characteristics optically using digital image correlation and strain gages. The methodology is based on a combination of statistical pattern recognition techniques in conjunction with the high speed imaging, and digital image correlation. Leading indicators of failure have been developed for damage initiation and progression in electronic assemblies under shock loads. Leading indicators investigated include, wavelet packet energy feature vector, auto-regressive spectrum from Yule-Walker equations, and Burg equations, Mahalanobis distance of time-vector, time moment, and frequency moments of the transient strain signal and test waveform. Explicit finite element models have been developed for the electronic assemblies. The model predictions of transient strain have been correlated with experimental data from high-speed imaging in conjunction with digital image correlation and strain gages. The validated model has been error-seeded to correlate the degradation in confidence values with the underlying damage. In addition, analysis of the experimentally measured transient strains and FPGA test waveforms has been performed to determine the correlation with damage initiation and progression. The change in leading indicators shown by change in the confidence values correlates with the accrual of latent damage in the solder interconnects. 68 4 Chapter-4 Stage II of Prognostics and Health Monitoring: Fault Mode Classification and Isolation 4.1 Data Organization In this chapter, the problem of fault mode classification in electronic assemblies under mechanical shock is dealt. Fault isolation is performed based on the feature vectors derived from time-frequency analysis of transient strain histories obtained from shock events. The decision framework developed for prognostics and health monitoring of electronics is a feature vector based approach, where a continuous stream of data in the form of strain data (time domain) is taken as input. This chapter discusses the organization of the data sets gathered and processed in order to perform fault mode classification in test assemblies under drop and shock. The data sets used for fault mode classification are multidimensional and processed in a multivariate frame work. A typical multivariate rectangular data set is represented by, nxmnM2n1n M44241 M33231 M22221 M11211 x..xx ..... ..... x..xx x..xx x..xx x..xx ]x[ ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? (1) where [X] has n-objects and m-variables. The numbers of variables determine the dimensionality of the data set. Since m>1, hence the data set is high-dimensional in nature. 69 4.2 Benchmarking Data Set The techniques developed for studying damage initiation and progression along with fault mode classification for electronics under mechanical shock and drop impact are benchmarked on a base data set. The base data set used for benchmarking is called IRIS flower data [Fisher 1936]. IRIS data set is a multivariate data set which consists of 3 classes of 50 objects/instances each. The data set consist of 3 species of IRIS flowers i.e. Iris setosa, Iris virginica and Iris versicolor. The data set consist of 4 variables which are sepal length, sepal width, petal length and petal width. The data set is 150 by 4 in size which means 150 observations which are to be classified and 4 variables. Hence the dimensionality of the data set is 4. The objective of benchmarking Karhunen?Lo?ve transform, Sammon?s mapping and self organized mapping on IRIS data set is to illustrate, how classification is performed in this research work. The 4 dimensional IRIS data set has only three classes (3 species of flowers), hence it is easier to understand. The drop data sets procured from finite element simulations and experimentation on the electronic assemblies are of significantly higher dimension than IRIS data set. Hence implementation of Karhunen? Lo?ve transform, Sammon?s mapping and self organized mapping is far more complicated as well as expensive. A general layout of the IRIS data set is given in following equation, 4150 ..... 2.34.10.77.4 ..... ..... 3.35.23.60.6 ..... 5.32.01.54.1 ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? v e r s i c ol or v i r gi ni c s e t os a s e pal Wpe t al Ws e pal Lpe t al Ls pe c i e (2) where, variables in IRIS data sets are 70 petalL = Petal Length sepal = Sepal Length petalW = Petal Width sepalW = Sepal Width 4.3 Organization of Data for Prognostics and Health Monitoring of Electronics The research work focuses on development and implementation of techniques for health monitoring of electronics under drop and shock. Two data sets are procured i.e. an experimental data set and a simulation data set. The test assemblies are subjected to drop testing, and strain histories at strategic points on board as well as on the package are extracted. The simulation data sets are procured by performing finite element simulations of the test assemblies used. The idea is to isolate initiation and progression of any fault occurring in the electronic packages at component level. A general data set for electronics used in present study is given by following equation, ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? M n M nn n M M tttT i m e S c a l e s t rs t rs t rS h o c k s t rs t rs t rS h o c k s t rs t rs t rS h o c k X ... ... ....... ... ... ][ 21 21 22 2 2 12 11 2 1 11 (3) Each row of this equation represents an object, and each column represents a variable. Since this is a feature vector based approach, the time domain data extracted from drop testing in experimental data and the simulation data are processed in different domains. The above equation shows the orientation of the raw time domain strain data in a matrix form. If it is a spectral domain, then the data matrix will consist of power spectral density at different frequencies. This is given by, 71 ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? M n M nn n M M fbfbfbF r e q B i n p s dp s dp s dS h o c k p s dp s dp s dS h o c k p s dp s dp s dS h o c k X ... ... ....... ... ... ][ 21 21 22 2 2 12 11 2 1 11 (4) Similarly if it is a joint time-frequency analysis feature space then the matrix will consist of frequency moments at different frequencies (columns). This is given by, ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? M n M nn n M M fbfbfbF r e q B i n fmfmfmS h o c k fmfmfmS h o c k fmfmfmS h o c k X ... ... ....... ... ... ][ 21 21 22 2 2 12 11 2 1 11 (5) For wavelet domain the matrix will consist of wavelet packet energy [Lall 2006] in the matrix, at different packet numbers (columns). This is given by, ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? M n M nn n M M pppP a c k e t N o wpewpewpeS h o c k wpewpewpeS h o c k wpewpewpeS h o c k X ... ... ....... ... ... ][ 21 21 22 2 2 12 11 2 1 11 (6) The rows of the matrix are always the shock events which are to be classified, irrespective of the domain. 4.4 Fundamental Approach to Classification The prime focus is on development of a fault mode classification module for electronics under drop and shock. The emphasis is on strain based techniques which can address damage initiation, damage progression and isolate different dominant failure modes and there location. 72 The techniques developed in present work are and component level, but they are also scalable to system level reliability. The module is a feature vector based approach which exploits evolution of variance in the pre-failure space. Fault mode classification falls in second stage of prognostics and health monitoring. The isolation of different failure modes and identification of their location in the test assembly is dealt as classification problem. Figure 4.1 represents schematic of the approach taken to solve the problem of identification of different failure modes in the test assemblies under drop impact. Firstly, two data sets are gathered i.e. simulation data set and experimental data set. Simulation data sets are procured by error-seeding different test assemblies manually using explicit finite elements. Hence it is known ahead of time which fault mode is present in which shock event in the simulation data set. Experimental data set is gathered by drop testing of the test vehicles under consideration. Strain histories are acquired using high speed data acquisition system along with high speed imaging in conjunction with digital image correlation. The two data sets (experiment and simulation) are treated as multivariate data sets with high dimensionality as shown in Figure 4.2. They consist of time domain strain data as indicated in Figure 4.1. The objective of fault mode classification is to identify what failure modes are occurring in the test assemblies i.e., to classify different classes (fault modes) in the experimental data sets. A divide-and-conquer methodology (Figure 4.1) is developed for fault mode classification. Since a feature vector based approach is adopted in this work, the time domain data is processed in different domains such as spectral, time-frequency and wavelet domain for extraction of relevant variance (information) in the data sets. Once relevant features are extracted, various pattern recognition algorithms are used to identify different clusters (fault 73 modes) in the data sets. Different algorithms can have different levels of success in classifying different classes in these data sets. The idea to implement these schemes is to minimize variance within each class and maximize variance between different classes. If this is achieved then different clusters can be viewed in a lower dimensional space, which cannot be viewed in a high dimensional space. Various schemes have been implemented for clustering such as Karhunen Loeve transform, Sammon?s mapping, self organized mapping and supervised neural networks. Figure 4.2 represents a schematic of the process used for classification. Once the data sets are procured, the feature extraction is performed. These features are organized in rectangular data sets in a multivariate orientation. Implementing pattern recognition schemes, de-correlates and facilitates the visualization of these high dimensional data sets into a lower dimensional space with various classes (fault modes) present in them. A complete solution of the classification problem is presented. Isolation of center of gravity of each class and its separation bounds in the feature space is shown. Figure 4.1 : Schematic of the approach implemented for fault mode classification. n m1 k m2 >> >> >> Dat a Space Feature Spac e Cluster/Cla ss Di mensi onality Red ucti on D r o p T e s ti n g S tr a i n D a ta (T i m e D o m a i n ) F e a tu r e S p a c e ? F r e q e u n c y D o m a i n ? Ti m e - F r e q u e n c y D o m a i n C l u s te r i n g / D e - c o r r e l a ti o n o f F e a tu r e S p a c e b y A l g o r i th m s o f P a tte r n R e c o g n i ti o n / D a ta M i n i n g D a ta O r g a n i z a ti o n : C l a s s i fi c a ti o n M a tr i x 74 During drop and shock, it is difficult to know which failure mode/modes are occurring in the test assemblies when subjected to repeated drops in time. Cross-sections of packages after frequent intervals will cause permanent damage in the packages. Hence cross-sections are possible once the packages have failed based on traditional definition of failure i.e. opening of daisy chain resistance. For this reason, the simulation data sets are formed by explicit finite element modeling. Since simulation of various failure modes are performed exclusively by manual error-seeding, hence it is known as to which shock event (region) in the simulation feature space belongs to which failure mode. Hence for identification of the region in the experimental feature space, simulation feature space is overlapped on experimental feature space (Figure 4.2). This enables fault isolation in the feature space. Figure 4.2: Process describing fault mode classification in test assemblies under shock. Different electronic systems and subsystem have different designs, and packaging architectures. Hence a platform of techniques is developed. These techniques can have varying Da ta Acq uisit io n Fea ture Ex tra ctio n Clus ter ing & De - c o rr ela tio n By Sa m m o n ? s Map Da ta Org a niza tio n Cla ss if ica t io n M a t rix Ex p eri me nta l (Dro p T estin g) Simu la ti on (Dro p Ph e no m en a) TFR An aly sis ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? nM2n1n M44241 M33231 M22221 M11211 x..xx ..... ..... x..xx x..xx x..xx x..xx ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? 21 4241 3231 2221 1211 .. .. nn yy yy yy yy yy Si m u la tio n f ea tu r e sp ace Exp eri m en t f e atu r e sp ace O v e rla p of Fea ture Space Pat t er n - 1 Pat t er n - 2 Pat t er n - n Pr i s t i n e Ch i p Crac k i n g Ch i p D el am i n at i o n So l d e r Crac k i n g Si m ula t io n Spa ce, Guides Id en ti fi ca tio n of Dif fer ent reg io ns b elo ng ing to ea ch Fa ilure Mod e JEDEC Drop Simul ation Da ta Matr ix (Manual Err or See di ng ) Ex perim ent D ata Matrix 75 rate of success in classifying different fault modes depending on the degree of complexity of the systems. The data sets gathered can have different structures of variances and co-variances (homogenous and non-homogenous), hence development of a more than one technique and implementation of various techniques in combination with each other fetch good results. 4.5 Test Vehicles Following test vehicles are used for development of fault classification and isolation module. The specification of the test vehicles is as follows. 4.5.1 Test Vehicle-A: FPGA Test Board The test assembly explained in this section was provided by Center for Advanced Vehicle and Extreme Environment Electronics (CAVE-3) sponsors. The test vehicle is a multilayer FR4 (fiberglass reinforced epoxy laminates which are flame retardant) printed circuit board with four 1156 interconnects (I/O) field programmable gate array packages (FPGAs). The packages are fully functional and not daisy-chained devices. The field programmable gate array (FPGA) test board is connected to a LabView data-acquisition system through a NI 6541 Digital generator and CB 2162 connector board to collect the digital data. 76 (a) (b) Figure 4.3: Test Board-A: 1156 FPGA (a) 35 x 35 mm with 34 x 34 solder array. (b) Area Array interconnect configuration. 77 The set-up enables each FPGA packages to write a square-pulse across the solder interconnects, charge and capacitor and read the square-pulse back from the second pair of second-level interconnects. Figure 4.3a shows the location of FPGA solder interconnects being tested for detection of damage initiation and propagation. The solder interconnects being tested have been strategically selected based on the location of failure under thermo-mechanical loads and shock, and vibration loads. Area-array packages often fail in the die-shadow area under thermo-mechanical loads, while the corner interconnects fail under shock loads. Figure 4.3b shows the interconnect array configuration of the 1156 I/O count on FPGA package. The package is 35 x 35 mm in size, and has a full-array of solder interconnects in a 34 x 34 array configuration at 1 mm pitch. The packages have Sn3Ag0.5Cu solder interconnects Figure 4.4: Test vehicle-A (4-FPGA test board assembly). Table 4.1 summarizes attributes of FPGA test board (TV-A). The test board has mounting holes at the board corners to enable mounting of test board in the JEDEC configuration (Figure 4.4). Package substrate is multi-layer glass-epoxy substrate with solder-mask defined 78 package-side pads. The die is 0.3 mm thick with in-plane dimensions 23 mm x 21 mm. Solder interconnects are 0.6 m in diameter. The pads are solder mask defined 0.46 mm diameter. The package substrate is 0.56 mm thick, 4-layer FR4. Table 4.1: Attributes of FPGA Test Board. TV-A. Package FG1156 Size 35x35 I/O 1156 Pitch 1.00 Ball/Column Size 0.60 Pad Opening 0.46 Pad Type SMD Die Size 23x21x0.3 Substrate 0.56Thick, 4-layer 4.5.2 Test Vehicle-B: TABGA Test Board Test board-B explained in this section in provided by Center for Advanced Vehicle and Extreme Environment Electronics (CAVE-3) sponsors. The test board-B has mounting holes at the board corners to enable board test in the JEDEC configuration (Figure 4.5). Package substrate is multi-layer glass-epoxy with solder-mask defined package-side pads. The die is 0.3 mm thick with in-plane dimensions 23 mm x 21 mm. Solder interconnects are 0.6 m in diameter. The pads are solder mask defined 0.46 mm diameter. The package substrate is 0.56 mm thick, 4- layer FR4. Test Board B consists of ball grid array (BGA) and chip-scale packages (CSP). Two versions of the test vehicle were constructed including 8 mm flex-substrate chip packages with 132 I/O, 0.5 mm pitch and 10 mm flex-substrate chip-scale packages with 100 I/O, 0.8 mm pitch. 79 Table 4.2 : Attributed of TABGA test board. (TV-B). 10mm 63Sn37Pb 8mm 62Sn36Pb2Ag 8mm 95.5Sn4.0Ag 0.5Cu Ball Count 100 132 132 Ball Pitch 0.8 mm 0.5 mm 0.5 mm Die Size 5 x 5 3.98 x 3.98 3.98 x 3.98 Substrate Thickness 0.5 mm 0.1 mm 0.1 mm Substrate Pad Dia. 0.3 mm 0.28 mm 0.28 mm Substrate Pad Type SMD Thru-Flex Thru-Flex Ball Dia. 0.46 mm 0.3 mm 0.3 mm The printed circuit assembly is made of FR4 with SAC405 interconnects. Figure 4.5 shows the test vehicle and interconnect configuration. Table 4.2 gives the summary of the package attributes for test vehicles B. The number of components varies from 6 to 10 on some of the boards. All the components are on one side of the board. Conventional eutectic solder, 63Sn37Pb and lead-free (Pb-free) solder balls, 95.5Sn4.0Ag0.5Cu have been studied for 8 mm, 132 I/O CSP. These test boards were based on standard PCB technology with no build-up or HDI layers (high density interconnection). 80 (a) (b) Figure 4.5: Test Board-B, (a) TABGA test board. (b) Inter-connect configurations. 4.5.3 Test Vehicle-C: CAVE-PBGA324 Test Board Test vehicle described in this section was fabricated at Center for advanced vehicle and extreme environment electronics (CAVE-3) using standard surface mount technology (SMT) assembly procedure. The test board-C is a multilayer FR4 printed circuit board of JEDEC standard JESD22-B111 specified dimensions, with one plastic ball grid array package of 324 I/O count, mounted at the center of the board. Each package has four daisy-chains for diagnosing damage during the shock event. Figure 4.6 shows area array inter-connect configuration of the 1 0 m m , 1 0 0 I /O B G A 81 PBGA324 package. The package is 19 x 19 mm in size, and has a full-array of solder interconnects in a 18 x 18 array configuration at 1 mm pitch. The packages have Sn3Ag0.5Cu solder interconnects. The test board has mounting holes at the board corners to enable board test in the JEDEC configuration (Figure 4.6). Table 4.3: Attributes of CAVE Test vehicle. I/O Count 324 I/O Pitch 1mm Body Size 19mm Ball Matrix 17x17 Ball Alignment Full Array Package Type PBGA Board Finish ImAg Substrate Pad Type SMD Solder Ball Material Sn3Ag0.5Cu Substrate Pad Dia. 0.45mm Ball Dia. 0.4mm Mold Cap thickness 1.17mm (a) 1 7 m m , 3 2 4 I/ O P BG A 82 (b) Figure 4.6: Test Board-C: (a) Area array configuration of inter-connects of plastic ball grid array package with 324 I/O count (PBGA324-18x18 mm grid). (b) Test vehicle-C. Package substrate is multi-layer glass-epoxy substrate with solder-mask defined package- side pads. Solder interconnects are 0.6 m in diameter. The pads are solder mask defined 0.46 mm diameter. The package substrate is 0.56 mm thick and 4-layer FR4. Table 4.3 gives the summary of the PBGA324 packages. 4.6 Simulation Data Sets: Error Seeding of Failure Modes by Explicit Finite Elements Simulations Explicit finite element analysis of test vehicles is performed for JEDEC drop orientation. Conventional shell beam model of the test vehicles is developed. To reduce the analysis time, one package is modeled with detailed configuration while the rest are modeled as smeared. Smeared properties of each package are obtained using volumetric averaging. Various competing failure modes are modeled on the detailed package and strain histories are retrieved for studying 83 fault mode classification. In a JEDEC drop, various failure modes like solder interconnect failure, solder interconnect fracture, chip de-lamination and chip fracture take place due to bending (flexing) of printed circuit board (PCB) and mechanical shock experienced by the whole board assembly in drop event. Since these failure modes are the most frequently observed ones in the drop phenomenon, hence strain histories are extracted from simulating the drop phenomenon with each mode of failure exclusively present in the model. Board level drop impact problem of printed circuit board (PCB) assemblies is studied as wave propagation problem. The governing equation of the problem is given by ? ?? ? ? ?? ? ? ? ? ? ne x tni n tnn RRDCDM ??? ??? (7) where [M] is the mass matrix, [C] is the damping matrix and [K] is the stiffness matrix and {D}n is the nodal displacement vector at each time step, and ? ? ? ?? ?nnint DKR ? for a linear problem. Explicit time integration approach is implemented where nodal displacements are calculated for n+1 time step using central difference scheme, equation of motion and conditions known at preceding step or steps. This is given by following equation, ? ? ? ? ? ? ? ?? ? ? ? 1n2n2nin tne x t1n2 DCt2 1Mt1DMt2RRDCt2 1Mt1 ?? ?????? ?????????????? ??? (8) Here nodal displacement vector is calculated at n+1th step. In the above equation, the right hand side terms are at preceding steps i.e. at n and n-1. Computational efficiency is increased by making mass matrix diagonal using a lumped mass approach. Conditional stability of the explicit time integration limits the element size. Error accumulation and instability is avoided using a limited time step, which increases the number of time steps required to cover the full duration of the time. Explicit analysis is seen suitable for drop impact problems which are categorized as wave propagation problem. In these types of problems the transient response of 84 the structure i.e. board decays with multiples of the largest response. This is independent of the time step used in the formulation. Also explicit formulation involves incorporation of nonlinearities due to geometry, and material without any significant manipulations to global system matrices. Reduced time integration scheme is adopted in the explicit finite element simulation of drop phenomenon. In reduced time integration, less integration points are present, hence the computation is economical. First order elements are used to model the global PCB assembly. Since a drop simulation is performed, large strains and high strain gradients are expected. Higher order elements have high frequencies which generate noise when stress wave moves through the mesh. The board is modeled using reduced integration conventional shell element i.e. S4R. S4R are quadrilateral shell elements which are used for large strain formulation. They have six degrees of freedom, i.e. 3 rotations and 3 translations. The solder interconnects are modeled using two nodded element i.e. Timoshenko beam elements (B31). These B31 elements have six degrees of freedom, i.e. 3 rotations and 3 translations. To simulate interconnect behavior; the rotational degrees of freedom are constrained. B31 elements are Timoshenko beam elements and do not preserve the normal behavior of the beam cross section, hence they allow shear deformation of the cross-section. This phenomenon of shear deformation is critical in simulation as it is a dominant mode of failure in the second level interconnects. Various layers of the package like copper pad, mold, die, and substrate are modeled using C3D8R elements. C3D8R are 8 nodded reduced integration hexahedral elements with 3 translation degrees of freedom. The floor of impact is modeled using R3D4 element and a weight is attached to the board. The contact between rigid floor and of weight is defined as node to surface using a reference node. 85 The JEDEC orientation for test vehicle A, test vehicle B and test vehicle C are shown in Figure 4.7. Figure 4.8 shows the cross-sectional view of the modeling of detailed packages for the test vehicles. The faults occurring in the test vehicle during drop event are simulated in the simulation by error-seeding the assembly manually. This manual error-seeding is used to form a data set which can be used to classify the actual fault modes occurring due to the physical damage taking place in experimental data. (a) (b) 86 (c) Figure 4.7: JEDEC drop orientation of (a) test vehicle -A (b) test vehicle-B (c) test vehicle-C. (a) Cu Pad Solder Interconnects PCB Mold Chip Die - attach Substrate 87 (b) (c) Figure 4.8: Cross sectional view of modeling details. (a) test vehicle -A (b) test vehicle-B (c) test vehicle-C 4.6.1 Solder Ball Failure and Cracking The solder balls in the drop event are subjected to mechanical shock. Due to the impact, the board undergoes considerable bending for small duration. Therefore the drop event is transient in nature. Due to repeated drop events of the board assembly the solder balls undergo Chip Substrate Mold Solder Interconnect PCB Die attach M ol d D i e S ubs t ra t e D i e A t t a c h S ol de r Int e r - c onne c t Cu pa d P CB 88 fatigue failure leading to complete failure or solder interconnect missing. In explicit finite element analysis, the board assembly is error-seeded for solder ball cracking and fracture. According to distance from neutral point, corner most solder balls in the package will experience maximum shear strain. There is also maximum stress concentration in the corner most solder balls. Many commercial packages use one or more solder interconnects as redundant, which facilitates daisy chain continuity on damage of corner solder balls and their failure. Hence the corner most solder interconnects is most likely to fail in drop events. Solder ball failure is simulated on the explicit model by reducing the cross sectional area of the modeled solder inter connect. Simulation of partial cracking of the solder ball is followed by elimination of the solder interconnect. Figure 4.9 shows a schematic of solder interconnect array simulated with each solder ball cracking and fracture in various test vehicles. Interconnect failure is modeled by sequentially selecting solder balls at the periphery of the interconnect array configuration. A comprehensive simulation data set is formed by simulation of interconnect failure. (a) O ne Inter connect with Damage T wo Interconnects with Damage Three In terconnect with Damage Four Interco nnects with Damage 89 (b) (c) Figure 4.9: Simulation of solder interconnect cracking and solder interconnect completely failed for (a) test vehicle -A (b) test vehicle-B (c) test vehicle-C On e I n t er - co n n ec t f r ac t u r e T w o I n ter - co n n e ct f r a ctu r e T h r ee I n t er - co n n e ct f r a ctu r e Fo u r I n ter - co n n ec t f r ac t u r e On e I n t er - co n n ec t Da m a g e T w o I n ter - co n n e ct D a m ag e T h r ee I n t er - co n n e ct Da m a g e Fo u r I n ter - co n n ec t D a m ag e 90 Transient strain histories are obtained for the drop events from elements at the center of the package (on the mold side) as well as on PCB side. In the experimental setup, the strain data is acquired using strain gages on the board side as well as on the package side using high speed data acquisition system. 4.6.2 Chip Fracture Chip fracture is simulated on test vehicles in the detailed package. Die cracking is modeled at the underside of the chip. The fracture on the chip is modeled as a crack occurring in the chip. The crack is modeled by removing elements at the crack location and replacing them by a contact surface. The contact surfaces represent in the die crack. The chip fracture mode of failure in different test vehicles is shown in Figure 4.10 . (a) Y Z X C on tact Sur fac e Represe nting Die fr ac tu re 91 (b) (c) Figure 4.10: Simulated chip fracture in drop event. (a) test vehicle -A (b) test vehicle-B (c) test vehicle-C. 4.6.3 Chip Delamination Chip de-lamination is also a very common mode of failure occurring in the drop events. Chip de-lamination occurs when there is a crack or detachment between the bond in the chip and the BT substrate. The phenomenon is modeled by modeling contact elements between the die Conta ct surfa ce at crack l oca ti on Y Z X C o n t a c t S u r f a c e R e p r e s e n t i n g D i e f r a c t u r e 92 attach and BT substrate. Figure 4.11 shows the model of chip delamination for various test vehicles. (a) (b) Delamination b etween Chip and Substrate Y Z X Contact Su rfa ce re prese n t ing Delamin atio n 93 (c) Figure 4.11: Simulation of chip de-lamination in the package. (a) test vehicle -A (b) test vehicle- B (c) test vehicle-C. 4.6.4 Part Fall Off Falling off parts (packages) in portable electronics is a very common phenomenon for portable electronics under drop and shock. Part fall off is also simulated as one of the possible failure modes. The package on the board which is modeled in detailed configuration is taken as the part which falls off the board assembly when subjected to JEDEC drop. Strain histories at the board side near the center of the package are extracted. Figure 4.12 represents the configurations of the test boards with part fall off. D e l a m i n a t i o n b e t w e e n D i e a n d S u b s t r a t e Y Z X 94 (a) (b) P a c ka ge M i s s i ng Pack ag e Mis sin g 95 (c) Figure 4.12: Simulation of part fall off. (a) test vehicle -A (b) test vehicle-B (c) test vehicle-C. 4.7 Experimental Data Set In this section an overview of experimentation is presented for procurement of experimental data sets. Strain based (time domain) experimental data sets are used for feature extraction and fault isolation. 4.7.1 Development of Transient Signal for Test Board-A The test boards are subjected to horizontal orientation i.e. 0 deg drop according to JEDEC standards. Figure 4.13 shows the Lansmont drop table used for drop testing of the test vehicles. Test vehicle-A has been mounted in face-down configuration specified by the JEDEC test standard [JESD22-B111]. The shock-impact test for test vehicle-A has been carried out with all the four FPGAs in powered-up state. Pack ag e Mis sin g 96 Figure 4.13: Lansmont drop table with test vehicle-A. The waveform generated by the PGA?s has been acquired using a high sampling rate data acquisition card and digital storage oscilloscope. Strain gauges have been mounted on the board side at various target points of interest. High speed imaging of the drop event has also been acquired at a frame rate of 50,000 fps. The printed circuit assemblies have been speckle coated. Transient strain histories have been acquired from both strain gages and high-speed imaging using digital image correlation. The high-speed cameras have been placed on rigid floor with an angle of 25 degree between them while facing the speckle of the board. The board displacements have been measured by calibrating the cameras before the drop experiment. Figure 4.14 shows the strain contours acquired during the drop event of test vehicle-A. Figure 4.15 shows the 97 sample strain history of test vehicle-A along with the daisy chain continuity, which is also used to monitor the packages during drop events. Figure 4.14: 3D contour of strain in longitudinal direction from digital image correlation of FPGA Test board in 0-degree orientation at 5.7ms time instant of shock. Figure 4.15: Sample strain history and damage detection by daisy chain monitoring. tim e= 0 ms tim e= 2.5 ms tim e= 5.7 ms tim e= 4.8 ms - 7 - 5 - 3 - 1 1 3 5 7 9 - 2 - 1 . 5 - 1 - 0 . 5 0 0 . 5 1 1 . 5 2 2 . 5 - 0 . 0 1 0 . 0 4 0 . 0 9 V ol ta ge ( V ) S tra in T i m e ( s e c ) Str a i n C o n ti n u i ty 98 4.7.2 Development of Transient Signal for Test Vehicle-C The test boards were subjected to 1500g, 0.5ms horizontal orientation zero-degree drop in the JEDEC orientation. Figure 4.16 shows the shock tower used for drop testing of the test vehicles. Both the test vehicles are mounted in an inverted way such that the packages are facing downward. Strain gages are mounted on the board side at various target points of interest. High speed imaging in conjunction with digital image correlation was used to extract full-field strain histories during the shock event. The boards have been speckle coated on both the board side and the package-side. Figure 4.16: Lansmont drop table (Lansmont model 23 shock system) with test vehicle-C mounted. Repeatability of drop orientation is critical to development of a training signal. Repeatability in shock response was ensured by mounting the test assemblies on the shock tower. The cameras are placed in the horizontal plane at an angle of 25 degrees between them, facing the surface of the board. The cameras have been calibrated before the sequence of drop events. G ui di ng R ods B a s e 99 Figure 4.17 shows the strain contours acquired during the drop event of test vehicle-C. Figure 4.18 shows the sample strain history of test vehicle-C along with the daisy chain continuity, which is also used to monitor the package during drop events. Figure 4.17: 3D contour of strain in longitudinal direction from digital image correlation of test board-C in 0-degree orientation. Figure 4.18: Sample strain history and damage detection by daisy chain monitoring for test vehicle-C. - 7 - 5 - 3 - 1 1 3 5 7 9 - 2 - 1 . 5 - 1 - 0 . 5 0 0 . 5 1 1 . 5 2 2 . 5 - 0 . 0 1 0 . 0 4 0 . 0 9 V o lt a g e ( V ) S t r a in T i m e ( s e c ) Stra in Cont inuity 100 4.8 Summary In this chapter, description of test vehicles used in this research work for development of a decision framework based on fault mode classification is explained. A brief overview of how classification problem is dealt in this work is presented. Each technique developed in this work of fault isolation is implemented on a benchmark data set i.e. IRIS flower data set. The orientation of the IRIS flower data set explained. A similar approach is scaled to drop data set of the test assemblies. Simulation and experimental data sets are two kinds of data sets used in this study for fault mode classification. Simulation data set is error seeded exclusively with a single mode of failure in the explicit finite element models. Details of modeling and simulation are explained as well. Procurement of experimental data set is also explained for the respective test vehicles. These data sets will be used in further part of this work for the purpose of fault mode classification. 101 5 Chapter-5 De-correlated Framework for Fault Mode Classification in Electronics under Drop and Shock 5.1 Introduction Currently in electronic packaging, BIST, fuses and canaries are extensively used for failure detection in electronics. These forms of failure detection procedures in IC?s ensure high level of product functionality. The goal is of monitoring electronics is a tradeoff between the effectiveness and cost/time involved in the process of design/manufacturing and maintenance. BIST has several advantages which provide reduction of cost and time. For example BIST reduces dependence on ATE (Automatic Test Equipment) which reduces the effect of current in the design. BIST is also effective in many ways. It provides speed in system testing of Circuit Under Test (CUT) [Hamzaoglu 2000]. It also overcomes the limitation of pins in the packaging and utilizes the extra area available on the chip there by more information about faults in obtained. BIST is used in several forms such as On-Line-BIST and Off-Line-BIST. On line BIST is mostly used for electrical monitoring of the chips or functionality of the IC. On line BIST is used for monitoring whether the circuit is behaving correctly or not. For detecting and monitoring of actual physical damage in the circuit, off line BIST is used. Structural faults in the circuit are mainly due to external loads experienced by the packages in manufacturing and field operations. Ideally a BIST should have high fault coverage and low overheads on its circuit design. But there always exists a trade-off which leads to compromising the effectiveness of the BIST. One of the major concerns for a packaging and design engineer is the size of the BIST 102 logic. Fault coverage and overheads are directly driven by size of the BIST. 100% fault coverage will also lead to increase in the overheads involved in the design and implementation of the BIST. Hence application of BIST is always a compromise of cost and effectiveness. Fuses and Canaries are also used for detecting and controlling faults in electronic system. Fuses [Anderson 2004] are used to sense any abnormality such as surge and fluctuations in voltage and temperature limits in the system and restore normal operating conditions. Canaries are special devices which are mounted on the standard device which is being monitored. Canaries have accelerated form of same failure mechanism as that of standard device on which it is mounted. Hence they fail faster. This property of canaries is used for measuring the actual time to failure [Mishra 2002] of the standard device. Canaries are used for identification of physics of failure in electronic packages. They are used for studying low cycle fatigue (solder joint fatigue) [Anderson 2004], corrosion, changes and sudden exposure to temperature and vibration transients. One of the major challenges in use of fuses, canaries is that they need frequent replacements and repairs. Hence it is difficult to integrate them with the main system. The health monitoring techniques discussed above in electronic packaging have limited scope. They are all based on reactive failure and hence they are primarily diagnostic in nature. They do not give any information on remaining residual life, how and when the damage starts initiating, what is trend of damage progression, what kind of failure mode is dominant in the electronic system. These questions are better tackled and answered by techniques which are predictive in nature. Previously authors have developed techniques driven by statistical pattern recognition for structural health monitoring of electronics. These studies quantified damage initiation and progression [Lall 2006a, 2007a, 2008] in electronics subjected to drop and shock. Statistical Pattern Recognition techniques based on wavelet packet energy decomposition [Lall 103 2006a] have been studied by authors for quantification of shock damage in electronic assemblies, and auto-regressive moving average, and time-frequency techniques have been investigated for system identification, condition monitoring, and fault detection and diagnosis in electronic systems [Lall 2008]. Leading indicators for system level damage in portable electronics are developed based on wavelet packet energy decomposition [Lall 2006a], joint time frequency analysis [Lall 2007a] and auto-regressive moving average, and time-frequency techniques have been investigated for system identification, condition monitoring, and fault detection and diagnosis in electronic systems [Lall 2008]. Currently damage quantification is based on electrical continuity, which limits visibility into damage initiation, progression. Damage pre- cursors based on time and spectral techniques for health monitoring of electronics do not rely on continuity data from daisy-chained packages. This technique of structural health monitoring involves extensive off-line processing of data obtained from the sensors strategically placed at various target points. Techniques such as digital image correlation [Lall 2006b] are also used for data acquisition of global and local responses of the electronic system subjected to drop and shock. Structural health monitoring, i.e. assessing the current state of the system and establishing a knowledge data based on predictions about the system state is previously used in various engineering fields such as delamination in composites [Saravanos 1994], damage detection in aerospace structures [Robinson 1996, Doebling 1995], off shore structures [Brinker 1995]. These methods of structural health monitoring have found application in performance assessment of machinery systems [Lee 1995, Chuang 2004]. Structural health monitoring by statistical pattern recognition has been previously applied in other scientific disciplines such as biology [Christodoulou 1999], psychology [Dellaert 1996], medicine [Holt 1998], marketing [Apte 104 1997], Artificial Intelligence [Kohonen 1988], computer vision [Low 1990] etc. SHM of electronics by statistical pattern recognition is relatively new. In this work various dominant failure modes occurring with every drop and shock event in electronics are classified using pre-failure feature space. Damage due to drop and shock in electronic packages can have a wide variety of failure modes occurring at various competing locations in different packaging architectures. The damage is due to overstresses developed by repetitive loading occurring with each drop event. Previously, the authors have developed damage pre-cursors based on time and spectral techniques for health monitoring and damage detection in electronics without reliance on continuity data from daisy-chained packages. This paper focuses on classification of failure modes based on leading indicators in pre-failure space. The methodology developed in this work is based on de-correlation of joint time frequency feature space by Karhunen Lo?ve transform (KLT). Various fault modes such as solder inter- connect failure, inter-connect missing, chip delamination chip cracking etc are classified. These fault modes are found as most frequently occurring in electronic packages subjected to drop and shock. Fault mode classification for assessing system level damage of electronics subjected to drop and shock is relatively new. 5.2 Karhunen?Lo?ve Transform Karhunen Loeve Transform is a statistical classifier which has been used for de- correlation of feature space of damage progression in package interconnects during successive drop events. The de-classification of feature space has been done based on the variability of the data. Previously, Karhunen Loeve Transform has been used for data compression in classical communication theory [Ogawa 1986, Yamashita 1992, Shawn 2004]. The use of Karhunen 105 Loeve Transform for failure-mode classification of electronic assemblies is new in field of health monitoring of electronic systems. The generic rectangular data set described in Figure 5.1 has been de-correlated using Karhunen Loeve Transform. Let X is the representation of the variable-space in the environment of interest. Joint Time frequency distributions of the strain histories from successive drop events from pristine assembly configuration to failure for each board assembly has been used as the input matrix, X. A de-classified feature space Z has been obtained using the Karhunen Loeve Transform of the matrix, X. The de-classified set of vectors is a linear combination of principal components with decreasing order of importance. The initial k-vectors are important as they account for most of the variance in the data. Figure 5.1: Generic Rectangular data set on Karhunen Loeve Transform ? ? ? ? d im e n s io n smd im e n s io n sm ?? ? ZX K L T (1) ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? nM2n1n M44241 M33231 M22221 M11211 x..xx ..... ..... x..xx x..xx x..xx x..xx ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? nMnn M M M M zzz zzz zzz zzz zzz .. ..... ..... .. .. .. .. 21 44241 33231 22221 11211 D a ta Ma tr i x on K a r h u n e n L o e v e T r a n s fo r m n xM Ma t ri xn xM Ma t ri x 106 The data set X has been centered and scaled to eliminate a non-zero mean of matrix X. ?Since the input matrix has been centered and scaled, the expected value of the input matrix is zero, 0]X[E ? (2) The input matrix X has been projected on a unit vector, q in the de-correlated feature space, also of dimension-m. The projection is represented as an inner product of vectors X and q is the matrix of principal components, A, XqqXA TT ?? (3) The variance of A has been represented as a function of unit vector, q, Rqq q]XX[Eq )]qX)(Xq[(E ]A[E T TT TT 22 ? ? ? ?? (4) Where, the outer-product of X, has been represented as R. The variance probe, ? [Fakunaga 1972, Haykin 1999] has been computed, since it relates correlation matrix, R, the unit vector in de-correlated space, q, and standard deviation, ?. Rqq)q( T2 ???? (5) The equation that governs the unit vectors, q, and variance probe ? an eigenvalue problem, which has a non-trivial solution, 0q? , qRq?? (6) The eigenvalues have been arranged in descending order. m321 ..... ???????? (7) 107 The eigenvector matrix Q is orthogonal consisting of column-vectors which satisfy the condition of ortho-normality, ? ?n321 q...qqqQ ? (8) ?? ??? ? ?? ij0 ij1qq j Ti (9) Using eigen-decomposition, the correlation matrix R has been written in terms of eigenvalues and eigenvectors as, ?? ?? m1i TiqqR ii (10) The eigenvectors of the correlation matrix R represent the principal directions along which the variance probes ?(qj) have extreme values. The associated eigenvalues define the extreme values of the variance probe ?(qj). There are m possible projections of x, corresponding to m possible solutions of unit vectors q. Projections aj , which are the principal components, have been combined into a single vector as follows, T]a,,.........a,a,a[A m321? (11) xQA ]qx,,.........qx,qx,qx[A T TTTTT m321?? (12) The original data-vector has been synthesized from the transformed feature space of principal components by pre-multiplying the above equation by Q, ??? ? m 1j jj qaX QAX (13) The original data vector x has reduced dimensions from the transformed feature space a as, 108 ??? ?1j jjqax? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? a . . a a q..qqx? 1 1 21 (14) where l < m. The Karhunen Loeve Transform has been used to create a linear projection of feature space from m- dimensions to l ? dimensions, which approximates the original data x [Fakunaga 1972, Haykin 1999]. Dominant directions of the de-correlated feature space have been determined by first few largest eigenvalues. The principal components entering transformation are also determined by the dominant eigenvalues. This transform retains most of the intrinsic information associated with original data. Karhunen Loeve Transform is also be seen a linear projection scheme where a high dimensional data mof dimensions m is projected on a linear line or a plane or a hyper plane of dimension l where l0.95) and for test vehicle B is 0.9689 (>0.95). The high value of SPCA 118 indicates that simulation feature space is statistically similar to experimental feature space at a confidence level of 95%. Hence the superposition of the feature space is statistically validated. Since simulation has been performed exclusively for a particular failure mode, the superposition of simulation and experimental KL coefficients validates the predicted failure modes and their classification in the feature space. Figure 5.9: Test Vehicle-A, overlap of simulation and experimental feature spaces. 119 Figure 5.10: Test Vehicle-B, overlap of simulation and experimental feature spaces. 5.5 Validation of Clustering The feature space formed by time-frequency distribution has been de-correlated using KLT into clusters. These clusters have been formed from both the simulation data-set as well as experimental data-sets. For simulation data set since the explicit finite element models are error seeded with a specific failure mode, hence we the region of the feature space which belongs to each failure mode. The simulation data-set clusters have been overlapped on the clusters formed by experimental data to quantify the type of failure mode. In a practical scenario, there are multiple failure modes which can occur in the test vehicle when subjected to repeated shock- impact phenomenon. Hence the overlapping of the clusters helps in finding the most dominant direction of the failure mode occurring in the test vehicle. Correlation of the prediction from the simulation and experimental data sets has been quantified using the similarity factor, SPCA. 120 Objects or classes grouped together in a cluster have been verified to be similar, and objects placed in different clusters have been verified to be dissimilar in their inherent failure modes. To see the statistical resemblance of KL coefficients of first three principal components for different types of failure modes in simulation and experiment, the mahalonobis distance classifier along with SPCA has been used [Krzanowski 1979, Singhal 2001]. 5.5.1 Mahalonobis Distance Classifier Mahalonobis distance classifier has been used to quantify the statistical difference between the KL coefficients of the healthy transient strain history and different error seeded models. It is also used to calculate the statistical difference for the experimental data set, where drop-1 is the healthy training signal and subsequent drops are the unhealthy signals with some damage initiation and progression in them. Mahalonobis distance is defined as the measure of dissimilarity between two random variables X? and Y? which have same distribution of covariance matrix ? , ? ? ? ?? ??? ? yxyx)y,x(d 1T ?????? (15) In addition, the Mahalonobis distance classifier has been used to quantify the statistical dissimilarity between the various KL coefficients. The confidence values computed for various failure modes based on Mahalanobis distance have been plotted in Figure 5.7 to Figure 5.10. Since the cut off level in the study is 95%, hence the confidence plot shown in Figure 5.11a-b indicate that statistically there exists a significant difference between the KL coefficients of the healthy strain signal and error seeded strain signals from the simulation. Similarly a statistically significant difference has been demonstrated between in the experimental data set for both the test vehicles, where drop-1 is taken as the healthy signal and the subsequent drops are studied to 121 see any damage initiation and progression in them. Figure 5.12a-b shows the combined confidence plot of mahalonobis distance classifier for experimental data set for test vehicle A and test vehicle B. (a) (b) Figure 5.11: Confidence plot based of mahalonobis distance classifier for simulation data set. (a) Test Vehicle-A (b) Test Vehicle-B. 0 0 . 2 0 . 4 0 . 6 0 . 8 1 1 . 2 H e a l th y o n e _ i n te r c o n n e c t m i s s tw o _ i n te r c o n n e c t m i s s th r e e _ i n te r c o n n e c t m i s s fo u r _ i n te r c o n n e c t m i s s o n e _ i n te r c o n n e c t c r a c k tw o _ i n te r c o n n e c t c r a c k th r e e _ i n te r c o n n e c t c r a c k fo u r _ i n te r c o n n e c t c r a c k c h i p c r a c k i n g c h i p d e l a m i n a ti o n F a i l u r e M o d e C o n fi d e n c e Va l u e 0 0 . 2 0 . 4 0 . 6 0 . 8 1 1 . 2 H e a l t h y o n e _ i n t e r c o n n e c t m i s s t w o _ i n t e r c o n n e c t m i s s t h r e e _ i n t e r c o n n e c t m i s s f o u r _ i n t e r c o n n e c t m i s s o n e _ i n t e r c o n n e c t c r a c k t w o _ i n t e r c o n n e c t c r a c k t h r e e _ i n t e r c o n n e c t c r a c k f o u r _ i n t e r c o n n e c t c r a c k c h i p c r a c k i n g c h i p d e l a m i n a t i o n P a c k a g e F a l l o f f F a i l u r e M o d e C o n fi d e n c e Va l u e 122 (a) (b) Figure 5.12: Combined confidence plot based of Mahalonobis distance classifier for experimental data set. (a) test vehicle-A (b) test vehicle-B. 0 0 . 2 0 . 4 0 . 6 0 . 8 1 1 . 2 D r o p - 1 D r o p - 5 D r o p - 1 0 D r o p - 1 5 D r o p N u m b e r C o n fi d e n c e Va lu e 0 0 . 2 0 . 4 0 . 6 0 . 8 1 1 . 2 D r o p - 1 D r o p - 5 D r o p - 1 0 D r o p - 1 5 D r o p - 2 0 D r o p - 2 5 D r o p - 3 0 D r o p - 3 5 D r o p - 4 0 D r o p - 4 4 D r o p N u m b e r C o n fi d e n c e Va l u e 123 5.5.2 Principal Component Similarity Factor The similarity factor SPCA provides a single value for quantification of similarity between the two data sets. First k-principal components which account for at least 95% of the total variance in the data have been selected from both simulation and experimental data sets. A value of zero indicates no similarity, while a value of one signifies identical data sets. k )ESSE(traceS TTPC A ? (16) Where, [E] and [S] are k most important principal component matrix of the two n dimensional data sets from experimental and simulation respectively. Similarity factor is also calculated between various specific failure modes for three cases for both test vehicles A and B. SPCA is calculated for following cases to show the statistical see statistical similarity between (I). Simulation vs. simulation. (II). Experimental vs. experimental and (III). Experimental vs. Simulation between each drop event. Table 5.1a-b shows the SPCA calculation for the simulation data set with different cases of failure modes. Statistical significance has been computed at a confidence value of 90%. A value of SPCA > 0.90 will indicate statistical similarity where as SPCA<0.90 will indicate statistical dissimilarity. Table 5.2a-b shows the SPCA calculation of experimental data set for test vehicles A and B. Table 5.3a-b shows the SPCA calculation between the Experimental and simulation data sets for each drop and failure mode case in simulation. 124 Table 5.1 : SPCA calculation for simulation vs. simulation cases. (a) Test Vehicle-A (b) Test Vehicle-B. (a) (b) 1000000 C hip D el am ination 0. 3 9100000C hip C ra c ki ng 0. 4 10. 4 310000Four 0. 4 20. 4 20. 7 91000Th re e 0. 3 40. 4 30. 7 60. 7 8100Tw o 0. 3 30. 4 10. 7 90. 7 90. 8 010One 0. 3 80. 4 20. 7 90. 7 90. 7 80. 7 91H e al t h y C hip D el am ination C hip cr a c ki ngFo ur Th re eTw o OneH e al t h y Int er - C on nec t Frac t ur e Si mula t ion D ia go nal Mat rix C ut o f f Le v el - 90% Int er - C on nec t Fra cture 10000000 Pa c k age Fall - of f 0. 3 61000000 C hip D el ami natio n 0. 3 60. 7 8100000 C hip C ra c ki ng 0. 3 70. 7 80. 8 110000Four 0. 3 70. 7 90. 7 80. 7 81000Th re e 0. 3 60. 7 90. 7 90. 7 90. 7 8100Tw o 0. 3 70. 7 80. 7 70. 7 80. 7 80. 7 810One 0. 4 10. 3 60. 3 80. 3 80. 3 90. 3 80. 3 91H e al t h y Pa c k age Fall - of f C hip D el ami natio n C hip cr a c ki ngFo ur Th re eTw o OneH e al t h y Int er - C on nec t Frac t ur e Si mulatio n Int er - C on nec t Fra cture D ia go nal M atrix C ut - o f f Lev el 9 0% 125 Table 5.2: SPCA calculation for experiment vs. experiment cases. (a) Test Vehicle-A (b) Test Vehicle-B. (a) (b) 1000Drop - 15 0 .5 7100Drop - 10 0 .5 90 .5 910Drop - 5 0 .5 10 .5 20 .5 41Drop - 1 Drop - 15Drop - 10Drop - 5Drop - 1E x pe rim e nt Dia gonal Matri x Cut - o ff Lev e l 9 0 % 1000000000Drop - 44 0 .6 1100000000Drop - 40 0 .5 30 .6 410000000Drop - 35 0 .2 00 .2 10 .2 01000000Drop - 30 0 .2 20 .1 70 .1 50 .4 4100000Drop - 25 0 .1 90 .2 20 .2 10 .3 50 .2 310000Drop - 20 0 .1 90 .1 70 .1 60 .4 20 .4 60 .2 71000Drop - 15 0 .1 90 .2 00 .2 10 .2 90 .2 40 .4 30 .2 1100Drop - 10 0 .1 90 .1 70 .1 60 .1 90 .3 00 .2 70 .2 10 .3 110Drop - 5 0 .1 70 .1 80 .1 70 .1 50 .1 50 .1 40 .1 70 .1 30 .1 31Drop - 1 Drop - 44Drop - 40Drop - 35Drop - 30Drop - 25Drop - 20Drop - 15Drop - 10Drop - 5Drop - 1E x pe rim e nt Dia gonal Matri x Cut o ff Le v e l - 90% 126 Table 5.3: SPCA calculation for experiment vs. simulation cases (Cut of Level- 90%). (a) Test Vehicle-A (b) Test Vehicle-B. (a) (b) 5.5.3 Failure Analysis by Cross Section Test Vehicles with respective failure modes are validated with cross sections of the failed samples. The cross sectioning of the samples is performed after the package has completely failed and lost functionality. The samples are cross sectioned and SEM images are used to determine different failure sites for Test vehicle-A and Test Vehicle-B. Figure 5.13, Figure 5.14 and Figure 5.15 shows the failure modes observed based in the experimental cross sections of the 0 .7 8 40 .7 9 30 .7 9 10 .7 9 30 .7 9 00 .7 9 50 .7 9 315 0 .7 7 90 .7 8 90 .7 9 30 .7 9 10 .7 9 30 .7 9 00 .7 9 310 0 .7 5 60 .7 9 30 .7 9 40 .7 9 60 .7 9 50 .7 9 40 .7 9 55 0 .7 4 50 .7 9 00 .7 9 50 .7 9 60 .7 9 60 .7 9 30 .9 1 21 Chip Del a mi nation Chip Cra c k ingFour Thre eTw o OneHe a lth yE x pe rim e nt Inter - Con nec t Fra c tu r eS im ula tion 0 .4 70 .6 60 .7 40 .7 60 .7 90 .7 30 .6 30 .7 444 0 .4 10 .7 00 .7 10 .7 20 .7 90 .7 10 .6 90 .7 140 0 .4 30 .6 80 .6 30 .7 50 .7 30 .7 50 .6 70 .7 930 0 .5 10 .6 50 .6 70 .7 70 .7 70 .7 50 .7 20 .7 620 0 .4 40 .6 20 .6 90 .7 10 .7 40 .7 80 .8 00 .8 110 0 .4 80 .7 30 .6 60 .7 10 .6 90 .7 30 .7 60 .9 11 P a c k a ge Fal l - of f Chip Del a mi nation Chip Cra c k ingFour Thre eTw o OneHe a lth yE x pe rim e nt Inter - Con nec t Fra c tu r eS im ula tion 127 test vehicles after failure. Five types of failure modes (A, B, C, D and E) are classified (Figure 5.16) based on the SEM images. (a) (b) Figure 5.13: Solder joint failures near IMC layer on (a) board and package side and (b) package side. 128 The dominant failure mode was observed to be interconnect fracture. A similar trend of this dominant failure mode is also seen in Figure 5.9 and which is based on de-correlation of feature space for various considered fault modes. In Figure 5.9, KL coefficients are entirely concentrated in the region of solder inter-connect cracking and missing. Based on the cross sections in Figure 5.13 is solder inter-connect fracture can be concluded as the most frequently occurring dominant mode of failure. Figure 5.10 shows the de-correlated feature space for fault mode classification. It is seen that the maximum concentration of KL coefficients is in solder-inter-connect missing and solder interconnect cracking regions of de-correlated feature space. This indicates that solder fracture remains the most dominant failure mode in drop and shock of electronic packages. In a practical scenario, multiple failure modes can occur in the test vehicle due to repetitive loading caused by drop events. It is seen that Figure 5.10 has KL coefficients present in chip delamination and chip fracture region of the de-correlated feature space. Hence possibility of chip delamination and chip fracture is not ruled out in test vehicle-B. This shows the effectiveness of the technique in classifying, even the initiation and progression of different considered dominant modes of failure from the joint time frequency feature space. 129 (a) (b) Figure 5.14: Failure modes in second level interconnect (a) Interface cracks near the PCB pad (b) Solder bulk on PCB-side. 130 Figure 5.15: Failure modes, (a) Resin Crack (b) Solder-Copper pad on PCB-side. Figure 5.16: Failure Modes, (a) resin crack (b) solder-copper pad on PCB-side(c) solder-copper pad on package-side (d) copper trace failure S u bs t ra t e P C B A B D C op p e r E C 131 5.6 Conclusion An approach for fault mode classification has been developed for electronics subjected to mechanical-shock and vibration. A comprehensive data set is created based on feature vectors obtained from joint time frequency analysis of experimental and simulation based transient strain histories. The Karhunen Lo?ve transform (KLT) has been used for feature reduction and de- correlation of the input feature vectors for fault mode classification. The Mahalanobis distance classifier and principal component similarity factors are used to statistically quantify the classification of the resulting feature space. Statistical pattern recognition technique is used to track damage initiation and progression in the pre-failure feature space. The presented approach enables the identification of regions and dominant progression directions of different failure modes in the de-correlated pre-failure feature space. The feature space obtained by joint time frequency approach is developed using Cohen?s Class of time frequency analysis i.e. reduced interference distribution. Explicit finite element methods have been used to simulate the drop phenomenon. Simulation transient strain histories are obtained by error seeding the failure mode in the simulation model. The simulations are error seeded exclusively with one failure mode. Correlation of simulation and experimental data-sets has been validated using similarity factor. Mahalanobis distance classifier and principal component similarity factor have been calculated between experimental and simulation data set to quantify the similarity between various failure modes and drop events. Superposition of the error-seeded simulation and experimental data-sets in the de-correlated feature space has been used to identify different dominant failure modes. 132 6 Chapter-6 Supervised Learning of Damage Initiation, Progression and Fault Isolation using Neural Nets 6.1 Introduction In this chapter, a supervised learning scheme is used for development of a multi-layer perceptron based artificial neural net for fault isolation in electronic assemblies under drop and shock. Electronics in avionics, military, defense, automobile, implantable medical applications, experience harsh environments of mechanical shock and vibration for extended periods of time during normal operation. These ultra-high reliability systems have the demands of minimal downtime and long design life. Complex electronic systems often may have multiple failure modes activated under environmental and usage stimuli. One or two failure modes may dominate but several may be active at the same time. High reliability needs of electronic systems are presently addressed with diagnostic based methodologies which identify the presence of a system fault and trigger a diagnostic fault code. Reactive diagnostics implementations exist presently both on chip and at system level. Examples include the built in self-test for chip diagnostics of fault modes and on-board diagnostics in automotive systems which triggers diagnostic trouble codes in presence of fault. Prognostics and health monitoring systems can provide the ability of monitoring damage initiation and progression in the pre-failure space for early identification of impending failures to trigger repair and replacement much prior to catastrophic failure. In this research study, prognostics decision framework for electronic systems has been developed based on Sammon?s mapping in conjunction with neural network based clustering of 133 the de-correlated feature space. Fault-mode isolation and mode classification has been done by artificial neural networks approach. Artificial neural networks has been previously applied in other scientific disciplines such as medicine [Khan 2001], power systems [Adepoju 2007, De 2002, Haque 2005], business [Mahmood 1995], bioinformatics [Wang 2000, 2001], image processing [Chalabi 2008, Mahonen 1995, Petersena 2002], civil structures [Efstathiadesa 2007], texture analysis [Kaski 1999], software management [Fong 2007], telecommunication [Kylv?j? 2004], and speech recognition [Jalanko 1978]. Development of prognostic decision framework based on supervised learning for electronic systems is new. The networks have been trained by pseudo simulations of test assemblies under drop and shock. These simulations mimic real-life fault scenarios in electronic system at component level. The framework has been used to identify the migration of system from prior healthy state in presence of multiple failure mechanisms. In previous chapters techniques based on statistical pattern recognition for leading indication of impending failure and detection of damage initiation and progression is presented. Feature vectors have been developed based on Mahalanobis distance, wavelet packet energy decomposition, joint time-frequency analysis in the time-frequency window and autoregressive and moving average based time and spectral domains. Also linear projection scheme such as Karhunen-Lo?ve transform is used for simultaneously addressing damage detection and fault mode classification in test assemblies under shock load. In this chapter, a complete solution of the classification problem is presented. Supervised learning of perceptrons is used for development of a multi-layer perceptron network for fault detection and classification Electronic systems under extreme environments including shock and vibration may sustain several failure modes simultaneously. Clustering of the feature space for identification of 134 failure modes using supervised learning is new. Previous studies have shown that the dominant failure modes experienced by packages in a drop and shock framework are in the solder interconnects including crack at the package and the board interface, pad catering, copper trace fatigue, and bulk failure in solder joint. The present work explores the use of supervised learning of the health monitoring system using neural nets for identification of failure modes. Pre-failure feature space formed by joint time-frequency distribution is used for classifying different fault modes in electronic assemblies subjected to drop and shock. Cumulative damage may be accrued under repetitive loading with exposure to multiple shock events. Area array assemblies have been exposed to shock and feature vectors constructed to track damage initiation and progression. Multiple failure modes have been classified using Sammon?s mapping with neural nets. 6.2 Neural Networks: Overview of Theory Neuron is an information processing unit. They combine to form a neural network. Neural networks with different processing unit are capable of performing different tasks such as pattern classification, optimization, controls [DARPA neural network study 1988]. Figure 6.1(a) represents an abstract schematic of neuron. A neuron is capable of linear mapping as well as nonlinear mapping between input and output. Input can be referred to as a signal or pattern. The output is often referred to the best estimate of target. Figure 6.1(b) presents a computational model of a neuron. This neuron consists of 3 main parts i.e. synapses, adder/combiner and squashing/activation function. The synapses are the connecting links between the incoming signal (input) and the adder. The strength of the synapses is characterized by its weight. The input connecting links are assigned weights before the training. After the training process the weights achieve an optimum value. 135 (a) (b) Figure 6.1: (a) Abstract neuron input\output characteristics. (b) Computational model of neural processing unit. The weights quantitatively signify the contribution of the each dimension of the input to the neuron. The notation wid is the weight of ith dimension of input pattern on dth neuron. The next important element of a neuron processing unit is the adder as shown in Figure 6.1 (b). The adder is also called combiner where a linear combination of the input signal and weights is summed. This is given by following equation. ?? ?? d1i kdidi bxwn et (1) Since the above equation represents a linear combination, hence the adder is a linear combiner. The third element of this information processing neuron is the activation function, also Input W e i ght s A c t i va t i on/ O ut put Conve rs i on P os s i bl e D yn a m i c s ?. O ut put Input N e t In pu t ? w i1 w i2 w id o i = f i ( ne t i ,? )? x 1 x 2 x d ne t i ac t i v at i on G ai n? O ut put i V ar i abl e Sy napt i c W e i ght s B i as b k Sum m i ng J unc t i on Inp ut Si gna l S y n aps e s A dde r S qu as h i n g 136 called the squashing function. Figure 6.1(b) represents the activation/ squashing unit of a neuron. The output of the adder is passed through an activation function as shown in the following equation. ? ???? ii netfo (2) The activation function limits the output of a neuron. It squashes the out signal to a finite range. The neuron is also applied a bias (bk), which limits the input of the net going into the activation unit. The bias provides an affine transformation between input and output and can range from negative to positive value on real line. Often in the analysis and designing of neural networks, the bias is taken as +1 and weight of the bias is taken as bk. This will be more clearly understood in the latter sections of the chapter when network will be designed. Neurons can be of different types and often categorized with the type of activation function. Table 6.1 represents different types of activation functions used in neurons. Neurons can be uni-polar and bi-polar. Uni-polar neurons are processing units whose output varies between 0 and +1. Bi-polar neurons are processing units whose output varies between -1 to +1. A neuron with hard threshold function and binary output i.e. 0 and +1 is called McCulloch and Pitts neurons [McCulloch 1943]. Modifications have been made to these McCulloch and Pitts neurons [McCulloch 1943]. Soft sigmoid functions are implemented as the activation function as seen in Table 6.1(b). Soft sigmoid functions are increasing function with good linear and non-linear characteristic. The ?k? in the soft sigmoid function is the slope parameter. In the limit when k approaches infinity, the soft sigmoidal function becomes hard threshold function. One of the important advantages of soft sigmoid functions is that these are differentiable. An activation function which is differentiable is very advantageous in different learning theories [Haykin 1999]. Table 6.1 : Some examples of different types of neurons and activation functions. 137 (a) McCulloch and Pitts neurons [McCulloch 1943] ?? ??? ? ???? 0n e tif0 0n e tif1 2 1)n e t(s i g no u t p u t (b) Unipolar neuron soft sigmoid Function )n e tke x p (1 1)n e t(fo u t p u t ????? (c) Bi-polar neuron with hard activation function ? ? ? ? ?? ? ? ? ?? ? ? ?? 0ne tif1 0ne tif0 0ne tif1 )ne t(s i g nou t p ut -1 0 0 10 -1 -0 . 5 0 0 . 5 1 N e t O u tp u t -1 0 -5 0 5 10 -1 -0 . 8 -0 . 6 -0 . 4 -0 . 2 0 0 . 2 0 . 4 0 . 6 0 . 8 1 N e t O u tp u t x -a x i s y -a x i s k = 0 k = 0 . 0 1 k = 0 . 1 k = 0 . 5 k = 1 k = 1 0 k = 1 0 0 -1 0 0 10 -1 -0 . 5 0 0 . 5 1 N e t O u tp u t 138 (d) Bi-polar neuron with soft activation function 1)n e tke x p (1 2)n e t(fo u t p u t ?????? (d) Uni-polar neuron with Piecewise linear activation function ? ? ? ? ? ? ? ? ? ?? ???? ? ? 2 1ne tif0 2 1ne t 2 1ne t 2 1ne tif1 out p ut (a) McCulloch and Pitts neurons [McCulloch 1943] ?? ??? ? ? ??? 0n e tif0 0n e tif1 2 1)n e t(s i g no u t p u t -1 0 -5 0 5 10 -1 -0 . 8 -0 . 6 -0 . 4 -0 . 2 0 0 . 2 0 . 4 0 . 6 0 . 8 1 N e t O u tp u t x -a x i s y -a x i s k = 0 k = 0 . 0 1 k = 0 . 1 k = 0 . 5 k = 1 k = 1 0 k = 1 0 0 -1 0 0 10 -1 -0 . 5 0 0 . 5 1 N e t O u tp u t -1 0 0 10 -1 -0 . 5 0 0 . 5 1 N e t O u tp u t 139 (b) Unipolar neuron soft sigmoid function )n e tke x p (1 1)n e t(fo u t p u t ????? (c) Bi-polar neuron with hard activation function ?? ? ? ?? ? ? ? ?? ? ? ?? 0ne tif1 0ne tif0 0ne tif1 )ne t(s i g nou t p ut (d) Bi-polar neuron with soft activation function 1)n e tke x p (1 2)n e t(fo u t p u t ?????? -1 0 -5 0 5 10 -1 -0 . 8 -0 . 6 -0 . 4 -0 . 2 0 0 . 2 0 . 4 0 . 6 0 . 8 1 N e t O u tp u t x -a x i s y -a x i s k = 0 k = 0 . 0 1 k = 0 . 1 k = 0 . 5 k = 1 k = 1 0 k = 1 0 0 -1 0 0 10 -1 -0 . 5 0 0 . 5 1 N e t O u tp u t -1 0 -5 0 5 10 -1 -0 . 8 -0 . 6 -0 . 4 -0 . 2 0 0 . 2 0 . 4 0 . 6 0 . 8 1 N e t O u tp u t x -a x i s y -a x i s k = 0 k = 0 . 0 1 k = 0 . 1 k = 0 . 5 k = 1 k = 1 0 k = 1 0 0 140 (d) Uni-polar neuron with piecewise linear activation function ? ? ? ? ? ? ? ? ? ?? ???? ? ? 2 1ne tif0 2 1ne t 2 1ne t 2 1ne tif1 out p ut 6.3 Sammon?s Mapping In this chapter Sammon?s mapping is used as a data reduction scheme which de- correlates the feature space simultaneously. It is a non-linear mapping approach which projects a multi-dimensional data from high dimensional space to lower dimensional space. Previously Sammon?s mapping is used in clustering and classification problems in various other disciplines such as mathematics [Witold 1994], archaeology [Kowalskil 1972], exploratory data analysis [Siedleckia 1988], medical image processing [Parassenko 2002], planetary science [Lasue 2009], analytical chemistry [Moraes 2010], genetics [Lerner 1998], bioinformatics [Farnum 2003], and social sciences [Akay 2007]. Implementation of Sammon?s mapping for de-correlation of feature spaces used for health monitoring of electronics is new. Sammon?s mapping not only facilitates data visualization but also preserves structure of data, i.e. geometric relation (inter point distance) in original space and projected space are kept same with certain degree of error which is represented by the Sammon?s stress factor. -1 0 0 10 -1 -0 . 5 0 0 . 5 1 N e t O u tp u t 141 ? ?? ? ? ? ?? N ji *ij 2 ij * ij N ji * ij d dd d 1E (3) Here, *ijd is inter-point distances in original space (high dimensional), and ijd is inter- point distances in projected space (lower dimension). Sammon?s stress factor is never negative and it vanishes to zero in an ideal case. The main idea behind, Sammon?s mapping is the abstract data such that the stress factor gets optimized. Since Sammon?s mapping is not an explicit mathematical transformation, hence initially the lower dimensional space is initialized using a random number generator. The objective is to convert X (high dimensional space) to Y (lower dimensional space) as indicated by the Figure 6.2. ? ? ? ? i m e n s i o nL o w e r Ds M a p p i n g'S a m m o nD i m e n s i o nH i g h YX ????? ?? Figure 6.2: Primary objective of Sammon's mapping [Sammon?s 1969]. ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? nM2n1n M44241 M33231 M22221 M11211 x..xx ..... ..... x..xx x..xx x..xx x..xx ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? nLnn L L L L yyy yyy yyy yyy yyy . .... .... . . . . 21 44241 33231 22221 12111 D i m e n s i o n a l R e d u c ti o n o n Sa m m o n ?s Ma p p i n g L e m a x ) No Y e s I n c r e a s e I t e r a t i o n c o u n t e r b y 1 I t e < m a x _ i t e No E n d Y e s S t o r e w e i g h t s a s t h e b e s t s e t S t o p C a l c u l a t e s u m o f s q u a r e d e r r o r ( e ) C a l c u l a t e : f d a s h = g a i n * ( 1 - o u t p u t * o u t p u t ) d w = f d a s h ? a l p h a ? e r r o r ? i n p u t 153 6.5.2 Benchmarking of the Concept: Example of Extraction of Receptive field (Classification Region in the feature Space) for a XOR (Exclusive OR) problem In this section a simple problem of XOR is explained for extraction of a region (represented as receptive field of a neuron) in the feature space. Figure 6.10 shows graphical representation of XOR problem and the truth table for it. The objective of this problem is to design a supervised neural trainer which can successfully classify class-1. The idea of presenting XOR problem in this section is to simplify the explanation, so that a similar analogy/procedure is implemented to extract regions of different dominant failure modes in the feature space extracted for test assemblies under mechanical shock. Now to classify region-1 (class-1) as shown in Figure 6.10, two boundaries represented by a line are required. Line-1 and line-2 are the two line boundaries. A general line equation is represented by, 0??? cbyax (23) where, a,b,c are the coefficients. In a neural network framework, the above line equation is written as, 01321 ?????? wywxw (24) where, w1, w2 and w3 are the weights of the neuron represented by a line in a 2-dimension feature space of x-y coordinated. The coefficient of the weight w3 is +1, which is taken as bias of the neuron. Figure 6.11 shows a general schematic of neuron representing a line equation. 154 Figure 6.10: Graphical layout of XOR problem. Table 6.2: Truth table for XOR problem. Pattern No Input-1 Input-2 Output 1 0 0 -1 2 1 0 1 3 1 1 -1 4 0 1 -1 x y (0,0) (0,1) (1,1) (1,0) L ine - 1 L ine - 2 Clas s - 1 Clas s - 2 Clas s - 2 155 Figure 6.11: Schematic of a neuron representing an equation of line in a 2D space. The primary interest in this problem is to classify class-1. Hence weights of line-1 and line-2 are obtained using delta learning rule as explained in the above section. The training summary of line-1 is given by Figure 6.12. Table 6.3 presents different weights at various stages of training. In Figure 6.13, it is shown how weights of a perceptron change as the training is performed. In total 4 iterations were performed, where in each iteration all the patterns were presented to the single layer perceptron for learning. Figure 6.13 shows the evolution of weights on the branches of neurons as listed in Table 6.3. A similar training was also performed to extract optimum weights of line-2. Figure 6.14 shows training schematic and error plot for training of line-2. x - i n p u t y in p u t w2 w3 b i as = 1 w1 156 (a) (b) Figure 6.12: (a) Training summary of for obtaining weights of line-1. (b) Error plot for training line-1. -1 - 0 . 5 0 0 . 5 1 -1 - 0 . 5 0 0 . 5 1 X i n p u t Y i n p u t L i n e - 1 : S t e p w i s e P a r i t y f o r X O R P r o b l e m 1 1 . 5 2 2 . 5 3 3 . 5 4 10 -4 10 -3 10 -2 10 -1 10 0 10 1 I t e r a t i o n s E r r o r 157 Table 6.3: Training summary of line-1. (learning rate=10; gain=1, max error: 0.001) Iteration No Pattern No Wt-1 Wt-2 Wt-3 1 1 1 3 -3 1 2 1 3 16.051 1 3 -19 3 -3.9485 1 4 -19 3 -3.9485 2 1 -19 -2.5837 -9.5322 2 2 -19 -2.5837 10.466 2 3 -19.004 -2.5837 10.462 2 4 -19.004 -2.584 10.462 3 1 -19.004 -22.576 -9.5303 3 2 -19.004 -22.576 10.468 3 3 -19.008 -22.576 10.464 3 4 -19.008 -22.576 10.464 4 1 -19.008 -22.576 10.464 4 2 -19.008 -22.576 10.465 4 3 -19.012 -22.576 10.461 4 4 -19.012 -22.576 10.461 (a) Li ne - 1 y xx = 0 w 2 =3 w 3 = - 3 It e - 1 , Pa t t er n - 1 y =0 b i as = 1 w 1 =1 y x Li ne - 1 x = 1 w 2 =3 w 3 =1 6 . 0 5 1 It e - 1 , Pa t t er n - 2 y =0 b i as = 1 w 1 =1 y x Li ne - 1 x = 1 w 2 =3 w 3 = - 3 .9 4 8 5 It e - 1 , Pa t t er n - 3 y =1 b i as = 1 w 1 = - 19 y x Li ne - 1 x = 0 w 2 =3 w 3 = - 3 .9 4 8 5 It e - 1 , Pa t t er n - 4 y =1 b i as = 1 w 1 = - 19 158 (b) (c) Li ne - 1 y xx = 0 w 2 = - 2 .5 8 3 7 w 3 = - 9 .5 3 2 2 It e - 2 , Pa t t er n - 1 y =0 b i as = 1 w 1 = - 19 y x Li ne - 1 x = 1 w 2 = - 2 .5 8 3 7 w 3 =1 0 . 4 6 6 It e - 2 , Pa t t er n - 2 y =0 b i as = 1 w 1 = - 19 y x Li ne - 1 x = 1 w 2 = - 2 .5 8 3 7 w 3 =1 0 . 4 6 2 It e - 2 , Pa t t er n - 3 y =1 b i as = 1 w 1 = - 1 9 . 0 0 4 y x Li ne - 1 x = 0 w 2 = - 2 .5 8 4 w 3 =1 0 . 4 6 2 It e - 2 , Pa t t er n - 4 y =1 b i as = 1 w 1 = - 1 9 . 0 0 4 x = 0 y =0 Li ne - 1 y x w 2 = - 2 2 . 5 7 6 w 3 = - 9 .5 3 0 3 It e - 3 , Pa t t er n - 1 b i as = 1 w 1 = - 1 9 . 0 0 4 y x Li ne - 1 x = 1 w 2 = - 2 2 . 5 7 6 w 3 =1 0 . 4 6 8 It e - 3 , Pa t t er n - 2 y =0 b i as = 1 w 1 = - 1 9 . 0 0 4 y x Li ne - 1 x = 1 w 2 = - 2 2 . 5 7 6 w 3 =1 0 . 4 6 4 It e - 3 , Pa t t er n - 3 y =1 b i as = 1 w 1 = - 1 9 . 0 0 8 y x Li ne - 1 x = 0 w 2 = - 2 2 . 5 7 6 w 3 =1 0 . 4 6 4 It e - 3 , Pa t t er n - 4 y =1 b i as = 1 w 1 = - 1 9 . 0 0 8 159 (d) Figure 6.13: Evolution of weights at every iteration for training of line-1. (a) iteration-1, (b) iteration-2, (c) iteration-3, (d) iteration-4. Table 6.4: Training Summary of Line-2. Iteration No Pattern No Wt-1 Wt-2 Wt-3 1 1 1 3 -3 1 2 1 3 -3.9485 1 3 0.0038675 3 -4.9447 1 4 17.493 20.489 12.544 2 1 17.493 0.48876 -7.4559 2 2 17.493 0.48876 -7.4674 2 3 -2.5065 0.48876 -27.467 x = 0 y =0 Li ne - 1 y x w 2 = - 2 2 . 5 6 7 w 3 =1 0 . 4 6 4 It e - 4 , Pa t t er n - 1 b i as = 1 w 1 = - 1 9 . 0 0 8 y x Li ne - 1 x = 1 w 2 = - 2 2 . 5 7 6 w 3 =1 0 . 4 6 5 It e - 4 , Pa t t er n - 2 y =0 b i as = 1 w 1 = - 1 9 . 0 0 8 y x Li ne - 1 x = 1 w 2 = - 2 2 . 5 7 6 w 3 =1 0 . 4 6 1 It e - 4 , Pa t t er n - 3 y =1 b i as = 1 w 1 = - 1 9 . 0 1 2 y x Li ne - 1 x = 0 w 2 = - 2 2 . 5 7 6 w 3 =1 0 . 4 6 1 It e - 4 , Pa t t er n - 4 y =1 b i as = 1 w 1 = - 1 9 . 0 1 2 160 2 4 17.494 20.489 -7.4666 3 1 17.494 0.48881 -27.467 3 2 17.494 0.48881 -27.467 3 3 17.493 0.48881 -27.467 3 4 37.491 20.487 -7.469 4 1 37.491 0.48733 -27.469 4 2 37.491 0.48733 -27.469 4 3 17.492 0.48733 -47.468 4 4 37.492 20.487 -27.468 5 1 37.492 20.469 -27.487 5 2 37.492 20.469 -27.487 5 3 17.493 20.469 -47.486 5 4 37.491 40.467 -27.487 6 1 37.491 20.467 -47.487 6 2 37.491 20.467 -47.487 6 3 37.49 20.467 -47.488 6 4 37.491 20.468 -47.487 161 (a) (b) Figure 6.14: (a) Training summary of for obtaining weights of line-2. (b) Error plot for training line-2. -1 - 0 . 5 0 0 . 5 1 -1 - 0 . 5 0 0 . 5 1 X i n p u t Y i n p u t L i n e - 2 : S t e p w i s e P a r i t y f o r X O R P r o b l e m 1 2 3 4 5 6 10 -4 10 -3 10 -2 10 -1 10 0 10 1 I t e r a t i o n s E r r o r 162 Once the optimum weights of line-1 and line-2 are obtained from training, a 2-2-1-1 neural network is designed as shown in Figure 6.15(b). The network has 2 inputs (?x? and ?y?), 2 neurons in first hidden layer (each neuron representing line-1 and line2), 1 neuron (representing receptive field of class-1) in 2nd hidden layer, and single output. Figure 6.15(a) represents the schematic of XOR problem and the truth tables used for training of line-1 and line-2. The line-1 is trained such that it fires a value of +1 on the side of coordinate/ pattern (0,0), where as line-2 is trained such that it fires +1 on the side of coordinate/ pattern (1,1). A similar thing is represented by the two blue arrows as well as the truth tables given in Figure 6.15(a). Therefore, in Figure 6.15(b), the two neurons in first hidden layer represent equation of line-1 and line-2. Now to classify region belonging to class-1 in the feature space, an AND operator is designed in 2nd hidden layer of the neural trainer. The weights of this neuron of the AND operator are -1 for branch coming from the neuron of line-1. The reason for this is that since line-1 was trained to fire +1 on the side of pattern (0,0), and region of class-1 falls on the other side of line-1 where it is trained to fire -1. Hence branch of the AND operator connected to neuron of line-1 gets weight of -1. Similarly, branch coming from neuron of line-2 to the AND operator also gets a weight of -1, as region of class -1 falls on the side of line-2 where it fires -1. The weights of the bias is tuned randomly in the network such that the region of class-1 gets classified correctly, i.e. when the coordinates of the input space are used to simulate the network, the neuron in the 2nd hidden layer should fire +1 for coordinates falling in class-1. It should be noted that if the weights of the branches coming from neuron-1(line-1) and neuron-2 (line-2) to the AND operator are not correctly assigned (based on the objective i.e. to classify region for class-1 for this problem), then there is no value of bias on real number line, which can correctly classify the objective (region of class-1 in this problem). 163 (a) T r u th T a b le Wh i le T r a in ing L in e - 1 L in e - 1 is tr a i n e d t o fi re a 1 o n th e si d e i n d ica ted b y a rr o w. L in e - 2 is tr a i n e d t o fi re a 1 o n th e si d e i n d ica ted b y a rr o w. T r u th T a b le Wh i le T r a in ing L in e - 2 x y (0,0) (0,1) (1,1) (1,0) L ine - 1 L ine - 2 Clas s - 1 Clas s - 2 Clas s - 2 - 1104 1113 - 1012 - 1001 Ou t p utIn p ut - 2In p ut - 1P a t t e r n No - 1104 - 1113 - 1012 1001 Ou t p utIn p ut - 2In p ut - 1P a t t e r n No 164 (b) Figure 6.15: (a) XOR problem (b) Designed neural trainer. Figure 6.16 represents the computer simulation for the hard parity of the XOR problem. It can be seen in Figure 6.16(b), that when the designed network is simulated with the input coordinates of class-1, the output of network is +1 (3rd dimension of Figure 6.16(b)). Figure 6.16(c) is the top view of the region belonging to class-1 extracted in this computer simulation of the XOR problem. A similar analogy is scaled for multi-mode classification of failure where different regions in the feature space belonging to different failure modes are identified using supervised neural trainer. H i dde n L ay e r - 1 Inpu t L i ne - 1 L i ne - 2 Cl a s s - 1 x +1 y +1 - 1 - 1 b i a s = w 3 = - 1 . 1 w 1 = - 1 9 . 0 1 w 2 = - 2 2 . 5 7 b i a s = w 3 = 1 0 . 4 6 w 1 = 3 7 . 4 9 w 2 = 2 0 . 4 6 b i a s = w 3 = - 4 7 . 4 8 O ut put H i dde n L ay e r - 2 A ND O pe r at or 2 - 2 - 1 - 1 Ne t wor k 01321 ?????? wywxw 0146.1057.2201.19:1 ???????? yxL i n e 0148.4746.2049.37:2 ??????? yxL i n e 165 (a) (b) -1 - 0 . 5 0 0 . 5 1 -1 - 0 . 5 0 0 . 5 1 X i n p u t Y i n p u t G r a p h i c a l L a y o u t o f X O R P r o b l e m 166 (c) Figure 6.16: Computer simulation of XOR problem. (a) Simulated stepwise parity of XOR problem, (b) Validation of the designed neural trainer for XOR problem to classify region of class-1. (c) Top view of the validation of the designed trainer of XOR problem, with hard parity of region belonging to class-1. 6.6 Hard Parity and Multi-mode Classification of Failure Modes in Electronic Assemblies In this section, multi-mode classification of failure modes in electronic assemblies under drop and shock is performed with continuous tracking of damage initiation and progression. The assemblies used in this study are test vehicle-B (TABGA board) and test vehicle-A (CAVE Test board). Specifications of both the test vehicles are explained in chapter-4. For both test vehicles, two data sets are procured i.e. experimental and simulation data set. Simulation data set is 167 formed by explicit finite element simulations of the test assemblies. The test assemblies are error-seeded with various failure modes for different packages. Multiple simulations are run on the test assemblies and comprehensive data sets are formed. For experimental data set, the test assemblies are subjected to JEDEC drop in shock testing. Strain gauge data and high speed imaging in conjunction with digital image correlation is used for extraction of experimental data set. Both data sets are time domain in nature. Feature extraction is performed using joint time- frequency analysis (explained in chapter-1) of the data set. Figure 6.17 represents the sample time-frequency window for test vehicle-C. Figure 6.18 represents a sample frequency moment as a feature vector for test vehicle-C. Figure 6.19 shows the sample classification matrix orientation used for fault mode classification. The methodology developed in present study for failure mode identification in electronic assemblies under mechanical shock represents a complete solution of the classification problem. Sammon?s mapping is used for de-correlation of the feature space, which isolates the center of gravity of each impending failure mode in the feature space. Multilayer perceptron feed forward neural network is designed to extract hard decision boundaries between competing failure modes in the feature space. Figure 6.20 represents the schematic of various data processing sequences for performing real time fault monitoring in electronic assemblies under mechanical shock loads. 168 (a) (b) Figure 6.17: Sample time frequency distribution for test vehicle-C; (a) 3D view of time- frequency distribution (b) top view of time-frequency distribution. 169 Figure 6.18: Sample feature vector- frequency moment for test vehicle-C. (a) 0 100 200 300 400 2 . 8 3 3 . 2 3 . 4 3 . 6 3 . 8 4 x 1 0 -3 F r e q u e n c y ( H z) F r e q u e n c y M o m e n t s ( s e c ) 0 100 200 300 400 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 F r e q B i n S h o ckE ve n t 0 0 . 2 0 . 4 0 . 6 0 . 8 1 170 ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? M21 n M n 2 n 1n 2 M 2 2 2 12 1 M 1 2 1 11 fb...fbfbF re q B i n fm...fmfmS h o c k ....... fm...fmfmS h o c k fm...fmfmS h o c k ]X[ (b) Figure 6.19: Sample classification matrix orientation; (a) image of classification matrix (b) matrix Orientation. Figure 6.20: Data processing sequence implemented for fault isolation. C o mp l e t e So l u t i o n S t ra i n D a t a (T i m e D om a i n) F re que nc y M om e nt s (T F R D om a i n) S a m m on? s M a ppi ng (D e - c orre l a t i on of S pa c e ) S upe rvi s e d P a ri t y By M ul t i - L a ye r P e rc e pt ron ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? M21 n M n 2 n 1n 2 M 2 2 2 12 1 M 1 2 1 11 t...ttT i m e S c a l e s t r...s t rs t rS hoc k ....... s t r...s t rs t rS hoc k s t r...s t rs t rS hoc k Var i ables ObjectsObjects ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? M21 n M n 2 n 1n 2 M 2 2 2 12 1 M 1 2 1 11 fb...fbfbF re qB i n fm...fmfmS hoc k ....... fm...fmfmS hoc k fm...fmfmS hoc k Var i ables ObjectsObjects ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? 21 n 2 n 1n 2 2 2 12 1 2 1 11 ddD i m e ns i on yyS hoc k ... ... yyS hoc k yyS hoc k Vari ab les Ob jects Ob jects D e c i s i o n B o u n d a r y w i t h H a r d S e p a r a t i o n b e t w e e n F a i l u r e M o d e s ? 171 6.6.1 Training of Network for Hard Parity of Fault-Modes in Electronic Assemblies The targeted failure modes in this study are the pristine stage, stages with solder interconnect cracking, solder interconnect completely failed, chip delamination, chip cracking, and part fall off. Previous studies [Lall 2008, 2009, 2010] have shown that above failure modes are representative of a global set of failure modes, which cover most of the damage scenarios (partial, complete as well as mixed modes) in the electronics subjected to drop and shock. Table 6.5 represents the truth tables used for parity of various failure modes for the two test vehicles (TV-B and TV-C) respectively. Figure 6.21 and Figure 6.22 represent the training of the single layer perceptron used for parity of each targeted failure modes under consideration in the two test vehicles. The green lines represent various iterations and the colored line represents the optimum equation of the line representing the error across the layer of the single perceptron being lower than the specified value (0.001). Figure 6.21 and Figure 6.22 also show the evolution of the error while training is performed for parity of each failure mode in the two test assemblies. Table 6.5: Truth table for parity (test vehicle-B and test vehicle-C), (a)healthy, (b)solder completely failed, (c)chip cracking, (d) chip de-lamination, (e) part fall off (a) Failure Mode Label Desired Output Healthy H 1 (Target) Solder Cracking SC -1 Solder Missing SM -1 Chip Cracking CC -1 Chip Delamination CD -1 Part Fall Off PF -1 172 (b) Failure Mode Label Desired Output Healthy H -1 Solder Cracking SC -1 Solder Missing SM 1 (Target) Chip Cracking CC -1 Chip Delamination CD 1 Part Fall Off PF -1 (c) Failure Mode Label Desired Output Healthy H -1 Solder Cracking SC -1 Solder Missing SM -1 Chip Cracking CC 1 (Target) Chip Delamination CD 1 Part Fall Off PF 1 (d) Failure Mode Label Desired Output Healthy H -1 Solder Cracking SC -1 Solder Missing SM -1 Chip Cracking CC -1 Chip Delamination CD 1 (Target) Part Fall Off PF -1 173 (e) Failure Mode Label Desired Output Healthy H -1 Solder Cracking SC -1 Solder Missing SM -1 Chip Cracking CC -1 Chip Delamination CD -1 Part Fall Off PF 1 (Target) (a) (b) 0 10 20 30 40 50 10 -4 10 -3 10 -2 10 -1 10 0 10 1 I t e r a t i o n s E r r o r 0 100 200 300 400 500 600 10 -3 10 -2 10 -1 10 0 10 1 I t e r a t i o n s E r r o r 174 (c) (d) (e) Figure 6.21: Training for the parity of feature space test vehicle-C (a) healthy (b) interconnect completely failed (c) chip cracking (d) chip de-lamination (e) part fall off. 1 1 . 2 1 . 4 1 . 6 1 . 8 2 10 -4 10 -3 10 -2 10 -1 10 0 10 1 I t e r a t i o n s E r r o r 0 5 10 15 20 10 -4 10 -3 10 -2 10 -1 10 0 10 1 I t e r a t i o n s E r r o r 0 20 40 60 80 100 10 -3 10 -2 -1 10 0 10 1 I t e r a t i o n s E r r o r 175 (a) (b) (c) 0 10 20 30 40 50 60 10 -3 10 -2 10 -1 10 0 10 1 I t e r a t i o n s E r r o r 0 500 1000 1500 2000 2500 3000 10 -3 10 -2 10 -1 10 0 10 1 I t e r a t i o n s E r r o r 0 50 100 150 200 250 300 10 -3 10 -2 10 -1 10 0 10 1 I t e r a t i o n s E r r o r 176 (d) (e) Figure 6.22: Training for the parity of feature Space test vehicle-B (a) healthy (b) interconnect completely failed (c) chip cracking (d) chip de-lamination (e) part fall off. Once stepwise parity of the feature space is performed, decision boundaries between different regions of the feature space representing different failure modes are formed in the form of lines. A hyper region is extracted from the feature space by performing AND operation [Jain 1996, Wilamowski 2007] on the layer of neuron used for stepwise parity of the feature space. Figure 6.23 shows the schematic of the artificial neural network designed for identification of the region in the feature space belonging to each particular dominant fault mode. 0 20 40 60 80 10 -3 10 -2 10 -1 10 0 10 1 I t e r a t i o n s E r r o r 0 10 20 30 40 10 -4 10 -3 10 -2 10 -1 10 0 10 1 I t e r a t i o n s E r r o r 177 The designed network is a 2-5-6-6 networks i.e. (2 inputs, 5 neurons in 1st hidden layer, 6 neurons in 2nd hidden layer and 6 outputs). Once stepwise supervised parity of all the targeted failure modes is performed, the 1st hidden layer of the neural network (Figure 6.23) is designed. Each neuron in 1st layer is represented by a line equation which is partitioning the failure mode under consideration from other failure modes in the feature space. The 2nd hidden layer of the neural network represented in Figure 6.23 consists of 6 neurons. Each neuron in this layer is representing each targeted failure mode in the given feature space. The 2nd hidden layer is a layer of ?AND? operators [Jain 1996, Wilamowski 2007] where the weights of the neurons are tuned in such a way that each intended neuron gives an output of 1 for each particular targeted failure mode in the feature space. Table 6.6 represents the training summary of each single layer perceptron used for stepwise supervised parity of each targeted dominant failure mode for both test vehicles, where learning rate was ?=0.1 and gain was k=10 for all the cases. Table 6.7 represents the weights of 2nd hidden layer of the network. 178 Figure 6.23: Schematic of designed neural network used for fault mode classification in test assembly-B. Table 6.6: Weights of hidden layer-1: (a) test vehicle-C (b) test vehicle-B. (a) Neuron No Input-1 Input-2 Bias 1 0.92 0.45 -4.25 2 -0.004 -2.12 -1.48 3 -2.06 0.10 -3.40 4 -0.43 -0.67 -4.0 5 -0.19 0.86 -3.81 (b) Neuron No Input-1 Input-2 Bias 1 0.91 0.90 -5.79 2 2.96 -0.76 0.67 3 -1.44 0.08 -7.14 4 -0.98 1.44 -8.52 5 -0.90 -0.76 -4.62 In pu t L ay er Hidd en L ay er - 1 Hidd en L ay er - 2 Ou tpu t L ay er Sol der Cr ac ki ng Sol der Miss ing Pa rt Fall O ff Chip Dela min ation Chip Cra ck in g AN D Op er ator s In p u t Dime n s io n - 1 In p u t Dime n s io n - 2 1 2 3 4 5 +1 bi as +1 bi as 6 7 9 10 11 8 Contact Su rfa ce re prese n t ing Delamin atio n Conta ct surfa ce at crack l oca ti on (a ) One I n terconnect Missing (b) Two Int e rc onnec ts Missi ng (c ) Three In terconnects Mi ssi ng (d) Four I n terconnects M iss ing He althy 179 Table 6.7: Weights of hidden layer-2: (a) test vehicle-C (b) test vehicle-B. (a) NeuronNo Neuron-1 Neuron-2 Neuron-3 Neuron-4 Neuron-5 Bias 6 1 -1 0 0 -1 -1.5 7 -1 1 -1 -1 0 -3 8 -1 -1 -1 0 -1 -2.1 9 0 -1 1 0 -1 -2 10 0 0 1 1 0 -1.1 11 0 0 1 0 1 -1.1 (b) NeuronNo Neuron-1 Neuron-2 Neuron-3 Neuron-4 Neuron-5 Bias 6 1 1 0 -1 0 - 1.5 7 -1 1 0 0 -1 - 2 8 0 -1 -1 -1 -1 - 3.5 9 0 0 1 -1 -1 - 2 10 -1 0 -1 1 0 - 1.1 11 0 -1 -1 0 1 - 1.1 6.6.2 Results of Classification of Failure Modes in Test Assemblies In this section the potential of classifying different dominant failure modes using supervised parity of the feature space is investigated. Two data sets are formed i.e. a simulation data set and an experimental data set are created. Simulation data set is created by simulating JEDEC drop phenomenon using explicit finite element models. Various kinds of failure modes such as healthy state, partial inter-connect fracture, complete interconnect failure, chip cracking, chip delamination, part fall off etc. are simulated. The error-seeded simulations of the respective test assemblies are performed by exclusively error-seeding the simulation model with each 180 particular failure mode each time. Successive simulations are performed with various mentioned failure modes for different locations in the test assemblies. Transient strain histories are extracted for both test vehicles with different failure mode on board side as well as package side. Hence the simulation data set procured by explicit finite element modeling has wide fault coverage for both test vehicles respectively. Experimental data set is also formed by subjecting the respective test vehicles to mechanical shock in JEDEC orientation. The strain histories for various packages and different locations of the board are extracted using strain gages as well as using high speed imaging in conjunction with digital image correlation. The experimental data consists of strain histories for various successive shock events of the test vehicles. The strain histories range from pristine state to states of the board with some accrued damage when deployed to a complete failure of the package on the board. Hence the experimental data set contains strain history information of the board from healthy state to a complete failed state where the package as well as board has lost functionality in the system. Once the two data sets are formed, the time domain strain histories are processed in Joint time-frequency domain. Joint Time-frequency based frequency moments for all the strain histories of both the data sets are used to form the pre-failure feature space. The input variance in the feature space formed by the two data sets i.e. experimental and simulation data sets is based on the strain histories obtained by the shock events of the test assemblies and drop simulation of the test assemblies respectively. The de-correlation of the pre-failure feature space is performed, using Sammon?s mapping. De-correlation of the feature space isolates center of gravity of each impending failure mode. Table 6.8 summarizes the Sammon?s stress factor (SS ) for various cases. Hard separation 181 between different failure modes in the feature space is obtained using stepwise supervised parity of the feature space. Figure 6.24 represents the designed feed-forward multi-layer perceptron neural network for test vehicle-C. The strain histories used to form simulation data set are obtained from error-seeded finite element model. The simulation models are error-seeded exclusively with one particular failure mode each time. Hence it is known ahead of time which shock event in the classification matrix of the simulation data set belongs to which particular failure mode. In stepwise supervised parity of the feature space of each known failure mode is taken as target which is segregated from the rest of the known shock events. The designed network in Figure 6.24 is a 2-5-6-6 networks i.e. (2 inputs, 5 neurons in 1st hidden layer, 6 neurons in 2nd hidden layer and 6 outputs). The 6 output neurons signify classification of the 6 targeted dominant failure modes. Table 6.9Table 6.9 represents the nomenclature used for classification of dominant failure modes in the feature space and Table 6.10, summarizes the relevance of each neuron in the designed network for test vehicle-C. Neurons in hidden layer-1 of the network (Figure 6.24) are used for stepwise parity of each failure mode; hence in a 2-dimensional space, each neuron represents an equation of line. Neurons in hidden layer-2 represent receptive field of each neuron i.e. region of the feature space belonging to each failure mode. Hence each neuron in layer-2 represents an equation of a plane. Figure 6.25 shows the classification of the feature space formed by simulation data set of test vehicle?C. Once the various dominant failure modes are classified in simulation data set, classification is performed on the experimental data set. As in experimental data set, the strain histories are obtained by physically subjecting respective test vehicles to mechanical shock in JEDEC orientation. Hence in a practical scenario, multiple modes of failure can occur 182 simultaneously in various competing locations on the board. Hence it is unknown which failure mode/modes are present in each drop event in the classification matrix formed by experimental data. In order to classify dominant failure modes in experimental feature space, the classification matrix for the experimental data set is de-correlated using Sammon?s mapping. The extracted de- correlated feature space is superimposed on the simulation de-correlated space. Since supervised parity was performed on the simulation feature space, hence it is know which region in the feature space and which shock event in the simulation data set belongs to what failure mode. The overlapping of experimental feature space on simulation feature space helps in identification of different dominant failure modes present in the experimental data set. Figure 6.26 shows the overlapped de-correlated feature spaces for classification of different impending failure modes in the experimental data set of Test Vehicle-C. Since drop events in experimental data set could have multiple modes of failure occurring simultaneously, hence when the de-correlated experimental feature space is overlapped on simulation feature space, the different shock events of experimental data set populate and migrate different regions of the simulation feature space belonging to different failure modes based on extent of severity of each failure mode present in a shock event. Since test vehicles are subjected to subsequent shock event from a pristine state to a complete failure state, therefore in every drop event the severity of different dominant failure modes can vary with shock events in time. It is also seen that a few shock events in experimental data sets of the respective test assemblies fall very close to the parity lines or some shock events do not fall in any of the targeted failure mode regions in the feature space as they may consist of mixed modes of failure with different failure modes equally dominant in the drop event. Also it is seen that pristine experimental drop event and healthy simulation of the test vehicle fall close to each other in the classification result. 183 Table 6.8: Summary of de-correlation of feature space by Sammon's mapping. Test Vehicle Data Set SSF A Simulation 0.02 A Experiment 0.018 B Simulation 0.017 B Experiment 0.047 Table 6.9: Nomenclature of dominant failure modes Fault Mode Label Healthy (Pristine Simulation) H Inter-connect cracking SC Inter-connect completely failed SM Chip Cracking CC Chip Delamination CD Part Fall Off PF Pristine (Experimental Drop-1) Pristine Other Experimental Shock Events Experiment Table 6.10: Relevance of each neuron in the designed network (test vehicle-A). Neuron Number Fault Mode Significance 1 H Stepwise Parity 2 SM Stepwise Parity 3 CC Stepwise Parity 4 CD Stepwise Parity 5 PF Stepwise Parity 6 H Receptive Field 7 SM Receptive Field 8 SC Receptive Field 9 CC Receptive Field 10 CD Receptive Field 11 PF Receptive Field 184 Figure 6.24: Designed feed-forward neural network for fault isolation (test vehicle-A). Similar study was also performed on the test vehicle-B. Figure 6.27 shows classification simulation feature space of test vehicle-B. Figure 6.28 shows the classification result in the experimental data set of test vehicle-B. As similar results were seen for classification of different fault modes, therefore methodology presented in this work is repeatable with different board designs. Table 6.11 represents the summary of the designed multi-layer perceptron neural network for fault monitoring. 185 Figure 6.25: Classified simulation feature space of test vehicle-A. Figure 6.26: Classification in experimental data set. Overlapped experimental and simulation feature space of test vehicle-A. -6 -4 -2 0 2 4 6 -5 0 5 D i m e n s i o n - 1 D i m e n s i o n - 2 H CC SC SM CD PF D i m e n s i o n - 2 D i m e n s i o n - 2 D i m e n s i o n - 2 -6 -4 -2 0 2 4 6 -5 0 5 D i m e n s i o n - 1 D i m e n s i o n - 2 H CC SC SM CD PF D i m e n s i o n - 2 D i m e n s i o n - 2 186 Figure 6.27: Classified simulation feature space of test vehicle-B. Figure 6.28: Classification in experimental data set. Overlapped experimental and simulation feature space of test vehicle-B. -6 -4 -2 0 2 4 -6 -4 -2 0 2 4 D i m e n s i o n - 1 D i m e n s i o n - 2 HCC SC SM PF CD D i m e n s i o n - 2 D i m e n s i o n - 2 -6 -4 -2 0 2 4 -6 -4 -2 0 2 4 D i m e n s i o n - 1 D i m e n s i o n - 2 HCC SC SM PF CD D i m e n s i o n - 2 D i m e n s i o n - 2 187 Table 6.11: Summary of classified failure modes. Output with Neuron Number Inference on Fault Mode 6 7 8 9 10 11 1 -1 -1 -1 -1 -1 H -1 1 -1 -1 -1 -1 SM -1 -1 1 -1 -1 -1 SC -1 -1 -1 1 -1 -1 CC -1 -1 -1 -1 1 -1 CD -1 -1 -1 -1 -1 1 PF -1 -1 -1 -1 -1 -1 Some Mixed Mode -1 -1 -1 -1 -1 -1 Outlier or In- competent trainer 6.7 Validation of Classified Failure Modes The failure modes classified by parity of the pre-failure feature space defined by time- frequency based frequency moments of strain histories of different shock events are validated in this section. The fault modes classified by the present approach are also validated by simulation of the designed artificial neural networks used for parity of different regions of the feature space belonging to different fault modes in the feature space. Statistical validation of isolated failure modes is also performed using Multivariate Analysis of Variance (MANOVA) and Hotelling?s T-square. Finally the isolated fault modes in the feature space are also validated from experimental cross-sections of the failed packages on the test assembly. 188 6.7.1 Simulation of the Designed Neural Network The failure modes classified in the feature space are validated by simulation of the designed neural network used for parity of the feature space for identification of the region in the feature space belonging to each particular targeted failure mode. Hard parity between various impending failure modes is achieved in this study. Table 6.11 represents the summary for fault mode inference from the designed feed-forward network. The network is trained and its weights are tuned in such a way that following combinations of output (Table 6.11) can be obtained from the network. Each neuron in the output layer of the network belongs to a particular failure mode. The weights of the second hidden layer are tuned such that every time a single neuron will fire a value of 1, while the rest of the neurons will fire a value of -1. When the network is simulated with the experimental features, the neuron firing a value of 1, will signify that a particular failure mode is dominant in that particular shock event. As severity can vary and also changes with shock events in time, hence all the neurons can also fire a value of -1 indicating, that some mixed mode is dominant or the feature of the experimental data set is an outlier. Figure 6.24 represents the designed neural network used for fault isolation and identification of the region in the feature space belonging to each targeted failure mode. It consists of 6 neurons in the 2nd hidden layer, where each neuron will output the region belonging to each particular targeted failure mode. Figure 6.29 and Figure 6.30 give results from the simulation of the designed neural network (in Figure 6.23 and Figure 6.24) for various error- seeded failure modes in the test vehicle-B and test vehicle-C. Since stepwise parity of the feature space is performed and desired output of each neuron in the 2nd hidden layer of the network is 1 as it represents each targeted failure mode. Therefore from Figure 6.29 and Figure 6.30, it can be seen that each neuron is giving an output of 1, if the coordinates of the input feature space are 189 used to simulate the network. Activation of each neuron with an output of 1 provides a receptive field of each neuron in the feature space, which directly signifies the region in the failure space belonging to each failure mode. Each region of the feature space belonging to each particular failure mode can be seen in the third dimension or in the top view of the Figure 6.29 and Figure 6.30, where the output is seen as 1. Hence the designed neural network for the two test vehicles (Figure 6.23 and Figure 6.24) is able to correctly classify the input feature space defined by joint time-frequency based frequency moments of the strain histories obtained from shock testing of the respective test vehicles. It should also be noticed that, the proposed methodology is a generic approach which can be used for real time fault monitoring of the electronic assemblies under shock load. The methodology not only successfully classifies different dominant failure modes, but also addresses damage initiation and progression in time. Any neuron firing a value of 1 when a new shock feature is presented to the network can be inferred as initiation of that particular failure mode. Hence the network is able to track occurrence of damage initiation and progression in time along with classification. Hence technique proposed is inclusive of both, i.e. damage initiation and progression as well as fault-isolation. (a) O u tp u t 190 (b) (c) (d) O u tp u t O u tp u t O u tp u t 191 (e) (f) Figure 6.29: Validation of the failure modes by simulation of the designed network. Test vehicle-C, (a) healthy, (b) inter-connect cracking (c) interconnect completely cracked, (d) chip cracking, (e) chip de-lamination, (f) part fall off. O u tp u t O u tp u t 192 (a) (b) (c) O u tp u t O u tp u t O u tp u t 193 (d) (e) (f) Figure 6.30: Validation of the failure modes by simulation of the designed network. Test Vehicle-B, (a) healthy, (b) inter-connect Cracking (c) interconnect completely cracked, (d) chip cracking, (e) chip de-lamination, (f) part fall off. O u tp u t O u tp u t O u tp u t 194 6.7.2 Statistical Validation: Multivariate Analysis of Variance (MANOVA) In this section multivariate analysis of variance is performed to see if there is a significant bifurcation in the inherent patterns of different classes (fault modes) in the classification matrix. Mean being a measure of central tendency of the data, hence if the means of different inherent classes are statistically not different, then it signifies that the classes are completely diluted in the data, hence classification of the different patterns in the data will yield no meaningful result. MANOVA is performed to check if the means of different classified failure modes are statistically different or not. Wilk?s lamda is the test statistic used for hypothesis testing. Likelihood ratio test is used for finding Wilk?s Lamda test statistic. It is given by the following equation, 2/n 0? ? n e d M LU n c o n s t r a i d M LC o n s t r a i n e ?? ? ? ? ?? ? ? ? ? ???? (25) where, ?? is the estimate of covariance by maximum likelihood function under alternate hypothesis and 0?? is estimate of covariance by maximum likelihood function under null hypothesis. Likelihood Function is given as, ? ? ? ? ?????? ??????????? ?? ?n 1i i1i2/n2/np 'x'x21e x p)2( 1),(L (26) where n is the degree of freedom, p is the dimensionality, ? is the estimate of covariance and ? is the mean. Table 6.12 represents the results of MANOVA performed on the features which populate the partitioned pre-failure space with different regions of the feature space belonging to different fault modes. A p-value of less that 0.05 signifies that statistically there is 95% 195 confidence that if not all, at least one of the means of the classified failure mode is significantly different from the means of the other classified failure modes. Table 6.12: Multivariate analysis of variance. (a) test vehicle-C (b) test vehicle-B. (a) Test-C Statistic Value F-Value Pr>F Simulation Data Wilk's Lamda 0.015 7.07 0.0024 Experiment Data Wilk's Lamda 0.017 29.67 <0.0001 (b) Test-B Statistic Value F-Value Pr>F Simulation Data Wilk's Lamda 0.067 6.83 <0.0001 Experiment Data Wilk's Lamda 0.115 6.61 <0.0001 6.7.3 Statistical Validation: Hotelling?s T-square Table 6.13 and Table 6.14 represent the similarity between different isolated failure modes in respective test assemblies for simulation and experimental data sets. The existing similarity between different isolated failure modes is calculated using Hotelling?s T-square test, which is given by following equation. ? ?? ? ? ? )pn,p(Fpn p)1n(xSxnT 0102 ????????? ?? (27) Here, ?n? is the number of observation in each class and ?p? signifies dimensionality of the observation. The above T-square formula tests, if the mean of the class x is equal to ?0 or not. The T-square statistic follows a scaled f-distribution and takes into account the covariance ?S? of the data set. A value less than 0.05 indicates statistical dissimilarity between the two 196 classes. Results indicate that different failure modes are dissimilar and that the main diagonal terms which are intended to be similar show a p-value of 1. Table 6.13 represents similarity between the classified failure modes (Figure 6.25 and Figure 6.27) using simulation data only. Table 6.14 represents similarity between the isolated failure modes in the experimental data as seen in Figure 6.26 and Figure 6.28. Since the two feature spaces i.e. the simulation feature space and experimental feature spaces are overlapped for classification of the dominant failure modes in experimental data, hence combined similarity matrix for the two data sets is represented by Table 6.15, where shock features of each data set falling in each region of failure mode are compared with shock feature of each data set in each fault mode region separately. The presented approach for fault mode classification not only addresses fault isolation in the electronics subjected to mechanical shock, but it also addresses damage initiation and progression. Inference on damage initiation and progression can also be drawn from similarity tables of the respective test vehicles. If cluster of healthy region is compared with cluster of different fault modes, it is seen that statistically there is significant difference between the clusters. The healthy cluster and clusters of different failure modes contain shock features of different shock events and as these events proceed in time, the damage progresses which leads to increased dissimilarity between the features falling in healthy regions and that in region of failure in the feature space. Therefore, statistically also damage detection can be addressed by the technique presented in this work. 197 Table 6.13: Similarity of simulation data set. (a) test vehicle-C (b) test vehicle-B. (a) (b) T e s t - C H SC SM CC CD PF H 1K 0 . 1 0 . 5 0 . 2 0 . 6 0 SC 1K 0 . 1 0 . 6 0 . 8 0 . 1 SM 1K 0 0 . 9 0 . 6 CC 1K 0 . 1 0 . 3 CD 1K 0 . 2 PF 1K D i a g o n a l M a t r i x S i g n i f i c a n c e L e v e l 95 % 1 K= 100 ; A l l V a l u e s D i v i d e d by 1 K . 1KPF 01KCD 0 . 30 . 21KCC 0 . 900 . 11KSM 00 . 10 . 70 . 41KSC 0 . 30 . 50 . 10 . 60 . 21KH PFCDCCSMSCHTest - B D ia g o n a l M a tr ix Sign i f i c a n c e L e v e l 9 5 % 1 K = 1 0 0 ; A ll V a l u e s D ivid e d b y 1 K . 198 Table 6.14: Similarity of experimental data set. (a) test vehicle-C (b) test vehicle-B. (a) (b) T e st - C H SC SM CC CD PF H 1K 0 . 1 0 . 3 0 . 6 0 0 . 1 SC 1K 0 . 4 0 . 9 0 . 7 0 . 7 SM 1K 0 . 7 0 . 4 0 . 1 CC 1K 0 . 5 0 CD 1K 0 . 3 PF 1K D i a g o n a l M a t r i x S i g n i f i c a n c e L e v e l 95 % 1 K= 100 ; A l l V a l u e s D i v i d e d by 1 K . 1KPF 0 . 41KCD 0 . 80 . 31KCC 0 . 70 . 20 . 11KSM 0 . 10 . 50 . 60 . 31KSC 00 . 40 . 70 . 60 . 11KH PFCDCCSMSCHT est - B Diag o n al M atr ix Sig n i f i ca n c e L e v el 9 5 % 1 K= 1 0 0 ; A ll V al u es Div id ed b y 1 K. 199 Table 6.15: Combined similarity (Experimental space overlapped over simulation feature space). (a) test vehicle-C (b) test vehicle-B. (a) (b) S im u la t io n E x p e r i m e n t S i gn i f i c an c e L e ve l 90% ; 1K = 100; A l l V al u e s D i vi d e d b y 1K T e s t - C H SC SM CC CD PF H 94 0 . 6 0 . 2 0 . 4 0 . 3 0 . 2 SC 0 . 1 92 0 . 1 0 . 3 0 . 6 0 . 8 SM 0 0 . 2 92 0 . 5 0 . 2 0 . 7 CC 0 . 2 0 . 4 0 . 6 97 0 . 3 0 . 9 CD 0 . 7 0 . 5 0 . 2 0 . 7 93 0 . 5 PF 0 . 5 0 . 1 0 0 . 1 0 . 6 95 Si m ul a ti o n Ex per i m ent S ign i f icance L e v e l 90% ; 1K=100; All Valu e s Divi d e d b y 1 K 92000 . 10 . 40 . 2PF 0 . 7990 . 10 . 700 . 4CD 0 . 30 . 1950 . 30 . 80 . 7CC 0 . 800 . 2980 . 60 . 1SM 0 . 20 . 50 . 40 . 1930 . 2SC 00 . 30 . 80 . 2091H PFCDCCSMSCHT est - B 200 6.7.4 Validation by Experimental Cross Sections Test Vehicles with respective failure modes are also validated by experimental cross- sections. The cross-sectioning of the samples is performed once the package has lost functionality and are completely failed. The samples are cross-sectioned and SEM images of the failed samples are shown in Figure 6.31. The cross-sections of the failed samples are used of identifying the site of actual damage taking place in the package. Figure 6.32 shows the schematic of the five types of failure modes (A, B, C, D and E) classified using experimental cross-sections and SEM images. Previously studies [Lall 2009, 2010] have shown the inter-connect fracture as the most dominant failure mode in electronic systems subjected to drop and shock. The most dominant failure mode cited based on the experimental cross-sections in this study is also inter-connect fracture. A similar trend of this dominant failure mode is also seen in Figure 6.26 and Figure 6.28 which is based on stepwise supervised parity of the feature space. The receptive fields of neurons representing region of solder inter-connect cracking and complete failure are seen to be the largest from the stepwise parity of the pre-failure feature space. Also qualitatively it can be seen in Figure 6.29, that regions belonging to interconnect cracking and interconnect completely failed are largest and most populated with the shock features, hence it can be concluded that inter-connect fracture is the most dominant failure mode seen in the test assemblies when subjected to mechanical shock. Also some shock features are also seen in chip cracking and chip de-lamination regions in Figure 6.26 and Figure 6.28. As in a practical scenario multiple modes of failure can occur simultaneously when test vehicles are subjected to subsequent shock events, therefore it is possible that chip cracking and chip de-lamination if not dominant, have at least initiated in the test assemblies and eventually progressing towards imminent failure. Hence the 201 technique presented in this work, is not only effective in classifying dominant failure modes, but also isolates failure modes initiation and progression with time. (a) (b) Figure 6.31: Experimental cross sections with interconnect fracture. 202 Figure 6.32: Failure Modes, (a) resin crack (b) solder-copper pad on PCB-side(c) solder-copper pad on package-side (d) copper trace failure. 6.8 Conclusion In this study, fault isolation approach for prognostication and heath monitoring of electronic systems subjected to mechanical shock is presented. The technique proposed in this work is capable of fault mode classification/identification which primarily falls in second stage of structural health monitoring. Neural network based framework is implemented in this study to test assemblies for real time monitoring of damage initiation and fault isolation. Two data sets i.e. a simulation data set and experimental data sets are made. The simulation data set is formed by extracting strain histories for error-seeded finite element models. The simulation models are error-seeded exclusively with one particular type of failure mode. The experimental data set is formed by subjecting the test vehicles to the successive JEDEC drops. The strain histories are extracted using strain gages and high speed imaging in conjunction with digital image correlation. The two comprehensive data sets are used as input variance in the feature space. Sammon?s mapping is used to de-correlate the pre-failure feature space. Hard S u bs t ra t e P C B A B D C op p e r E C 203 parity of the de-correlated space is performed using multilayer perceptrons. Feature vectors derived from joint time-frequency analysis of shock signals are used to create feature space for respective test assemblies. Various dominant failure modes are classified by parity of the pre-failure feature space. The parity is performed using stepwise supervised training of a single perceptron. Back propagation learning algorithm is used for stepwise parity of each particular failure mode. The classified failure modes and failure regions belonging to each particular failure mode in the feature space are also validated by simulation of the designed neural network used for parity of feature space. Statistical similarity and validation of different classified dominant failure modes is performed by multivariate analysis of variance and Hotelling?s T-square. The results of different classified dominant failure modes are also correlated with the experimental cross- sections of the failed test assemblies. The methodology presented in this work is a data driven approach with supervised learning characteristics. 204 7 Chapter-7 Self Organization of Failure Modes in Electronic Systems under Drop Impact 7.1 Introduction This chapter presents approach for development of a prognostic decision framework for electronic systems using neural network based on self organization theory. Fault-mode isolation and mode classification is performed by artificial neural network (ANN) approach on the drop data sets from test assemblies under drop and shock. Artificial neural networks has been previously applied in other scientific disciplines such as medicine [Khan 2001], power systems [Adepoju 2007, De 2002, Haque 2005], business [Mahmood1995], bioinformatics [Wang 2000, 2001], image processing [Chalabi 2008, Mahonen 1995, Petersena 2002], civil structures [Efstathiadesa 2007], texture analysis [Kaski 1999], software management [Fong 2007], telecommunication [Kylv?j? 2004], and speech recognition [Jalanko 1978]. In previous chapters techniques have been developed based on statistical pattern recognition for leading indicators of impending failure and detection of damage initiation and progression. Feature vectors have been developed based on Mahalanobis distance, wavelet packet energy decomposition, joint time-frequency analysis in the time-frequency window, and autoregressive moving average. In chapter-5 a method for feature based fault mode identification using a linear projection scheme i.e. Karhunen-Lo?ve transform (KLT) has been developed. In chapter-6 supervised learning is used for developing multilayer perceptron feed-forward network for monitoring of fault modes in test assemblies under shock. The present chapter explores the use of unsupervised learning for the health monitoring of electronic systems using neural nets for 205 identification of failure modes. Pre-failure feature space formed by joint time-frequency distribution is used for classifying different fault modes. Area array assemblies have been exposed to shock and feature vectors constructed to track damage initiation and progression. Multiple failure modes have been classified using unsupervised learning theory of self organizing maps. Early classification of multiple failure modes in the pre-failure space using unsupervised learning presented in this chapter is a novel application to electronics. 7.2 Self Organized Mapping (SOM): Overview Self organized mapping algorithm is an artificial intelligence based approach. It has unsupervised learning characteristics, with no target. It is used for non-linear mapping of high dimensional data on a lower dimensional space which leads to dimensional reduction and abstraction of information. Self organized maps (SOM) are also called topology preserving maps/ Kohonen network [Kohonen 1982, 1995]. SOM maps consist of a lattice of neurons or nodes which are excited by input patterns. The lattice is usually 1-dimensional or 2-dimensional Figure 7.2. The SOM is based on Kohonen network which primary works on competitive learning schemes. The excited lattice of neurons competes with each other and each excitation gives one winning neuron. The winner is called winner-takes-all. The neurons are excited randomly with input patterns and tuned by competitive learning process in such a way that they attain an ordered location in the lattice which is indicative of the intrinsic statistical feature of the input patterns. Self organized mapping is an unsupervised neural network based approach. Hence it is inspired by functioning of a human brain. Figure 7.1 represents the cyto-architectural map of cerebral cortex, where different regions of the brain respond to different media, i.e., if one wants to speak then a certain region of the brain assigned for speaking will respond, if one wants to 206 anticipate then a certain region of the brain assigned for anticipation will respond. Hence brain is a topologically ordered map, where different regions/parts of the brain or cerebral cortex respond to different activities or media. A similar analogy is implemented in self organization algorithm, which classifies different classes in a high dimensional data set onto a topologically ordered lattice of 2-dimensional neurons (Figure 7.2). In this research work, self organization algorithm is implemented to the data sets procured from drop and shock testing of the electronic test assemblies under study. The main idea of using self organization algorithm on these data sets is to classify different fault modes as data sets have wide fault coverage from pristine state to a state of partial failure to a complete failed state. Therefore, the idea is to identify which region in the feature space responds to what failure mode. This can also be understood as drawing inference of cerebral cortex of the feature space where different regions respond to different failure modes. Figure 7.1 : Neuro-biological motivation to self organized mapping. Cyto-architectural map of cerebral cortex. M e m ory of S ound S i ght Im a gi na t i on C o o r d i n a t i o n o f P h y s i c a l A c t i o n O b j e c t N a m i n g P l a n n i n g E m o t i o n J u d g m e n t s V i s ua l M e m ory A nt i c i pa t i on In i t i a t i o n o f V o l u n t a ry M o v e m e n t P a i n P r e s s u r e P o s i t i o n P ro c e s s i n g o f M u l t i - s e n s o ri a l In fo rm a t i o n T a c t i l e In fo rm a t i o n 207 Classification by self organized mapping algorithm involves three stages. SOM is a power algorithm for classification of similar patterns in multi-dimensional data sets. It has 3 stages of training i.e. competition, co-operation, and adaptation. Here ?X? is a classification matrix of size n by m of a multi-dimensional data given by eq.1. Figure 7.2: Schematic of Kohonen layer. ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ???? ? ? ? ? Mv a r..3v a r2v a r1v a rV a ri a b l e s x..xxxNP a t t e rn ....... x..xxx2P a t t e rn x..xxx1P a t t e rn X N M N 3 N 2 N 1 2 M 2 3 2 2 2 1 1 M 1 3 1 2 1 1 (1) ( a ) Input la ye r Kohonen la ye r x 1 x 2 W inni ng N e ur on Ne i g hborh ood N e ur ons 208 Self organized mapping algorithm will map each pattern in the matrix X (continuous input space) onto a discrete output space of 2-dimesional lattice of neurons. This two dimensional lattice of neurons get trained by self organization such that neurons on the lattice representing similar structures of variance in matrix X are topologically ordered close to each other. This ensures clustering of similar patterns in the input data ?X?, visualized in the discrete output space by trained lattice of neurons. Figure 7.3 represents the mapping of input continuous space and discrete output space. Here for visualization purpose the continuous input space is taken as 2-dimensional but in general it is of a higher dimension (> 2). Figure 7.3: Schematic for mapping feature from continuous input space and discrete output space. 0 2 4 6 8 10 12 0 2 4 6 8 10 12 14 16 D i s c r e t e O ut put Spac e X - di re c t i on Y - di re c t i on Cont i nuous Inpu t Spac e w i i (x ) F e at ur e Map S pre a d of N e urons i n X - D i re c t i on S pre a d of N e urons i n Y - D i re c t i on 209 7.3 Training of Network by Self Organization The three stages of self organization algorithm are describes as follows for classification of matrix X represented in eq.1. 7.3.1 Competition: Self organization of the input matrix ?X? is a feed-forward multilayer perceptron artificial neural network [Haykin 1999]. The network is based on competitive learning where the linear neurons compete between themselves to get activated, the result of the competition is seen in terms of only the winning neuron being activated or fired at any given time while rest other neurons outside the winning neuron?s neighborhood remain dormant. Figure 7.2 represents a schematic of a Kohonen layer in self organized map. The number of neurons present in each competitive layer of network is ?L?. Before the classification starts, the synaptic weights of each neuron of the competitive layer are randomly initialized. The initialization is done within the maximum and minimum range of the input matrix ?X?. Therefore the initialized weight matrix ?W? has a dimension of L by m, which is given by eq. (2), ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ???? ? ? ? ? Mv a r..3v a r2v a r1v a rV a ri a b l e s w..wwwLn e u ro n ....... w..www2n e u ro n w..www1n e u ro n W L M L 3 L 2 L 1 2 M 2 3 2 2 2 1 1 M 1 3 1 2 1 1 (2) Figure 7.5 represents random initialization of weights and there evolution in the continuous input space as the training proceeds in time for a sample computer simulation. After initialization of weights, each pattern i.e. each row of the input matrix ?X? enters the network randomly. A discriminant function for each neuron is calculated, and the neuron with the largest 210 value of discriminant function is declared as winner. The discriminant function used in the self organized network is the inner product between the weight vector of each neuron and the input pattern entering in the competitive layer. The inner product is given by eq. (3) xwp ro d u ct_in n er Tj? (3) where, ?x? is the row of input pattern entering the network given by Tm21 ]x,...,x,x[x ? , and ?wj? is the weight vector of the jth neuron given by Tjm2j1jj ]w,...,w,w[w ? in the competitive layer. The inner product given by eq. (3) is equivalent to the Euclidean distance between the input pattern ?x? and weight of the jth neuron ?wj?. Hence the discriminant function can also be interpreted as the minimum of the Euclidean distance between the input pattern ?x? and weight of the jth neuron ?wj?, given by eq. (4). L,....,2,1j,wx)x(i j jm ina r g ??? (4) The neuron with minimum Euclidean distance or maximum value of inner product is declared as the winning neuron. The weights of only the winning neuron and neurons in its neighborhood are updated in the weight matrix ?W?, while weights of other neurons remain same. Figure 7.4 shows the schematic of the activation function for competitive learning. The updating of the weights is explained in stage-3 i.e. adaptation. 211 Figure 7.4: Activation function used in competitive learning for linear neurons. Figure 7.5: Evolution of map in continuous input space. 7.3.2 Cooperation In the second stage of self organization algorithm, cooperation between the winning neurons and the neighboring neurons is performed. It involves lateral interaction (Figure 7.6) O ut pu t of n e ur on 0 1 0 02 1 4 3 n e u r o n n u m b e r ne t 0 0 . 5 1 0 0 . 5 1 0 0 . 2 0 . 4 0 . 6 0 . 8 W e i g h t Ve c to r -1 M a p a t e p o c h -1 W e i g h t Ve c to r -2 W e i g h t Ve c to r -3 0 0 . 5 1 0 0 . 5 1 0 . 2 0 . 4 0 . 6 0 . 8 1 W e i g h t Ve c to r -1 M a p a t e p o c h -1 0 0 W e i g h t Ve c to r -2 W e i g h t Ve c to r -3 0 0 . 5 1 0 0 . 5 1 0 0 . 2 0 . 4 0 . 6 0 . 8 W e i g h t Ve c to r -1 M a p a t e p o c h -1 0 0 0 W e i g h t Ve c to r -2 W e i g h t Ve c to r -3 0 0 . 5 1 0 0 . 5 1 0 0 . 5 1 W e i g h t Ve c to r -1 M a p a t e p o c h -1 0 0 0 0 W e i g h t Ve c to r -2 W e i g h t Ve c to r -3 212 among set of excited neurons which are centered by the winning neuron declared in the competition stage. A topological neighborhood is defined which encompasses the winning neuron and all the excited neurons. Intuitively it is expected that neurons close to winning neuron will get excited more compared to the neurons which are far from the firing (winning) neuron. From a physical stand point it can be thought of as throwing a stone in the pond. Maximum disturbance in the water is seen where the stone lands, while as one goes away from the point of hit, the waves of the water damp and die. Figure 7.6: Competitive feed-forward learning network with lateral connection. Therefore a Gaussian function given by eq. (5) is taken as an appropriate choice of topological neighborhood which decays smoothly with lateral distance [Lo 1991, 1993]. The distance between the winning neuron ?i? and excited neuron ?j? is given by eq. (6). ??? ? ??? ? ??? 2 2 i,j)x(i,j 2exph d (5) 2jii,j rrd ?? (6) y 1 y 2 y 3 Output Si gnals Input Signals x 1 x 2 Output Si gnals Input Signals 213 ???????? ????? 10 nexp)n( (7) Figure 7.7: Shrinkage of Gaussian neighborhood with time. In eq(5), ? is the width (standard deviation) of the neighborhood function. An important characteristic of SOM network is that the width of the topological neighborhood is also a decreasing exponential function of time as given by eq.7, where ? is the time constant. Figure 7.8 represents the exponential variation of the radius of the topological neighborhood for a sample computer simulation. Figure 7.7 represents the shrinkage of neighborhood function with time for a sample computer simulation. Neighborhood function H has a maximum value of 1 when the distance from the winning neuron ?i? is di,j=0. Also as the lateral distance from the winning neuron is increased and di,j tends to infinity, the neighborhood function asymptotically tends to zero. This is necessary for convergence of the training process. -1 0 -5 0 5 10 0 . 1 0 . 2 0 . 3 0 . 4 0 . 5 0 . 6 0 . 7 0 . 8 0 . 9 1 H dij e p o c h -1 e p o c h -1 0 e p o c h -1 0 0 e p o c h -1 0 0 0 e p o c h -1 0 0 0 0 214 Figure 7.8: Variation of neighborhood radius with time. In this work hexagonal lattice is used to classify different fault modes. Figure 7.9 represents a sample configuration of the hexagonal lattice. The spread of the lattice in the discrete output space is related to the input data matrix [X] via the aspect ratio of the lattice and number of neurons present in the lattice. The aspect ratio is give by equation, d imx d imyr a t io_a s p e c t 21 ???? (8) which is the ratio of the first two eigenvalues (i.e. ?1>?2 ) of the correlation matrix of [X]. The x- dimension and y-dimension represent the number of neurons along the x-direction and y- direction respectively. The number of neurons is given by equation, d i myd i mxn e u r o n s_of_n u m b e r ?? (9) 0 2000 4000 6000 8000 10000 0 0 . 5 1 1 . 5 2 2 . 5 e p o c h R a d i u s R a d i u s 215 which is the product of the two dimensions, and is equal to the number of neurons in the lattice. With initialization of number of neurons on the lattice and calculation of the first two eigenvalues of the correlation matrix [X], the spread of the lattice in x-dimension and y- dimension is determined. The discrete output space is populated with the number of neurons in the x and y dimensions of the spread. Figure 7.9: Sample hexagonal layout of 2-D lattice. 7.3.3 Synaptic Adaptation Adaptation is the third stage of the self organization algorithm. It involves updating of weights of neurons in the weight matrix ?W?. Since self organization is an unsupervised learning algorithm, hence conventional Hebb?s postulates of learning cannot be applied to training. They are suitable for associative learning. The details of Hebb?s postulates can be found in [Haykin 1999, Kohonen 1995]. Hence Hebb?s learning rule is modified by inclusion of a forgetting term. 1 2 3 4 5 6 7 8 2 4 6 8 10 12 14 16 18 X - d im e n s io n Y - d im e n s io n Y - d im e n s io n 216 The ?forgetting term? ensures that learning is not unidirectional and prevents saturation of synaptic weights. From a physical stand point forgetting term can be inferred as, something which was learnt earlier or a while ago which is not very fresh in the memory. A similar thing happens by incorporation of forgetting term, where neurons which do not get enough reinforcement i.e. whose weights do not get updated as they do not take part in the training with the shrinkage of the neighborhood, their effect is suppressed/erased to achieve convergence of the training. Figure 7.10 represents sample variation of forgetting parameter with time. Equation (10) is applied to the winning neuron and to all the excited neurons in the topological neighborhood of the winning neuron. Equation (10) gives a relation between the weights wj(n) of neuron j at time n and updated weights wj(n+1) at time n+1. ))n(w)n(h)n(T e r mFo r g e t t i n g j)x(i,j ???? ))n(wx)(n(h)n(w j)x(i,jj ???? jjj w)n(w)1n(w ???? ))n(wx)(n(h)n()n(w)1n(w j)x(i,jjj ????? (10) In eq. (10) hj,i is the neighborhood function and ?(n) is the learning rate parameter. The learning rate parameter is a time varying function given by eq.11 ???????? ????? 20 nexp)n( (11) where 0? is the initial learning rate and 2? is another time constant. The learning rate is higher at the beginning of the unsupervised learning of the self-organizing map. Adaptation of the synaptic weight vectors decreases the learning rate closer to convergence and enables the neural net to 217 represent the patterns in the input data-set. Figure 7.11 represents the exponential variation of the learning rate. Figure 7.10: Variation of forgetting parameter with time. 0 0 . 5 1 0 0 . 5 1 0 0 . 5 1 D i m e n s i o n -1 F o r g e tti n g T e r m a t e p o c h -1 D i m e n s i o n -2 D i m e n s i o n -3 0 0 . 1 0 . 2 0 0 . 2 0 . 4 0 0 . 2 0 . 4 D i m e n s i o n -1 F o r g e tti n g T e r m a t e p o c h -1 0 0 D i m e n s i o n -2 D i m e n s i o n -3 0 0 . 0 1 0 . 0 2 0 0 . 0 5 0 . 1 0 0 . 0 2 0 . 0 4 0 . 0 6 D i m e n s i o n -1 F o r g e tti n g T e r m a t e p o c h -1 0 0 0 D i m e n s i o n -2 D i m e n s i o n -3 0 5 x 1 0 -3 0 2 4 x 1 0 -3 0 2 4 x 1 0 -3 D i m e n s i o n -1 F o r g e tti n g T e r m a t e p o c h -1 0 0 0 0 D i m e n s i o n -2 D i m e n s i o n -3 218 Figure 7.11: Variation of learning rate with time. Equation (10) leads to moving of synaptic weight vector of winning neuron closer to the continuous input space X. As training proceeds i.e. as each row (pattern) of input matrix ?X? enters the network and neighborhood is updated, the weights of each neuron move closer to the input space. Eventually the weight vectors have similar distribution as the input data. This leads to the topological ordering of the input data from a continuous input space to the discrete output space represented by lattice of neurons. The mapping is such that the neurons with similar weight vectors lie closer to each other in a topologically ordered fashion. The exponential forms of the topological neighborhood and inverse time function of learning rate parameter make SOM a non- linear mapping approach. 7.4 Visualization of Classified Failure Modes Self organized mapping is a non-linear mapping approach used extensively for classification of multivariate data sets. Once the weights get trained with the input data and get 0 2000 4000 6000 8000 10000 0 0 . 1 0 . 2 0 . 3 0 . 4 0 . 5 0 . 6 0 . 7 0 . 8 0 . 9 e p o c h L e a r n i n g R a t e L e a r n i n g R a t e 219 self organized, visualization and interpretation of inherent patterns in the input data is performed in following three ways. 7.4.1 Euclidean Distance Matrix (Dmat) Euclidean distance matrix has been used for interpretation of clusters in the input data and is defined by eq.12 ? ? ? ?2ji2ji yyxx)Q,P(d ???? (12) If the lattice of neurons is of size m by n, then Euclidean distance matrix is also of size m by n. Each value in the matrix represents the Euclidean distance between the weights of trained organized lattice of neurons. Clusters can be identified from distance matrix based on the interpretation of boundary between different classes. Pseudo-color scales are used for representation of classified classes in the data. All the neurons with same intensity are clustered in one class which means that the Euclidean distance between them is nearly same. The boundaries between different clusters can be seen with the change in the intensity of the color. 7.4.2 Unified Distance Matrix (Umat) Unified distance matrix helps in identification of boundaries in the data, which can be utilized for clustering of regions in the feature space belonging to different classes. Unified distance matrix presents average distance between the neighboring weights of each neuron in the lattice in terms of gray scale images. The neurons which are organized in one cluster have a white shade indicating that the distance between them is small, hence they are clustered near to each other, where as neuron with are far from each other are represented by dark black and gray colors, with indication that they are away from each other. Figure 7.12 represents the evolution 220 of Umat with time in a computer simulation. As training proceeds, the different clusters in the input data can be seen clearly. The dark shades represent the boundaries between the clusters. 7.4.3 Labeled Map with Best Matching Unit (BMU) Labeled maps are also used to interpret clusters in the input data sets. They are specially used to see the relative richness or weakness of the response of each neuron with the input objects (in this study the objects are the drop events) in the data set. The organized trained lattice of neurons will have all similar objects clustered together in one class. Then neurons representing a particular class will be rich in objects which are similar, and will be weaker in response to objects which are dissimilar. The weights of the neurons which exactly match with the value of the object in the input data space is called the best matching unit (BMU). The neuron which is best matching unit for a certain object in the input data will have a strong response to that particular object. The neurons surrounding the best matching unit will be rich in the response to the object representing best matching unit. All neighboring neurons to the best matching unit form one particular class and the class name is given by the object name. The Euclidean distance matrix, unified distance matrix and labeled maps with best matching unit are the three representations used to identify different fault modes in the drop data sets. It should be noted that different drop events are the objects, and different fault modes are the classes. The objective in this work is to classify different objects in different classes i.e. classification of different drop events of electronic assemblies subjected to drop and shock into different fault modes. The input variance is defined by the strain histories obtained from the drop events of the test assemblies. The evolution of the input variance is probed in feature space formed by joint time-frequency analysis of the strain histories. 221 Figure 7.12: Evolution of unified distance matrix. Figure 7.13 summarize the training process by self organization algorithm. Competition, cooperation and synaptic adaptation all have a critical role in training a lattice of neurons which is topologically ordered for classification. 0 . 0 2 8 6 0 . 5 6 8 1 . 1 1 epoch - 1 0 . 0 1 1 7 0 . 0 5 7 0 . 1 0 2 epoch - 100 0 . 0 0 5 4 0 . 1 8 1 0 . 3 5 8 epoch - 10000 0 . 0 1 8 5 0 . 0 7 1 7 0 . 1 2 5 epoch - 1000 222 Figure 7.13: 3-Stage training by self organization. A Pseudo-code for training of self organized map is as follows. Step-1-Initialize weight vectors randomly. Step-2: Initialize learning rate and neighborhood radius. Step-3: Sample input vector randomly. Step-4: Find inner product, discriminant function. Neuron with maximum value of discriminant function is declared as winner. Step-5: Calculate distance of other neurons from C omp e ti ti on C oop e r ati on S yn ap ti c A d ap tat i on j j wx)x(i m i na r g ?? T m21 ]x,...,x,x[x ? T jm2j1j ]w,...,w,w[w ? L,....,2,1j:f o r ? xwo d u c tPrI n n e r T j ? ? ? ? ? ? ? ? ? ? ???? 1 0 n e x p)n( ? ? ? ? ? ? ? ? ? ?? )n(2 d e x p)n(h 2 2 i,j )x(i,j 2 jii,j rrd ?? jjj w)n(w)1n(w ???? ? ? ? ? ? ? ? ? ? ???? 2 0 n e x p)n( )wx(hw j)x(i,jj ???? 223 winning neuron. Step-6: Weights of neurons lying in the neighborhood of the winning neurons are updated, while response of neurons outside the neighborhood is suppressed. Step-7: Update the weights and learning rate. Step-8: Repeat steps 1-7 until a learning rate is very small or neighborhood radius is very small with only 1 neuron firing. Figure 7.14 represents the 3 stage training flowchart by unsupervised learning theory of self organization. Figure 7.14: Training schematic for self organization algorithm. 7.5 Benchmarking of Self Organization Algorithm on IRIS data set In this section, self organization algorithm is implemented on IRIS data set. The idea of implementing self organization scheme on IRIS data set is to represent the effectiveness of the proposed technique on a multivariate data set (IRIS data set) which is much lower in dimensions then the drop data sets procured for electronic test assemblies. IRIS data set consists of four variables, sepal length and width and petal length and width. The three classes which are diluted in this 4 dimensional data set are the three species of IRIS flowers i.e. setosa, virginica and versicolor. Though self organization is an unsupervised learning scheme, still it is known ahead of time, that IRIS data set has 3 classes in it. In data sets procured for electronic test assemblies, it is unknown ahead of time how many classes (fault modes) are present in the data set. Also the C om p e ti ti on C oop e r ati on S yn ap ti c A d ap tati on Inp ut ve c t ors / pa t t e rns W e i ght ve c t ors W i n n e r Adapt e d we i gh t v e c t or s N e i gh bor h ood N ode s of W i n n e r Ran dom S e l e c t i on Re pe at n o of s t e ps S t age - 1 S t age - 2 S t age - 3 224 problem of classification of failure modes in electronic test assemblies is a problem of multi- class classification, with significantly high dimensionality compared to classification of IRIS data set. Hence it is easier to visualize and understand self organization scheme on IRIS data set. A similar analogy is then scaled up for classification of failure modes in electronic test assemblies. Figure 7.15 represents the continuous input space of the IRIS data set in trained map superimposed. Though the data set is 4 dimensional in nature, first three dimensions of the data sets are visualized in the actual input space. Figure 7.16 represents the Euclidean space of the IRIS data set. Euclidean space is a pseudo color image with peaks representing larger distance between the patterns in the data. Figure 7.15: Trained map in the continuous input space of IRIS data set. 2 4 6 8 10 4 5 6 7 -2 0 2 D i m e n s i o n - 2 D i m e n s i o n - 1 D i m e n s i o n - 3 225 Figure 7.16: Trained lattice of neuron representing euclidean space for classification of species in IRIS data set. It can be seen visually from the Figure 7.15, that there is a significant distance between IRIS setosa, and IRIS virginica and IRIS versicolor. A similar trend is seen in Figure 7.16 where a significant peak is seen, which is separating IRIS setosa from IRIS virginica and IRIS versicolor. A clear separation between IRIS virginica and IRIS versicolor is not very evident from Euclidean distance matrix in Figure 7.16. Figure 7.17 represents unified distance matrix and labeled trained lattice of neurons. s e tos a vi r gi n i c a ve r s i c ol or 226 Figure 7.17: Trained lattice of neuron representing unified distance matrix and labeled lattice for classification of species in IRIS data set. This is another representation used for visualizing different classes in high dimensional data. It is evident from Figure 7.17, how the trained lattice is self organized, and where different regions of neurons on the lattice will get excited with different species. It can be clearly seen that the three species are separated on the labeled lattice of neurons. 7.6 Implementation of Self Organization to Electronic Systems under Drop and shock In this section self organization algorithm is implemented for early classification of the failure modes in electronic systems. As explained in chapter-3, test vehicle-B and test vehicle-C v i r g i n i c a ve r s ic ol or s e to s a 227 are used in this study. Both test vehicles were used to examine the repeatability of the approach with varying packaging architectures and board designs. Simulation data set was procured using manual error-seeding of various failure modes. The error-seeding of failure modes by explicit finite element method is also explained in chapter-3. The data sets consisted of time domain data in the form of strain histories. These strain histories were processed to extract feature vectors. Joint time-frequency analysis of the data sets was performed to form feature space. Joint time- frequency analysis is explained in chaper-1. 7.6.1 Data Set Orientations and Processing for Self Organization of Failure Modes. Once the joint time-frequency analysis of the drop events is performed, two comprehensive data sets have been compiled consisting of simulation strain histories and experimental strain histories respectively. The experimental data set consists of strain histories of each test vehicle from pristine state to the state of failure. The simulation data set consists of strain histories from error-seeded model as well as from simulations of pristine assembly. The feature vector used for classification of various fault modes is developed from frequency moments obtained by time-frequency analysis of the transient strain histories. Since frequency moments are function of time-frequency distribution, hence they appropriately represent the evolution of variance seen with joint time-frequency analysis of the transient strain histories. Figure 7.18 shows a sample image of the data set formed by combining frequency moments obtained from joint time-frequency analysis of different drop. 228 Figure 7.18: Representative sample image of the data set formed by combining frequency moments. Figure 7.19: Data matrix of combined frequency moment representative of time-frequency feature Space 0 100 200 300 400 500 600 700 800 900 1000 2 4 6 8 10 12 0 0 . 1 0 . 2 0 . 3 0 . 4 0 . 5 0 . 6 0 . 7 0 . 8 0 . 9 1 F reque ncy Bi n (Hz) D ro p N o ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? 1000..2001001F re q B i n fm..fmfmfmD ro p N ....... fm..fmfmfm2D ro p fm..fmfmfm1D ro p X N M N 3 N 2 N 1 2 M 2 3 2 2 2 1 1 M 1 3 1 2 1 1 229 (a) (b) Figure 7.20: Sample time-frequency distribution. (a) isometric view (b) top view. 230 Figure 7.21: Sample frequency moment (test vehicle-B). Figure 7.19 represents the structure of input matrix, which is representative of the feature space in which clustering of different fault modes is desired. The frequency moments for each transient strain history have been binned by frequency. Figure 7.20 and Figure 7.21 represent the sample feature vector as time frequency distribution and frequency moments for test vehicle-B. It is seen from Figure 7.19, that the input matrix in which classification of different fault modes is desired is high dimensional in nature. In order to visualize clusters in the input data sets by self organized mapping, principal component analysis is performed on the input matrix. Principal component analysis is a linear transformation performed on the input matrix, x, given by Figure 7.19 which leads to a new set of variables Z called principal components. Principal components are orthogonal in nature, and ranked in order of importance. Figure 7.22 shows the structure of transformed input matrix. 0 200 400 600 800 1000 - 0 . 0 0 5 0 0 . 0 0 5 0 . 0 1 0 . 0 1 5 0 . 0 2 0 . 0 2 5 F r e q u e n c y ( H z ) F r e q u e n c y M o m e n t ( s e c ) 231 ? ? ? ?ZX d u c t i o nRelD i m e n s i o n a ?????? ?? Figure 7.22: Structure of transformed input matrix after principal component analysis. (a) (b) Figure 7.23: Test vehicle-C, scree plot (a) simulation data set (b) experimental data set. ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ????? ? MPC..3PC2PC1PCNoPC z..zzzD ro p N ....... z..zzz2D ro p z..zzz1D ro p dT ra n s fo rm e_X N M N 3 N 2 N 1 2 M 2 3 2 2 2 1 1 M 1 3 1 2 1 1 0 0 . 1 0 . 2 0 . 3 0 . 4 0 . 5 0 . 6 0 . 7 0 . 8 0 . 9 1 0 50 100 150 200 P r i n c i p a l C o m p o n e n t N u m b e r C u m u l a t i v e P e r c e n t V a r i a n c e ( % ) 0 0 . 1 0 . 2 0 . 3 0 . 4 0 . 5 0 . 6 0 . 7 0 . 8 0 . 9 1 0 50 100 150 200 P r i n c i p a l C o m p o n e n t N u m b e r C u m u l a t i v e P e r c e n t V a r i a n c e ( % ) 232 (a) (b) Figure 7.24: Test vehicle-B, scree plot (a) simulation data set (b) experimental data set. Since primary use of principal component analysis is dimensional reduction, hence from scree plots it can be seen how first few principal components account for much of the variance represented by input matrix, x. Figure 7.23 shows the scree plots for test vehicle C of respective 0 0 . 1 0 . 2 0 . 3 0 . 4 0 . 5 0 . 6 0 . 7 0 . 8 0 . 9 1 0 50 100 150 200 P r i n c i p a l C o m p o n e n t N u m b e r C u m u l a t i v e P e r c e n t V a r i a n c e ( % ) 0 . 8 6 0 . 8 8 0 . 9 0 . 9 2 0 . 9 4 0 . 9 6 0 . 9 8 1 0 50 100 150 200 P r i n c i p a l C o m p o n e n t N u m b e r C u m u l a t i v e P e r c e n t V a r i a n c e ( % ) 233 data sets. It can be interpreted that first 3 principal components account for at least 80% of the variance for both simulation as well as experimental data sets respectively. A similar trend is seen for test vehicle B, where first 3 principal components account for at least 95% of the variance in Figure 7.24. Hence it can be inferred that much of the variance of the respective data sets is explained by first 3 principal components, hence this trend is repeatable with different board designs. Two kinds of self organization analysis were performed on the data sets. Self organization was performed on simulation data set and combined data set. Simulation data set was procured using explicit finite element simulations of the test assemblies under consideration. The simulations were error-seeded manually ahead of time with single failure mode. Multiple simulations were performed with various kinds of failure modes listed in Table 7.1. Combined analysis was performed by stacking simulation and experimental data sets together. Experimental data was procured by subjecting the test assemblies to JEDEC drop. The combined analysis was performed to classify fault modes in the experimental feature space. The identification of the specific failure mode in the experimental data set was guided by the simulation data set. It is known ahead of time, which shock event in the simulation data set belongs to what failure mode, as manual error-seeding of fault modes was performed by finite element modeling and simulation. Figure 7.25 represents the data orientations of the two analyses while implementation of the self organization algorithm for fault isolation. The two analyses consisted of first three principal components of the two data sets. 234 (a) (b) Figure 7.25: Data orientation for self organization of data sets. (a) simulation, (b) experiment. S im u la t io n An a ly s is PF 3,12 PF 2,12 PF 1,12 CD 3,11 CD 2,11 CD 1,11 CC 3,10 CC 2,10 CC 1,10 M 3,9 M 2,9 M 1,9 M 3,8 M 2,8 M 1,8 M 3,7 M 2,7 M 1,7 M 3,6 M 2,6 M 1,6 C 3,5 C 2,5 C 1,5 C 3,4 C 2,4 C 1,4 C 3,3 C 2,3 C 1,3 C 3,2 C 2,2 C 1,2 H 3,1 H 2,1 H 1,1 ZZZP a c kF a l l ZZZCh i p D e l a m ZZZCh i p Cra c k ZZZS ol de rM i s s ZZZS ol de rM i s s ZZZS ol de rM i s s ZZZS ol de rM i s s ZZZkS ol de rCr a c ZZZkS ol de rCr a c ZZZkS ol de rCr a c ZZZkS ol de rCr a c ZZZH e a l t hy 3PC2PC1PCL a be l ??? Pat t e rn - 1 Pat t e rn - 12 Pat t e rn - 11 Pat t e rn - 2 Pat t e rn - 3 . . . . . . . . Co m b in e d An a ly s is N 3,n N 2,n N 1,n 2 3,16 2 2,16 2 1,16 1 3,15 1 2,15 1 1,15 C 3,11 C 2,11 C 1,11 C 3,2 C 1,2 C 1,2 H 3,1 H 2,1 H 1,1 ZZZNS ho c k .... .... .... ZZZ2S ho c k ZZZ1S ho c k ZZZfP a rt F a l l O f .... ZZZkS ol de rCr a c ZZZH e a l t hy 3PC2PC1PCL a be l ? ? ? ??? ? ? Si m u l a ti o n Ex p e r i m e n t 235 7.6.2 Results of Classification of Failure Modes Table 7.1: Failure modes nomenclature Symbol for Failure Mode Class Failure Mode Labels Definition of Failure Mode H H Healthy SC C1 One Interconnect Partial Crack C2 Two Interconnect Partial Crack C3 Three Interconnect Partial Crack C4 Four Interconnect Partial Crack SM M1 One Interconnect Complete Failure M2 Two Interconnect Complete Failure M3 Three Interconnect Complete Failure M4 Four Interconnect Complete Failure CD CD Chip Delamination CC CC Chip Cracking PF PF Part Fall-Off - di ith Shock-event MM1 MM1 Mixed mode of interconnect failure and chip cracks MM2 MM2 Mixed mode of package fall-off and chip delamination MM3 MM3 Mixed mode of interconnect failure and Chip Delamination MM4 MM4 Mixed mode of interconnect failure and chip cracking MM5 MM5 Mixed mode of interconnect failure/ chip delamination/ Partially Healthy MM6 MM6 Mixed mode of Chip cracking and Part Fall Off MM7 MM7 Mixed mode of interconnect failure and Part Fall Off Potential of the presented methodology for fault isolation and classification has been investigated in this section. Unified distance matrix, label maps and Euclidean space is used for 236 visualization of inherent classes in the data sets. The nomenclature used for labeling the failure modes is shown in Table 7.1. Figure 7.26a is a grey scale image of the unified distance matrix. The boundaries between different classes (failure modes) can be seen by dark shades. Figure 7.26b is the labeled map of the final trained lattice of the neurons. The labels on the lattice identify the input data patterns with which the weight-vectors of the neurons exactly match. The neighboring units of neurons are rich in response with the label on the best matching neuron. Figure 7.27a is a pseudocolor image of the trained lattice of neurons and represents the Euclidean space of the time-frequency feature vectors used as input variance for the classification. Figure 7.27b is the isometric view of the trained lattice in the Euclidean space. The simulation models are error-seeded with specific failure modes to demonstrate the robustness of the feature vector used for fault mode classification and identify the region of each particular failure mode in the combined analysis of the feature space. Distinct clusters are seen in Figure 7.27 and Figure 7.29 for test vehicle-C, and test vehicle-B respectively. 237 (a) (b) Figure 7.26: Classification of simulation data set in test-vehicle C. (a) unified distance matrix, (b) label map. Figure 7.27: Classification of Simulation data set in test-vehicle C Isometric view of Euclidean Distance of the trained lattice. H SM SC CC CD PF MM1 MM2 Y - D i rect i o n L a t t i ce E u cl i d ean D i s t a n ce X - D i rect i o n L a t t i ce CD MM2 PF CC MM1 H SC SM E u cl i d ean D i s t a n ce E u cl i d ean D i s t a n ce 238 (a) (b) Figure 7.28: Classification of simulation data set in test-vehicle-B. (a) unified distance matrix, (b) label map. Figure 7.29: Classification of simulation data set in test-vehicle B. Isometric view of euclidean distance of the trained lattice. H SC CC CD MM5 SM PF MM4 MM3 Y - D i rect i o n L a t t i ce E u cl i d ean D i s t a n ce X - D i rect i o n L a t t i ce CD CC SM SC H PF MM3 MM4 MM5 E u cl i d ean D i s t a n ce E u cl i d ean D i s t a n ce 239 Self organized mapping algorithm is a non-linear classifier with unsupervised learning characteristics, therefore it also shows contrast on regions of feature space consisting of multiple modes of failure i.e. mixed mode. The region between two defined classes is the region of mixed mode of failure. In Figure 7.27a and Figure 7.27c region ?MM2? can be interpreted as region of mixed mode with interconnect failure and chip delamination. For failure mode identification in experimental data set, a combined analysis of the simulation and experimental data set is performed. Self organized mapping algorithm is applied to the combined data set and regions of each particular type of failure mode are dictated by the patterns of simulation data set in the classification matrix. This is possible because patterns of simulation data set are error seeded with exclusively one type of failure mode at each time. Figure 7.30 and Figure 7.31 show the results of the combined analysis performed on the test assemblies C and B respectively. Mixed modes of failure are also seen in the combined analysis. Since, the experimental patterns in the classification matrix are obtained by subjecting the respective test vehicle to subsequent drops, hence patterns in experimental data set can have multiple modes of failure occurring simultaneously. The severity of presence of various modes in each drop event can vary with drop numbers. Hence in Figure 7.31b and Figure 7.33b the labels (Table 7.1) of each pattern in the classification matrix, migrate and populate the lattice based on extent of severity of each particular failure mode. 240 (a) (b) Figure 7.30: Classification of combined data set in test-vehicle-C. (a) unified distance matrix, (b) label map. Figure 7.31: Classification of combined data set in test-vehicle-C. Isometric view of euclidean distance of the trained lattice. H SC CC CD SM PF MM3 Y - D i rect i o n L a t t i ce E u cl i d ean D i s t a n ce X - D i rect i o n L a t t i ce H SC CC CD SM PF MM3 E u cl i d ean D i s t a n ce E u cl i d ean D i s t a n ce 241 Figure 7.31b and Figure 7.33b show that the pattern of pristine drop i.e. drop-1 and the pattern of healthy simulation model are close to each other in label maps of respective test vehicle. It is also seen that in Figure 7.27 and Figure 7.29 i.e. in simulation data set analysis, the boundaries between different classes is much more distinct compared with boundaries of classes obtained from combined analysis seen in Figure 7.31 and Figure 7.33. This can be attributed to the fact that in simulation data set analysis, the patterns in the classification matrix are obtained by error-seeding the simulation models exclusively with each particular type of failure mode, where as in experimental data set the patterns are obtained from drop testing of test assemblies, hence there is a strong possibility of multiple type of failure modes occurring simultaneously. Therefore it can be inferred that variance with in each class is more efficiently minimized and variance between different classes is more efficiently maximized for clustering of different failure modes in the analysis of simulation data set compared to combined analysis. (a) (b) Figure 7.32: Classification of combined data set in test-vehicle-B. (a) unified distance matrix, (b) label map. H SC CC MM3 CD MM7 SM PF MM6 MM4 242 Figure 7.33: Classification of combined data set in test-vehicle-B. Isometric-view of euclidean distance of the trained lattice. The simulation data analysis and combined data analysis are separate; therefore the labels seen on the lattice in simulation analysis differ from labels seen in the combined analysis. Since initialization of weights is random and firing of each pattern from classification matrix into the network is random, hence positioning of labels obtained from simulation analysis will be different from positioning of labels obtained from combined analysis every time. The number of distinct classes obtained will remain same for each particular analysis, but the neurons representing each region of failure mode in the feature space can differ due to the random initialization and random firing of the patterns. 7.7 Validation of Classified Failure Modes by Self Organization The classified failure modes from the analysis are also correlated with the underlining damage seen in experimental cross-sections of the failed samples. The cross-sectioning of the Y - Dire ct ion Latt ic e Euc li d ea n Dista nce X - Dire ct ion Latt ic e H CD MM7 PF MM6 CC SC MM3 MM4 SM Euc li d ea n Dista nce Euc li d ea n Dista nce 243 samples is performed once the packages are completely failed and have lost functionality. The samples are cross-sectioned and SEM images (scanning electron microscope) are used to determine different failure modes at different sites in test vehicle-C and test vehicle-B (Figure 7.34 and Figure 7.35). .Figure 7.34: Cracking of solder interconnects. Figure 7.35: Observed cracking of in the solder interconnects. 244 Once the fault modes are classified in test assemblies, it is important to validate the classification results obtained from self organized mapping of the respective data sets. Box M- test is performed for testing non-homogeneity of variance in between different classes. It is performed on the trained weights obtained from the self organization of the two analyses performed. Box M-test is used for testing non-homogeneity of variance between various classes in the respective analysis of the data sets. This test is critical for the selection of the type of classifier used to discriminate different classes. Box M-test statistic follows a Chi-square distribution 2M?? , where ?M? is the Box M-test statistic given by, ? ?2211p o o l e d21 S)1n(S)1n(Sln)2nn(M ??????? where, Spooled is the pooled estimate of the covariance from the covariance matrix of class 1 and class 2 respectively, and n1, n2 are the degrees of freedom in each class. Table 7.2 and Table 7.3Table 7.3 show the result of Box M-test on the trained weights belonging to different classes in the feature space. A p-value of less that 0.05 indicates that statistically there is a significant difference between the covariance of different classes. Hence there is a strong evidence of non- homogeneity of variance between different classes. Therefore choice of Self organized mapping technique for classification, which is a non-linear classifier, is justified. Table 7.2: Results of Box M-test for test vehicle-C. Test-C Chi-Square DF Pr>ChiSq Simulation Data 1238.47 42 <0.0001 Combined Data 97.77 36 <0.0001 Table 7.3: Results of Box M-test for test vehicle-B. Test-B Chi-Square DF Pr>ChiSq Simulation Data 1002.305 48 <0.0001 Combined Data 266.23 54 <0.0001 245 In order to see significant bifurcation in the inherent patterns for classification in the data, it is a necessary condition that statistically there is a significant difference between the means of the different classes. Multivariate analysis of variance is used to test as to how means of different classes statistically differ from each other. Table 7.4 and Table 7.5 show multivariate analysis of variance (MANOVA) results on the trained weights belonging to different classes in the feature space. A p-value of less than 0.05 indicates that statistically there is 95% confidence that if not all, at least one of the means of the identified failure mode is significantly different from the means of the other classified failure modes. Since, mean is a measure of central tendency of the data, hence if the means of various inherent classes are statistically not different, then it signifies that the classes are completely diluted in the data, hence classification of the different patterns in the data will yield no meaningful result. Multivariate analysis of variance (MANOVA) is used to check if the means of different classified failure modes is statistically different. Wilk?s lamda is the test statistic used for hypothesis testing. Likelihood ratio test is used for finding Wilk?s lamda test statistic. 2/n 0? ? n e d M LU n c o n s t r a i d M LC o n s t r a i n e ?? ? ? ? ?? ? ? ? ? ???? where, ?? is the estimate of covariance by maximum likelihood function under alternate hypothesis and 0?? is estimate of covariance by maximum likelihood function under null hypothesis. The likelihood function is given by: ? ? ? ? ?????? ??????????? ?? ?n 1i i1i2/n2/np 'x'x21e x p)2( 1),(L where, n is the degree of freedom, p is the dimensionality, ? is the estimate of covariance and ? is the mean. 246 Table 7.4: Results of multivariate analysis of a variance (MANOVA) for test vehicle-C. Test-C Statistic Value (*1e-6) F-Value Pr>F Simulation Data Wilk's Lamda 4.1 744.44 <0.01 Combined Data Wilk's Lamda 115.28 104.83 <0.01 Table 7.5: Results of multivariate analysis of a variance (MANOVA) for test vehicle-B Test-B Statistic Value (*1e-6) F-Value Pr>F Simulation Data Wilk's Lamda 1.14 960.48 <0.01 Combined Data Wilk's Lamda 816.6 54.3 <0.01 Similarity between different classified failure modes in both test vehicles is given byTable 7.6 to Table 7.9. Similarity matrix is formed using Hotelling?s T-square test between respective classified failure modes. A value of similarity in the tables less than 0.05 indicates that statistically there is a 95% chance that the two classes under consideration are significantly different, signifying dissimilarity. The existing similarity between different classified failure modes is calculated using Hotelling?s T-square test statistic is given by: ? ?? ? ? ? )pn,p(Fpn p)1n(xSxnT 0102 ????????? ?? where, ?n? is the number of observation in each class and ?p? signifies dimensionality of the observation. The above T-square formula tests, if the mean of the class x is equal to ?0 or not. The T-square statistic follows a scaled f-distribution and takes into account the covariance ?S? of the data set. A similarity value greater than 0.05 indicates statistical similarity between the two classes. Results indicate that different failure modes are dissimilar and that the main 247 diagonal terms which are intended to be similar show a value of 1. The methodology presented in this work not only addresses stage-II of structural health monitoring i.e. fault mode classification but it is also inclusive of stage-I i.e. damage detection. As the trained lattice of neurons gets populated with subsequent drop pattern in combined analysis, it can be interpreted that a particular failure mode is not only initiated but also propagating with each drop event. From Table 7.6 to Table 7.9it can be statistically inferred that as the drop events proceed in time, the dissimilarity between the healthy cluster and other fault modes classes increases, as similarity value is significantly lower than 1 (<0.05). Table 7.6: Simulation data set similarity matrix for test vehicle-C 248 Table 7.7: Simulation data set similarity matrix for test vehicle-B Table 7.8: Combined data set similarity matrix for test vehicle-C 249 Table 7.9: Combined data set similarity matrix for test vehicle-B 250 Hence statistically there exists a significant difference between the healthy cluster and clusters of other failure modes. This dissimilarity signifies that with subsequent drop events the damage has not only initiated, it is also propagating and failure is imminent. Therefore from self organized mapping algorithm and similarity matrix, damage detection is also addressed. Hence the present methodology is inclusive of damage detection as well. 7.8 Summary Methodology for fault mode classification and isolation has been developed using artificial neural network based self organized mapping. Unsupervised learning has been used to train the neural net which activates different neurons on the lattice for each failure mode. The self selection of the failure modes has been demonstrated using error-seeded sample based feature vectors from an explicit finite element framework. The models simulate the JEDEC shock in zero-degree horizontal orientation. Different failure modes occupy different regions in the unified distance matrix and show as peaks of Euclidean distance on the neuron lattice. The input feature space used for classifying fault modes is joint time-frequency energy distribution of transient strain measured optically from digital image correlation. Joint time-frequency feature space is developed using Cohen?s class of time-frequency analysis i.e. reduced interference distribution. Experimental data has been gathered on board assemblies with progressively high magnitude of accrued damage. Correlation between the simulation and experimental feature vectors, location on the unified distance matrix and the peaks of Euclidean distance on the neuron lattice has been demonstrated by analyzing the combined data-set. The de-correlation of pre-failure joint time-frequency feature space for fault mode classification by self organized mapping is validated statistically and by experimental cross-section of the packages. Box M-test is used for testing non-homogeneity of variance, and multivariate analysis of variance is used to 251 test difference between various classes in the data sets. Hotelling?s T-square is used to see how variance with each class is minimized, and how between different classes it is maximized. Experimental cross-sections are also performed for validation of different classified dominant failure modes. 252 8 Chapter-8 Classification of Multiple Failure Modes in 3D Packaging Architectures: Package-On- Package (PoP) Assemblies using Feature Vectors for Progression of Accrued Damage 8.1 Introduction In this chapter, an approach for characterization of damage thresholds and occurrence of dominant failure modes is presented for 3D packaging components such as Package-on-Package. A model based-prognostics approach is used for addressing damage initiation and progression along with isolation of dominant failure modes. The framework presents methodologies which are independent of continuous monitoring of daisy chain resistance. The approach is scalable to system level reliability. Currently reactive based fault detection techniques are implements on electronic components such as BIST, fuses, canaries for assessing health of the components. The current trends in industry require low cost smaller, reliable and faster electronic packages. The packaging density as well as more and more of miniaturization of the packages is taking place in electronics industry, hence there is limited space in the X-Y plane of the electronic assembly. 3D packaging with Package-on-Package, Through Silicon Via (TSV) in the Z-plane is becoming more frequently used. Hence there is need to understand the response/behavior of these assemblies under harsh environment. In this work, drop and shock environment is the harsh environment under which PoP assembly is studies. Though there could be multiple overlapping harsh environments such as thermal cycling, power cycling, drop and shock, aging, it is envisioned that drop/shock environment is the most dominant environment in initiation/onset of damage in critical applications such as avionics and portable electronics. Also with advent of more and more hand help electronics, research community has shifted focus from 253 dominant low cycle ductile fatigue failure of 2nd level solder interconnects under thermal cycling to brittle fracture of 2nd inter-connects as a dominant failure mode in the electronic assemblies under drop. There are no consistent guidelines/trends of failure modes in the current state-of-art for studying assemblies under drop and shock. Hence there is a need for developing and implementing new prognostication techniques for assessing damage levels in electronic-rich systems under shock. A Package-on-Package component is used for 3D integration of a memory and logic device in hand help electronics. PoP often has a top tier as a memory device and lower tier as a logic device. Researchers [Yoshida 2006] have outlined stacking guidelines for reliable yield of PoP. [Lin 2006] studied warpage issues in PoP component. Warpage was measured at room temperature and reflow temperatures using Shadow Moire method. Warpage was studied experimentally and by finite element methods for critical package parameters such as die size, substrate thickness, mold thickness and material and design was optimized. [Cheah 2011] studied novel PoP designs with interconnection between top and lower tier packages using a silicon interposer, package interposer and showed improved electrical performance over conventional PoP design using a solder ball as interconnections between the stacks. [Das 2011] proposed a new breakthrough in PoP design by using Package-interposer-Package (PIP). [Das 2011] showed that PIP consisted less warpage in assembly process than a conventional PoP design. This gave flexibility is selection and stacking of various combination of packages for PoP with a PIP approach. [Lin 2011] presented study on PoP as solution to memory application devices in hand held electronics which have high density (up to 16 chips). [Lin 2011] performed finite element simulations on the PoP test vehicle at room temperature and reflow temperature for assessing warpage trends. [Yim 2011] studies warpage of top package in a PoP component with 254 aim of reducing the total height of PoP. [Yim 2011] used compression mold process on various compound and substrate materials to control the height of the PoP in Z direction with minimum warpage at reflow. [Drieza 2006] presented data for board level reliability of Pb-free PoP for thermo mechanical and drop environments. [Drieza 2006] also provided SMT process for defect free yield on PoP. Previously, authors have implemented statistical pattern recognition on feature vectors derived from mahalonobis distance, wavelet packet decomposition, spectral analysis, time- frequency analysis for addressing damage detection and its progression [Lall 2006, 2007, 2008] based on leading indicators of failure in pre-failure feature space. Authors have also developed multi-mode fault isolation techniques using for tracking of dominant failure modes as component level in conventional ball grid array package architectures. Karhunen Lo?ve transform (KLT) [Lall 2009] and Sammon?s mapping [Lall 2011] are used for de-correlation of the feature spaces and parity is presented using supervised [Lall 2011] and unsupervised neural nets [Lall 2010]. In this study, a conventional PoP design is studied under drop and shock. Solder interconnect is used for connecting top tier memory package with lower tier logic package. Damage thresholds are characterized for initiations and progression of anomalies. Dominant failure modes using neural nets are isolated in pre-failure space populated with feature vectors derived from time-frequency analysis of the transient strain signals obtained from the assembly under shock. Hard parity is achieved between failure modes. Experimental as well as statistical validation is presented on classified failure modes. Though researchers have performed research in issues related with micro-fabrication/SMT of PoP, optimizing mechanical and electrical design using interposers, silicon die and solder interconnect, warpage studies at room and reflow temperatures. Reliability assessment in thermo-mechanical and drop environments. Prognostics 255 based decision framework for mechanical reliability study of PoP using leading indicators of failures is new. 8.2 PoP Test Vehicle PoP test assembly is a JEDEC standard board which is fabricated at NSF-CAVE3 SMT line [Lall 2010]. The PoP module consists of a two packages i.e. Package-Stackable-Very-Fine- Pitch BGA (PSvfBGA) as the bottom package and a chip scale package as the top package. The board is made of FR-4. Both packages have perimeter array solder interconnect configuration. The bottom package (PSvfBGA) has a ball pitch of 0.5mm while the top CSP package has a ball pitch of 0.65mm. The size of the both packages is 12mm x 12mm. The I/O counts on the lower tier package is 305 and top tier package is 128 respectively. The height of the PoP stack is 1.2 mm. The test vehicle consists of a single PoP module as shown in Figure 8.1. The component is daisy chained. Details of the daisy chain pattern on the board assembly can be found in [Lall 2010]. The alloy composition of the solder interconnects for the top tier package was SAC105 and lower tier package was SAC125Ni. (a) 256 (b) Figure 8.1: (a) CAVE-3 Package-On-Package test assembly. (b) PoP stack with significant dimensions. Table 8.1 Specification of PoP component. Package On Package Lower Tier Top Tier Package PSvfBGA CSP Solder Alloy SAC125Ni SAC105 Size (mm) 12 12 I/O Count 305 128 Pitch(mm) 0.5 0.65 Ball Size (mm) 0.23 0.3 Substrate Thickness (mm) 0.3 0.21 Pad Type NSMD NSMD 257 8.3 Development of Experimental Features Package-on-Package test assembly is subjected to zero degree JEDEC drop orientation. Figure 8.2 shows PoP assembly mounted on Lansmont Shock system with package facing downwards. Both contact and non-contact measurement techniques are used for measurement of dynamic response and its derivative. Strain gages are mounted strategically on the PoP component on the board side as well as on the package side. Digital image correlation in conjunction with high speed imaging is also used for measuring full field dynamic strain histories under shock event. The dynamic response of printed circuit board assembly with PoP component is significantly affected by repeatability of the drop orientation. Effort is put for maintaining a controlled drop of the PoP assembly. The set up is ensured to be repeatable. The drop height is adjusted such that the assembly experiences a shock pulse of 1500g, 0.5millisecond half sine pulse. The cameras used for non-contact measurement are placed in a horizontal plane at an angle of 25 degrees from each with board side of the test assembly exposed. The board side of the PoP assembly is speckle coated for DIC. The cameras are calibrated before measurement of shock events. High speed video of the shock event is captured by cameras operating at 50000 frames per second. Figure 8.5 represents the sample strain contour acquired during the drop testing of PoP test board. Strain and continuity data is also procured using high speed data acquisition system operating at 2.5 to 5 million samples per second. Figure 8.4 shows the dynamic strain on the board side of the PoP test assembly. The failure of the PoP component is quantified using increased voltage as indicated by an open daisy chain resistance in Figure 8.3. 258 Figure 8.2: PoP component mounted on Lansmont shock system in zero degree JEDEC drop orientation. Figure 8.3: Monitoring of Shock induced damage by daisy chain resistance in PoP assembly. 0 0 . 0 2 0 . 0 4 0 . 0 6 - 1 0 0 10 20 T i m e ( s e c ) V o lt a g e (V ) C o n t i n u i t y 259 Figure 8.4: Sample transient dynamic strain from a shock event of PoP assembly. Figure 8.5: 3D contour of strain in longitudinal direction from DIC of PoP test assembly in 0- degree orientation. 8.4 Development of Error-seeded Features (Simulation) Explicit finite element analysis of PoP test vehicles is performed for JEDEC Drop orientation. Conventional-shell beam model of the test vehicles are modeled. Various competing failure modes are modeled on the detailed package and strain histories are retrieved for studying fault mode classification. In a JEDEC drop various failure modes like solder interconnect failure, 0 0 . 0 2 0 . 0 4 0 . 0 6 - 1 0 -5 0 5 10 T i m e ( s e c ) M ic r o -s tr a in s T r a n s i e n t S t r a i n 260 solder interconnect fracture, chip de-lamination and chip fracture take place due to bending (flexing) of PCB and mechanical shock experienced by the whole board assembly in drop event. Since the mentioned failure modes are the most frequently observed in the drop phenomenon, hence strain histories are extracted from simulating the drop phenomenon with each mode of failure exclusively present in the model. Reduced time integration scheme is adopted in the explicit finite element simulation of drop phenomenon. In reduced time integration, less integration points are present, hence the computation is economical. First order elements are used to model the global PCB assembly. Since a drop simulation is performed, large strains and high strain gradients are expected. The board is modeled using reduced integration conventional shell element i.e. S4R. S4R are quadrilateral shell elements which are used for large strain formulation. They have six degrees of freedom, i.e. 3 rotations and 3 translations. The solder interconnects are modeled using two nodded element i.e. Timoshenko beam elements (B31). These B31 elements have six degrees of freedom, i.e. 3 rotations and 3 translations. To simulate inter-connect behavior; the rotational degrees of freedom are constrained. B31 elements are Timoshenko beam elements and do not preserve the normal behavior of the beam cross section, hence they allow shear deformation of the cross section. This phenomenon of shear deformation is critical in simulation as it is a dominant mode of failure in the first level interconnects. Various layers of the package like copper pad, mould, die, BT substrate are modeled using C3D8R elements. C3D8R are 8 nodded reduced integration hexahedral elements with 3 translation degrees of freedom. The floor of impact is modeled using R3D4 element and a weight is attached to the board. The contact between rigid floor and weight of is defined as node to surface using a reference node. The JEDEC orientation for PoP test assembly is shown in Figure 4.7. Figure 4.8 shows the cross 261 sectional detail of the modeled packages for the test vehicles. The faults occurring in the test vehicle during drop event are simulated in the simulation by error seeding the assembly manually. This manual error seeding is used to form a data set which can be used to classify the actual fault modes occurring due to the physical damage taking place in experimental data. THe error seeding is performed on the lower tier of the PoP component. Significant strain is taken up by 2nd level interconnects of the lower tier package. Figure 8.6: Global zero degree JEDEC drop of PoP assembly. 262 Figure 8.7: Cross Section of detailed modeling of PoP module using explicit finite elements on ABAQUS. Solder Ball failure and Cracking The solder balls in the drop event are subjected to mechanical shock. Due to the impact the board undergoes considerable bending for small duration. Therefore the drop event is transient in nature. Due to repeated drop events of the board assembly the solder balls undergo fatigue failure leading to complete failure or solder interconnect missing. In explicit finite element analysis, the board assembly is error seeded for solder ball cracking and fracture. According to distance to neutral point formula, corner most solder balls in the package will P C B So l d e r In te r c o n n e c t C u P a d M o l d B T Su b s tr a te D i e D i e A tta c h T o p T i er P a c k a g e L o w er T i er P a c ka g e D i e M o l d B T Su b s tr a te 263 experience maximum shear strain. There is also maximum stress concentration in the corner most solder balls. Most commercial packages use one or more solder interconnects as redundant, which facilitates daisy chain continuity on damage of corner solder balls and their failure. Hence the corner most solder interconnects is most likely to fail in drop events. Solder ball failure is simulated on lower tier of the PoP component using explicit model by reducing the cross sectional area of the modeled solder inter connect. Simulation of partial cracking of the solder ball is followed by elimination of the solder inter connect. Figure 8.8 shows a schematic of solder interconnect array of the lower tier package simulated with each solder ball cracking and fracture in PoP test vehicle. Inter-connect failure is modeling by sequentially selecting solder balls at the periphery of the inter-connect array configuration. A comprehensive simulation data set is formed by simulation of inter-connects failure. Transient strain histories are obtained for the drop events from elements at the center of the package (on the mould side as well as on PCB side). Figure 8.8: Error seeded explicit finite element models: solder interconnect failed. Die Cracking O ne S ol de r F a i l e d T w o S ol de r F a i l e d T hre e S ol de r F a i l e d F our S ol de r F a i l e d 264 Chip fracture is simulated on PoP component in the lower tier package. Die cracking is modeled at the underside of the chip. The fracture on the chip is modeled as a crack occurring in the chip. The crack is modeled by removing elements at the crack location and replacing them by a contact surface. The contact surfaces represent in the die crack. The chip fracture mode of failure is different test vehicles is shown in Figure 8.9. Figure 8.9: Error seeded explicit finite element models: die cracking. Chip Delamination Chip de-lamination is also a very common mode of failure occurring in the drop events. Chip Delamination occurs when there is a crack or detachment between the bond in the chip and the BT substrate. The phenomenon is modeled by modeling contact elements between the die attach and BT substrate in the lower tier package of the PoP component. Figure 8.10 shows the model of chip delamination in the PoP component. C o n t a ct Su rf a ce R e p re se n t i n g D i e F ra ct u re 265 Figure 8.10: Error seeded explicit finite element models: chip delamination. Part Fall Off Falling of parts (packages) in portable electronics is a very common phenomenon for portable electronics under drop and shock. Part fall off is also simulated as one of the possible failure modes in this study. The PoP component is extremely bulky component in the test assembly studied. When assembly is subjected to shock the PCB experiences significant out of plane deformation with solder interconnects subjected to transverse shear. With PoP component being bulky in nature it is highly susceptible to Part Fall Off when used in portable in electronics. Strain histories at the board side near the center of the package are extracted. Figure 8.11 represents the configurations of the test boards used in this research work with PoP part falling off the PCB assembly. Figure 8.11: Error seeded explicit finite element models: part fall off. D e l a mi n a t i o n b e t w e e n D i e a n d BT Su b st ra t e P o P C o m p o n e n t M i ss i n g 266 8.5 Development of Feature Vectors for Fault Mode Identification The methodology developed in the study for failure mode identification in PoP electronic assembly under mechanical shock represents a complete solution of the classification problem. Karhunen Lo?ve Transforms (KLT) is used for de-correlation of the feature space, which isolates the center of gravity of each impending failure mode in the feature space. Multilayer Perceptron feed forward neural network is designed to extract hard decision boundaries between competing failure-modes in the feature space. Figure 8.12 represents the schematic of various data processing sequences for performing real time fault monitoring in PoP test assembly under transient drop and shock loads. In this study a feature vector based approach is adopted. Continuous stream of time domain data is used as the in input for feature extract. As shown in Figure 8.12, the time domain data is used for feature extraction by Joint time frequency analysis of time domain dynamic transient strain. The JTFA feature space is de-correlated using Karhunen Lo?ve Transforms (KLT). Hard separation and identification of the region in the feature space belong to each failure mode is extracted using a supervised multi-layer perceptron neural net. Various dominant failure modes in the PoP test vehicle subjected to transient drop have been isolated in this work. Two comprehensive data sets are procured for PoP test vehicle. The two data sets are error seeded simulation data set and experimental data set respectively. The error seeded simulation data set is obtained by performing finite element simulations of the PoP test assembly in 0 degree JEDEC configuration on ABAQUS. Strain histories from board side as well as from package sides are captured at the PoP component on the assembly. The error seeded simulations of the test vehicles are performed for various targeted failure modes such as pristine state (healthy), solder inter-connect cracking, solder inter-connect completely failed, chip 267 cracking, chip delamination, part fall off etc. Each error seeded simulation of the test vehicle is performed by modeling each targeted fault mode exclusively. The experimental data set is procured by performing shock testing of the PoP test assemblie in JEDEC configuration. The strain response is captured at various target locations on the test board. Both contact (strain gage data) as well as non-contact (high speed imaging in conjunction with digital image correlation) measurement of the strain histories is performed. The assembly is tested from pristine state to some accrued state of damage as well as beyond failure in experimentation. Figure 8.12: Data processing sequence for real time fault monitoring. 8.5.1 Joint Time Frequency Analysis for Shock Signals Transient response of the PoP circuit board assembly is analyzed by Joint time-frequency analysis. Previously authors have implemented time-frequency feature vectors as a damage proxy for quantification of damage initiation and progression using statistical pattern recognition [Lall 2007, 2008] in test assemblies under transient drop. Since the transient strain history response from the test assemblies are in time domain and non-stationary in nature, hence little C o mp le t e So lu t io n S t ra i n D a t a (T i m e D om a i n) F re que nc y M om e nt s (T F R D om a i n) KL - T ra ns form (D e - c orre l a t i on of S pa c e ) S upe rvi s e d P a ri t y By M ul t i - L a ye r P e rc e pt ron ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? M21 n M n 2 n 1n 2 M 2 2 2 12 1 M 1 2 1 11 t...ttT i m e S c a l e s t r...s t rs t rS hoc k ....... s t r...s t rs t rS hoc k s t r...s t rs t rS hoc k Var i ables ObjectsObjects ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? M21 n M n 2 n 1n 2 M 2 2 2 12 1 M 1 2 1 11 fb...fbfbF re qB i n fm...fmfmS hoc k ....... fm...fmfmS hoc k fm...fmfmS hoc k Var i ables ObjectsObjects D e c i s i o n B o u n d a r y w i t h H a r d S e p a r a t i o n b e t w e e n F a i l u r e M o d e s ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? M21 n M n 2 n 1n 2 M 2 2 2 12 1 M 1 2 1 11 pc...pcpcno_PC z...zzS hoc k ....... z...zzS hoc k z...zzS hoc k Ob jects Vari ab les Ob jects 268 can be inferred how frequency content is evolving with time in the signal. To exploit relevant variance in the transient strain signal, JTFA is performed. Cohen class of transforms has been applied to compute the joint time frequency distribution. A Reduced Interference Distribution (RID) kernel has been used as an auxiliary function to reduce cross-terms and thereby reducing the interference, which is seen in other popular joint time frequency analysis techniques such as Wigner-Ville transforms [Cohen 1989, 1995, Williams 1994]. In this study, the binomial time-frequency kernel proposed by [Jeong 1992a,b] has been applied to study the drop and shock characteristics of an electronic assembly. The binomial time-frequency Distribution defined by [Jeong 1992a,b] is, ?? ?????? ???? ????? ???? ?? ????????????? ????? ??? ?????? 4i2 en(fn(f22 )(g(h),n(T F R (1) where ????? g( and (h is the time smoothing window and the frequency smoothing window respectively and )n(f represents the signal where N2,1n ?? . The term ???? , and is used to define the RID kernel as the RID kernel constraint is that 0???? . The frequency smoothing window ???g( and the time smoothing window ??(h used here is a hamming window of size (N) as outlined in [Jeong 1991, Jeong 1992a,b, Williams 1994]. Figure 8.13 shows a time frequency distribution of a transient strain history obtained from the JEDEC drop of the test vehicle. 269 Figure 8.13: Joint time frequency feature space of a transient strain signal. The time frequency analysis of the signal has been used to obtain the frequency content of the transient strain signal at each given time instant. The time frequency distribution obtained for a JEDEC standard horizontal drop of an electronic assembly is shown in Figure 8.13. The time-frequency signature is based on transient strain signal obtained from two sources including the strain sensors placed on the electronic assembly and digital image correlation based on high- speed imaging during the shock event. The time moment and frequency moment distributions shown are unique to a given signal and represent the strain signals in the joint time-frequency spectrum. The first order moments, in time and in frequency, of a time-frequency energy distribution, tfr, describe the averaged positions and spreads in time and in frequency of the signal. The time moment represents an estimation of instantaneous frequency at a given time instant during the drop event [Boashash 1989, Cohen 1995, Tacer 1995]. The frequency moment represents an estimation of the group delay of the signal for each frequency in the signal. [Cohen 1995, Tacer 1996, Georgopoulos 1997]. Since frequency moment (eq.3) feature vectors are 270 unique for each signal they are an appropriate choice for prognostics of electronic assemblies in drop and shock. Frequency moments are proportional to time-frequency distribution (eq.2); hence they are used as representative feature to study evolution of the variance in the feature space with shock events in time. Figure 8.14 shows the moment feature vectors obtained for the transient strain signal respectively First Frequency-moment )f,t(tfr)f(t m ? (2) ?? ??? ? ??? dt)f,t(t fr dt)f,t(t frt)f(t m (3) Figure 8.14: (a) Sample frequency moment feature vector for transient strain signal from a JEDEC drop 0 100 200 300 400 500 -5 -4 -3 -2 -1 0 1 2 3 4 F r e q u e n c y ( H z) Instanta neous Time (sec ) 271 8.5.2 De-Correlation of the Feature Space by Karhunen Lo?ve Transforms (KLT) KLT is a statistical classifier which has been used for de-correlation of feature space extracted from JTFA analysis of the transient shock signals. KLT is a linear project scheme which leads to abstraction of information and dimensional reduction. The property of KL transform is exploited in this work for studying damage progression in package interconnects during successive drop events. The de-classification of feature space has been done based on the variability of the data. The time-frequency feature space has been clustered into most dominant directions of variability. Previously, KLT has been used for data compression in classical communication theory [Ogawa 1986, Yamashita 1992, Shawn 2004]. The use of KLT for failure-mode classification of 3D packaging components such as Package on Package is new. The data set described in Figure 8.15 has been de-correlated using KL transform. Let X is the representation of the variable-space in the environment of interest. Joint Time frequency distributions of the strain histories from successive drop events from pristine assembly configuration to failure for each board assembly has been used as the input matrix, X. A de- classified feature space Z has been obtained using the KL transform of the matrix, X. The de- classified set of vectors is a linear combination of principal components with decreasing order of importance. The initial k-vectors are important as they account for most of the variance in the data. ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? M21 n M n 2 n 1n 2 M 2 2 2 12 1 M 1 2 1 11 fb...fbfbF re q B i n fm...fmfmS h o c k ....... fm...fmfmS h o c k fm...fmfmS h o c k ]X[ (4) 272 Figure 8.15: Sample classification matrix for fault isolation. ? ? ? ? d im e n s io n smK L Td im e n s io n sm ZX ?? ? (5) The data set X has been centered and scaled to eliminate a non-zero mean of matrix X. ?Since the input matrix has been centered and scaled, the expected value of the input matrix is zero, 0]X[E ? (6) The input matrix X has been projected on a unit vector, q in the de-correlated feature space, also of dimension-m. The projection is represented as an inner product of vectors X and q is the matrix of principal components, A, XqqXA TT ?? (7) The variance of A has been represented as a function of unit vector, q, 0 50 100 150 200 250 300 350 400 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 F r e q B i n S h o ckE ve n t 0 0 . 1 0 . 2 0 . 3 0 . 4 0 . 5 0 . 6 0 . 7 0 . 8 0 . 9 1 273 Rqq q]XX[Eq )]qX)(Xq[(E ]A[E T TT TT 22 ? ? ? ?? (8) Where, the outer-product of X, has been represented as R. The variance probe, ? has been computed, since it relates correlation matrix, R, the unit vector in de-correlated space, q, and standard deviation, ?. Rqq)q( T2 ???? (9) The equation that governs the unit vectors, q, and variance probe ? an eigenvalue problem, which has a non-trivial solution, 0q? , qRq?? (10) The eigenvalues have been arranged in descending order. m321 ..... ???????? (11) The eigenvector matrix Q is orthogonal consisting of column-vectors which satisfy the condition of orthonormality, ? ?n321 q...qqqQ ? (12) ?? ??? ? ?? ij0 ij1qq j Ti (13) Using eigen-decomposition, the correlation matrix R has been written in terms of eigenvalues and eigenvectors as, ?? ?? m1i TiqqR ii (14) 274 The eigenvectors of the correlation matrix R represent the principal directions along which the variance probes ?(qj) have extreme values. The associated eigenvalues define the extreme values of the variance probe ?(qj). There are m possible projections of x, corresponding to m possible solutions of unit vectors q. Projections aj , which are the principal components, have been combined into a single vector as follows, T]a,,.........a,a,a[A m321? (15) xQA ]qx,,.........qx,qx,qx[A T TTTTT m321?? (16) The original data-vector has been synthesized from the transformed feature space of principal components by pre-multiplying the above equation by Q, ??? ? m 1j jj qaX QAX (17) The original data vector x has reduced dimensions from the transformed feature space a as, ??? ?1j jjqax? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? a . . a a q..qqx? 1 1 21 (18) where l < m. The KL transform has been used to create a linear projection of feature space from m- dimensions to l ? dimensions, which approximates the original data x. Dominant directions of the de-correlated feature space have been determined by first few largest eigenvalues. The principal components entering transformation are also determined by the dominant eigenvalues. Figure 8.16 represents scree plots of PoP Test board for simulation and 275 experimental data sets respectively. Figure 8.17a represents the de-correlated errors seeded data set populated in first three dimensions. Distinct groups in various fault modes can be seen in separation in Figure 8.17a. Figure 8.17b represents the de-correlated overlap plot of experimental feature space on error seeded space. Various clusters of different dominant failure modes get populated with experimental features Figure 8.17b. In this study, the idea is to develop a prognostics based methodology for fault monitoring as well as damage diagnostics. Development of supervised neural controller is performed next in this work. (a) (b) 0 1 2 3 4 5 6 7 8 9 10 11 20 40 60 80 100 Pr i n c i p a l C o m p o n e n t N u m b e r Pe r c e n t Va r i a n c e (% ) C u m u l a ti v e Va r i a n c e I n d i v i d u a l Va r i a n c e 2 4 6 8 10 12 14 16 18 20 40 60 80 100 Pr i n c i p a l C o m p o n e n t N u m b e r Pe r c e n t Va r i a n c e (% ) C u m u l a ti v e Va r i a n c e I n d i v i d u a l Va r i a n c e 276 Figure 8.16: Scree plots of PoP test board (a) simulation (b) experiment. (a) (b) Figure 8.17: De-correlated space (a) error seeded data set (b) experimental data set overlapped on error seeded data. -5 0 5 10 15 2 4 6 -2 -1 0 1 2 3 N o r m a li z e d P r in cip a l C om p on e n t - 3 - 1 0 -5 0 5 10 15 2 4 6 -2 -1 0 1 2 3 N o r m a l i z ed P r i n ci p a l C o m p o n en t - 3 F e a t u r e Sp a c e fo r He a l t h y F e a t u r e Sp a ce fo r Di e De l a m i n a t i o n F e a t u r e Sp a c e fo r I n t e r c o n n e c t F a i l e d F e a t u r e Sp a ce fo r I n t e r co n n e ct C r a ck e d F e a t u r e Sp a c e fo r F a i l e d Co m p o n e n t F e a t u r e Sp a c e fo r Di e Cr a c k i n g 277 8.6 Development of Multiplayer Perceptron Network for Hard Parity of Failure Modes In this study, stepwise partiy of failure modes is performed on a 3-dimensional de- correlated space obtained by KL transform on the PoP test assembly. A multilayer perception network is developed using supervised training of perceptrons. Perceptrons are trained using delta learning rule. Stepwise partiy is performed on simulation data set of PoP assembly. Since simulation data set consists of shock features from drop simulations exclusively error seeded with a certain type of failure. This exclusive error seeding of failure modes facilitates target assignment. Each fault mode is taken as a potential targets and segregated from other potential fault modes in the 3D feature space. The traning of perceptrons using delta rule is as explained as follows. 8.6.1 Delta Rule A single neuron can separate 2 classes with a line or a plane or from a hyperplane depending on the dimensionality of the input space. In this work perceptrons are used for separating different dominant failure modes using a plane in a 3D feature space. Training of a perceptron [Wilamowski 2007] with delta rule generalizes to back propagation for a multi-layer perceptron feed-forward network. Figure 8.18 shows a generic single perceptron used for partiy of classes (fault modes) in this study. The training scheme has 3 main phases i.e. initialization, learning and adaptation. Each phase is explained as follows. Initialization In this study, sequential training of perceptrons is performed for stepwise parity. Each pattern in the error seeded data set fires randomly in the neuron. Before training starts various parameters are initialized. The weights of the input synapses are initialized randomly. Learning rate (?), gain across the neuron (k), maximum error (emax), number of iterations (nmax) are 278 initialized. Also an appropriate activation function is selected. In this study, unipolar neurons are selected with a soft sigmoidal activation function as shown in Figure 8.19. The output of unipolar neurons varies between 0 and 1 as seen in Figure 8.19. The soft activation sigmoidal function is differentiable. Eq.1 and Eq.2 represent the soft activation function and its derivative. 1)n e tk2e x p (1 2)n e t(f ????? (19) ? ? ? ?2o1knet'f ??? (20) Since delta learning rule is a supervised training scheme hence before training is performed a target is also initialized. Here since stepwise parity of each failure mode is performed in the feature space, hence each failure mode is taken as a potential target in the design of a multilayer perceptron network. Learning Learning is one of the primary stages of Delta rule. In this, when patterns fire randomly in the perceptron, adder operation is performed, where initialized weights of the synapses are linearly combined with the input pattern as given by eq. ??? m1i iji )n(xwnet (21) The net across the layer of the neuron is passed through the activation function (soft sigmoidal in this study) for output. Activation function limits the amplitude of the output of a perceptron. This limiting property of the output of the perceptron is called squashing which keeps the output value of the perceptron within permissible limits (0-1: for unipolar neurons). ? ? )n e t(fxw.....xwxwfo nn2p21p1p ????? (22) 279 Back propagation algorithm for training of single unit in this study is based on optimization of a criterion function by iterative gradient descent method. The criterion used to terminate training of the perceptron unit is defined as sum of squared error (SSE) or total error energy [Haykin 2005]. The objective criterion function is given by eq.5, where ep is the output error vector given by eq.6. ? ? ? ???? Cj 2j ne21nTE (23) ? ? ? ? ? ?nondne j ?? (24) Hence total error energy function is proportional to synaptic weights as well as bias levels of the perceptron. The learning of the perceptron unit will optimize total error function in such a way that it is minimized. The update to the synaptic weights is proportional to the partial derivative of the criterion function given by eq.25. ? ?? ? ? ?? ? ? ?? ? ? ?? ? ? ?? ?nw nn e tnn e t nono nene nTEnw nTE ji j j j j j jji ? ?????????? (25) Now the four partial derivatives in eq.25 on the right hand side are as follows. From eq.23, ? ?? ? ? ?nene nTE j j ?? ? From eq.24, ? ?? ? 1no ne j j ???? From eq.22, ? ?? ? ? ?? ?nn et'fnn et no jjj ?? ? From eq.21, ? ?? ? )n(xnw nnet jjij ?? ? 280 Hence eq.25 simplifies to, ? ?? ? ? ? ? ?? ? ? ?nxnn e t'fnenw nTE jjj ji ????? ? (26) Adaptation In this part of the training the synaptic weights are updated such that the objective function as given in Eq. 23 is optimized. The weight update is performed as per eq. 28. The correction to the synaptic weights is given by eq.27. ? ? ? ?? ?nw nTEnw ijij ?????? (27) Here ? is the learning rate of the training by back propagation. The negative sign represents direction of weight change such that the criterion function TE minimizes. Hence the final weight update equation is given by eq. 28. www ??? (28) Figure 8.18: Generic perceptron layout. ? w i1 w i2 w id o i =f i (ne t i ,? )? x 1 x 2 x d ne t i ac t i v at i on G ai n? O ut put i V ar i abl e Sy napt i c W e i ght s B i as b k Sum m i ng J unc t i on Inpu t Si gnal S y n aps e s Adde r S qu as h i n g 281 Figure 8.19: Soft sigmoidal activation function for a unipolar neuron. 8.6.2 Algorithm: Pseudo-code for Training Perceptron in this study Step-1: Read Patterns and desired output from the truth table. Step-2: Initialize maximum error, maximum no of iterations. Step-3: Calculate size of input pattern matrix, and desired output vector. Step-4: Randomly initialize weight vectors, learning rate and gain. Step-5: Now iteration-1 begins, where pattern no-1 is passed. Step-6: Net is calculated and then net is passed from a selected activation function to calculate output. Step-7: Error is calculated by subtracting output from desired output for that pattern. Step-8: Weights are updated by adding alpha x error x input pattern to the previous set of weights. Step-9: Next pattern is now passed, like this all patterns are passed and steps from 6-8 are repeated. -1 0 -5 0 5 10 -1 -0 . 8 -0 . 6 -0 . 4 -0 . 2 0 0 . 2 0 . 4 0 . 6 0 . 8 1 N e t O u tp u t x -a x i s y -a x i s So ft A c ti v a ti o n k = 1 D e r i v a ti v e o f A c ti v a ti o n F u n c ti o n 282 Step-10: Calculate sum of square of errors (SSE) is performed and checked if it is less than the maximum error. If SSE is less, then stop. Step-12: If SSE is not less below the maximum error then, next iteration starts, where all patterns are passed again and steps from 5-10 are repeated. Step-13: If iterations no increases maximum iterations and error does not go bellow maximum error then either increase the maximum no of iterations, or play with learning rate, gain or select a new population of initial weights or increase the maximum allowed error. And repeat from steps 4-10. 8.7 Hard Parity of Fault-Modes in Package-On-Package Test Assembly The targeted failure modes in this study are the pristine stage, stages with solder interconnect cracking, solder interconnect completely failed, chip delamination, die cracking, part fall off. It is seen from previous experience of the authors [Lall 2008, 2009, 2010, 2011], that above failure modes are representative of a global set of failure modes, which cover most of the damage scenarios (partial, complete as well as mixed modes) in the electronics subjected to drop and shock. Figure 6.21a represents a sample example of the truth table used for stepwise parity of die delamination. Figure 6.21b represent the training of the single layer perceptron used for parity of the targeted failure modes under consideration i.e. die delamination. Before training is performed the weights of the perceptron are initialized randomly. These weights represent an equation of plane as parity is performed in the first 3 dimensions of the principal components representing the pre-failure feature space. Figure 6.21b represents as training proceeds the weights of the neurons evolve represented by evolving of the plane. The training stops when an optimum set of weights (plane) is achieved as the objective function is optimized. 283 Figure 6.21c represent the error plots of the training across single layer perceptron for targeted failure modes of the PoP test assemblies. Failure Mode Label Desired Output Healthy P 0 Solder Cracking IC 0 Solder Missing IM 0 Die Cracking DC 0 Die Delamination DD 1 (Target) Component Fall Off CF 0 (a) (b) N o r m a l i ze d Pr i n c i p a l C o m p o n e n t - 3 I t e r a t i o n - 1 I t e r a t i o n - 77 I t e r a t i o n - 40 I t e r a t i o n - 10 284 (c) Figure 8.20: Training for the parity of feature space representing PoP test vehicle. failure mode: die delamination (a) Truth table for supervised parity (b) Parity by planes in 3D space for die delamination, (b) Error plot for training of perceptron representing die delamination. Once stepwise parity of the feature space is performed parity, decision boundaries between different regions of the feature space representing different failure modes are formed. In this study, since first 3 principal components are used for populating the feature space hence, the boundaries representing parity between dominant failure modes in given by a plane. The regions belonging to each failure mode in the feature space are volumes. A hyper region (volume) is extracted from the feature space by performing AND operation [Jain 1996, Wilamowski 2007] on the layer of neuron used for stepwise parity of the feature space. Figure 6.23 shows the schematic of the artificial neural network designed for identification of the region belonging to die delamination in the feature space. The designed network is a 3-5-6-1 networks i.e. (3 inputs, 5 neurons in 1st hidden layer, 6 neurons in 2nd hidden layer and 1 outputs). The weights of the neurons representing the hyper region are tuned using simulated annealing. A similar approach as shown in Figure 8.21 is used for performing multi-class fault mode classification in PoP test vehicle. 0 20 40 60 80 10 -4 10 -3 10 -2 10 -1 10 0 10 1 I t e r a t i o n s E r r o r 285 Figure 8.21: Schematic of designed neural network used for isolation of a single fault mode (die delamination) in PoP test assembly. 8.8 Result: Inference on Multiple Failure Modes In this section inference on classified failure modes is explained. Two data sets are pro- cured i.e. experimental data set and error seeded simulation data set. Experimental data set is obtained by subjecting PoP TV physically to multiple shock events. The data set captures damage features from pristine state to a partially failed state to a completely failed PoP component. The data sets multidimensional in nature. Error seeded simulation data set is obtained by simulating JEDEC drop using explicit finite element modeling of the PoP TV. Various failure modes are exclusively error seeded in each simulation. The simulation data sets consist of shock features from pristine assembly, partial and complete failure of 2nd level solder interconnects along with failure inside the PoP component. Die cracking and chip delamination are also performed on lower tier package of the PoP TV. From previous experience of the authors and available literature it is seen that maximum strain is transmitted in the component through 2nd level inter connects. Dynamic strain histories are captured on both package sides as D e l a mi n a t i o n b e t w e e n D i e a n d BT Su b st ra t e PC - 1 PC - 2 bi as S t e p wi s e P a r i t y o f Ea c h Fa i l u r e M o d e : Ea c h N e u r o n Re p r e s e n t i n g a P l a n e Re c e p t i v e Fi e l d Re p r e s e n t i n g Re g i o n o f Fa i l u r e m o d e (V o l u m e ): D i e D e l a m i n a t i o n AND O p e r a to r s +1 +1 bi as PC - 3 286 well as on board side. Since drop and shock of electronic components are low cycle fatigue phenomenon hence dynamic strain is chosen as a proxy for quantifying damage initiation and progression along with fault isolation. Most low cycle fatigue phenomenon are strain controlled. Here drop and shock is the harsh environment under which PoP TV is studied. Since the PoP component cannot be cut open to in the middle of the test to check for different failure modes hence simulation data set is critical in this study. As each failure mode is exclusively error seeded in each FE simulation hence it is known ahead of time which shock event in simulation classification matrix belongs to what kind of failure. Table 8.2 represents lables for various error seeded failure modes taken under consideration in this study. Figure 8.22 represents the supervised neural network of perceptrons developed in this work. It is a 3-5-6-6 network i.e. with 3 inputs, 5 hidden neurons in layer-1 and 6 hidden neurons in layer-2 and 6 outputs. The three input signify to the first three principal components extracted from time-frequency analysis in conjunction with KL transform. The 5 hidden neurons in layer-2 represent equation of stepwise parity of each targeted failure mode using planes in a 3-dimensional pre-failure space. The 6 hidden neurons in layer-2 represent region in the 3-dimensional feature space (volume) belonging to each failure mode. The output combinations of the 6 neurons is used for fault isolation. Figure 8.23 shows the classified fault modes in the error seeded data set populated in first 3 principal directions. Various targeted failure modes are seen in different regions of the feature space. Since parity is performed in 3 dimensional space hence the perspective region of volume belonging to each failure mode is seen in different rotations of the feature space as demonstrated from Figure 8.23a-b. The classification seen here is based on severity of each failure mode as error seeded simulations are exclusively error seeded. In a practical scenario i.e. in experimental data set 287 multiply failure modes can occur simultaneously. Also with each shock event in time the severity of each failure mode can change with accrued damage. Figure 8.24 represents the overlapped experimental feature space on simulation space. It is known ahead of time which region in failure space belongs to which failure mode. Hence various shock events populate the first 3 principal directions of the failure space. It is seen that volume of the failure space belonging to solder interconnect cracking and failed is maximum. Intutively as well as based on previous experience of the authors it is a well known fact that maximum damage is taken by the 2nd level interconnects in a drop and shock framework. This is due to the fact that transverse shear of the solder interconnects is very dominant due to out of plane deflection of the PCB assembly. Hence it can be inferred from this cracking of 2nd level interconnects is the most dominant failure mode. Table 8.2: Labels for different fault scenarios. Label Anomaly P Healthy IM Interconnect Missing IF Interconnect Fracture DC Die Cracking DD Die Delamination FC Failed Component Also there are some regions which do not consist of any shock feature or where no simulation feature exists. These regions are regions where some mixed modes exist and variance in the error seeded data set is not explained. Also some variance in unaccounted for damage in the top tier package and PoP TV survived little less than 50 shock events and it is assumed that no severe damage is seen in the top tier. Also the isolation of different failure modes is based on 288 severity hence any shock event lying in a particular region of the space signifies that a particular failure mode is initiated and propagating with every shock event in time. Hence the approach presented here is inclusive of tracking damage progression and isolation. Figure 8.22: Final designed neural network for health monitoring of PoP test assembly. (a) D e l a mi n a t i o n b e t w e e n D i e a n d BT Su b st ra t e C o n t a ct Su rf a ce R e p re se n t i n g D i e F ra ct u re DD IF IM FC DC 6 7 8 9 10 11 +1 P PC - 1 PC - 2 bi as 1 2 3 4 5 +1 PC - 3 O ne S ol de r F a i l e d T w o S ol de r F a i l e d T hre e S ol de r F a i l e d F our S ol de r F a i l e d P o P C o m p o n e n t M i ss i n gN o r m a l i ze d Pr i n c i p a l C o m p o n e n t - 3 H a r d R e c e p t i v e F i e l d f o r D i e D e l a m i n a t i o n R e g i o n H a r d R e c e p t i v e F i e l d f o r H e a l t h y R e g i o n 289 (b) Figure 8.23: Harp parity of error seeded feature space populated in 3 dimensions for various failure modes (a) View-1: represents region of feature space belonging to pristine state and die delamination, (b) View-2: represents regions of various fault mode (eg. snterconnect cracking, interconnect missing, die cracking, falling component). (a) N o r m a l i ze d Pr i n c i p a l C o m p o n e n t - 3 H a r d R e c e p t i v e F i e l d f o r D i e C r a c k i n g R e g i o n H a r d R e c e p t i v e F i e l d f o r I n t e r c o n n e c t C r a c k e d R e g i o n H a r d R e c e p t i v e F i e l d f o r F a i l e d C o m p o n e n t R e g i o n H a r d R e c e p t i v e F i e l d f o r I n t e r c o n n e c t F a i l e d R e g i o n N o r m a l i ze d Pr i n c i p a l C o m p o n e n t - 3 H a r d R e c e p t i v e F i e l d f o r D i e D e l a m i n a t i o n R e g i o n H a r d R e c e p t i v e F i e l d f o r H e a l t h y R e g i o n 290 (b) Figure 8.24: Overlap of error seeded space and experimental space populated in 3 dimensions. (a) View-1: represents region of feature space belonging to pristine state with pristine experimental shocks and die delamination, (b) View-2: represents regions of various fault mode (eg. interconnect cracking, interconnect missing, die cracking, falling component). 8.9 Validation of Classification In this section, the results of classification of different failure modes are validated. The classified failure modes are validated using statistical hypothesis test and experimental cross sections of the failed PoP component. Multivariate Analysis of Variance In this study, Multivariate analysis of variance is used to quantify statistically significance of classification. The experimental data sets and simulation data sets used in this work are high dimensional data sets with multivariate nature. MANOVA is used for performing difference in means of different groups/classes (fault modes) in a 3 dimensional matrix form. N o r m a l i ze d Pr i n c i p a l C o m p o n e n t - 3 H a r d R e c e p t i v e F i e l d f o r D i e C r a c k i n g R e g i o n H a r d R e c e p t i v e F i e l d f o r I n t e r c o n n e c t C r a c k e d R e g i o n H a r d R e c e p t i v e F i e l d f o r F a i l e d C o m p o n e n t R e g i o n H a r d R e c e p t i v e F i e l d f o r I n t e r c o n n e c t F a i l e d R e g i o n 291 Mean being a measure of central tendency of the data, hence if the means of different inherent classes is statistically not different then it signifies that the classes are completely diluted in the data, hence classification of the different patterns in the data will yield no meaningful result. MANOVA is performed to check if the means of different classified failure modes in a 3 dimensional feature space is statistically different or not. Wilk?s lamda is the test statistic used for hypothesis testing. Likelihood ratio test is used for finding Wilk?s Lamda test statistic. It is given by eq. 2/n 0? ? n e d M LU n c o n s t r a i d M LC o n s t r a i n e ?? ? ? ? ?? ? ? ? ? ???? Where, ?? is the estimate of covariance by Maximum Likelihood Function under alternate hypothesis and 0?? is estimate of covariance by Maximum Likelihood Function under null hypothesis. Likelihood Function is given by, ? ? ? ? ?????? ??????????? ?? ?n 1i i1i2/n2/np 'x'x21e x p)2( 1),(L Where, n is the degree of freedom, p is the dimensionality, ? is the estimate of covariance and ? is the mean. Table 8.3: Significance of classification by multivariate analysis of variance (MANOVA). PoP-TV Statistic Value F-Value Pr>F Error Seeded Data Wilk's Lamda 0.00005 26.11 <0.0001 Experimental Data Wilk's Lamda 0.0609 5.62 <0.0001 292 Table 8.3 represents the results of MANOVA performed on the features which populate the partitioned 3 dimensional pre-failure space with different regions of the feature space belonging to different fault modes. A p-value less than 0.05 signifies that statistically there is 95% confidence that if not all, at least one of the means of the classified failure mode is significantly different from the means of the other classified failure modes. Similarity Matrices by Hoteling?s T-Square The existing similarity between different isolated dominant failure modes is calculated using Hotelling?s T-square test. The data sets used for parity of failure modes are high dimensional. Data compression and de-correlation is performed for parity in 3-diemensional feature space. Hoteling?s T-square test is used for pair wise comparison of various shock features belonging to different classes (failure modes) in a multivariate framework. Test statistic for this test is given by eq- ? ?? ? ? ? )pn,p(Fpn p)1n(xSxnT 0102 ????????? ?? Where, ?n? is the no of observation in each class and ?p? signifies dimensionality of the observation. The above T-square formula, tests, if the mean of the class x is equal to ?0 or not. The T-square statistic follows a scaled f-distribution and takes into account the covariance ?S? of the data set. Table 8.4(a) and Table 8.4(b) represent the similarity between different failure modes in PoP test assembly for simulation and experimental data sets respectively. A value less than 0.05 indicates statistical dissimilarity between the two classes. Results indicate that different failure modes are dissimilar and that the main diagonal terms which are intended to be similar show a p-value of 1. Table 8.4: Similarity matrix for different fault modes. (a) error seeded data set (b) experimental data set. 293 (a) (b) Experimental Cross Section The failure modes classified in this study on PoP test assembly are validated using experimental cross sections of the failed PoP components. From the cross sections it is seen that significant cracking of the 2nd level interconnects takes place in the lower tier of the PoP package. Previous experience of the authors [Lall 2008, 2009, 20010, 2011] also suggests that cracking of 2nd level interconnects is one of the most dominant failure modes in electronic assemblies under drop and shock. Figure 8.24 also indicates solder cracking as the most dominant failure mode, as from visual inspection it can be seen that region representing solder cracking and failure is maximum in the volume. Figure 8.25 represents cracking of lower tier corner solder interconnects. The failure is seen on board and package sides. P IF IM DC DD FC P 1 0 . 2 3 0 . 1 8 0 . 2 1 0 . 3 7 0 . 1 2 IF 1 0 . 3 5 0 . 4 2 0 . 1 1 0 . 2 5 IM 1 0 . 1 5 0 . 2 0 0 . 1 4 DC 1 0 . 1 9 0 . 3 8 DD 1 0 . 2 5 FC 1 D i a g o n a l M a t r i x S i g n i f i c a n c e L e v e l 9 0 % P IF IM DC DD FC P 1 0 . 2 0 0 . 1 1 0 . 3 9 0 . 4 0 0 . 1 4 IF 1 0 . 2 8 0 . 3 4 0 . 2 7 0 . 6 8 IM 1 0 . 4 4 0 . 5 3 0 . 5 7 DC 1 0 . 6 0 0 . 3 6 DD 1 0 . 2 5 FC 1 D i a g o n a l M a t r i x S i g n i f i c a n c e L e v e l 9 0 % 294 (a) (b) Figure 8.25: Experimental cross sections of 2nd level interconnects with cracking and fracture.(a) Board side, (b) Package side 8.10 Inference on Damage Initiation and Progression In this work, prognostics and health monitoring decision framework is developed for Package-on-Package component under accidental drop and shock. The pattern classifier using supervised neural net developed in this work can also be used for addressing damage diagnostics along with fault mode classification. The neural net developed in Figure 8.22 can be used for 295 tracking type of failure mode and localization of anomaly in the component. Table 8.5 summarizes the various possible outputs if the neural network presented in Figure 8.22. If this network is simulated with first three principal components of different shock feature then the output of various neurons in hidden layer-2 will fire output of various combinations as given in Table 8.5. For example if fifth column of Table 8.5 signifies that the PoP assembly is have die cracking as the dominant failure mode, hence neuron representing a die cracking state fires an output of 1 while other neurons remain dormant with an output of 0. Hence this combination of output from fifth column is indicative of that die cracking mode has initiated and propagating. The localization of the damage is in vicinity of die region inside the PoP package. Hence this way fault initiation and localization inside the component can be performed. Similarly as PoP assembly is subjected to subsequent shock events in time, the shock features in 3 dimensions based on time-frequency analysis can be used to simulate the network and inference on the state of damage and its location can be made. Table 8.5: Output combinations of neurons for inference on fault initiation. Inference purely on damage initiation can also be performed by studying similarity matrices as given by Table 8.4. Figure 8.26a and Figure 8.26b represents the charts for the pair- wise comparisons of different shock features with the pristine state. A constant degradation in the confidence values is representative of accrued damage in the PoP test assembly when N eu ro n N u m b er 6 1 0 0 0 0 0 0 N eu ro n O u tp u t 7 0 1 0 0 0 0 0 8 0 0 1 0 0 0 0 9 0 0 0 1 0 0 0 10 0 0 0 0 1 0 0 11 0 0 0 0 0 1 0 A n a m o l y P IM IF DC DD FC Mi x - Mo d e 296 subjected to shock events. Hence damage initiation and progression thresholds are characterized using dissimilarities obtained from comparison of various shock features with pristine state. (a) (b) Figure 8.26: Inference on damage initiation and progression from statistical hypothesis. (a) error seeded feature space (b) experimental feature space. 0 0 . 1 0 . 2 0 . 3 0 . 4 0 . 5 0 . 6 0 . 7 0 . 8 0 . 9 1 P IM IF DC DD FC C o n f i d e n c e V a l u e F a i l u r e M o d e H e a l t h y U n h e a l t h y 0 0 . 1 0 . 2 0 . 3 0 . 4 0 . 5 0 . 6 0 . 7 0 . 8 0 . 9 1 P IM IF DC DD FC C o n f i d e n c e V a l u e F a i l u r e M o d e H e a l t h y U n h e a l t h y 297 8.11 Summary and Conclusion In this chapter, a prognostics and health monitoring decision framework is presented for characterization of damage initiation and progression along with isolation of dominant failure modes for a Package-on-Package component-test assembly is presented. The PoP assembly is studied under drop and shock environments. Transient dynamic strain histories obtained from the PoP assembly are used for procurement of experimental data. Error seeded simulation data set is formed using explicit finite element simulations. The time-domiain strain histories are used for deriving feature vectors from time-frequency analysis. Karhunen Leove transform is used for decorrelation of the feature space. 3-dimensional feature space is used for hard parity of potential failure modes. Multilayer perceptron network is desigined for tracking of dominant failure modes. The classified failure modes are validated using multivariate analysis of variance and Hoteling?s T-square. The failed analysis of PoP component is also performed under SEM for location of failure sites. The methodology presented in this work is scalable to system level reliability and can address damage diagnostics and fault mode classification in 3D packaging architectures such as Package-on-Package. 298 9 Chapter-9 Summary and Conclusions 9.1 Silent Features and Key Advancements in this Work In this research work a prognostics and health monitoring (PHM) decision framework is developed for electronic systems under mechanical shock. Damage diagnostics and fault mode classification are the two stages of prognostics and health monitoring addressed in this research work. A strain based approach is undertaken, where a continuous stream of data in the form of transient time domain strain histories is taken as input data. This input stream is procured from the electronic assemblies under shock loads. Being a feature vector based approach, the input data is processed in different domains for feature extraction. Evolution of variance in these feature vectors is used as a proxy for inferring damage initiation, damage progression and isolation of dominant failure modes. Development of a decision framework for characterization of damage initiation and progression is addressed using feature vectors derived from wavelet packet decomposition, spectral analysis, and joint time-frequency analysis. Statistical pattern recognition techniques are implemented for quantifying damage initiation thresholds. Autoregressive and moving average models are used for studying short term trends on damage progression. The study is performed on following types of packages: ball grid array (BGA?s), chip scale packages (CSP?s), field programmable gate array ( PGA?s) and conventional Package-On-Package (PoP). Development of feature vector based fault mode classification methodology using Karhunen-Lo?ve transform in electronics under drop and shock is presented in this work. Various dominant failure modes such as die cracking, interconnect fracture, chip de-lamination, 299 part fall off have been isolated. The isolated failure modes are validated experimentally as well as statistically. A neural controller for performing damage diagnostics and fault localization in the component is also developed. Supervised learning of damage initiation and progression is exploited for localization of dominant fault modes in the test assemblies under shock. Back propagation algorithm is used for training perceptrons which are used for hard parity of fault modes. A divide-and-conquer approach is used for stepwise parity of the feature space with localization of the region in the feature space belonging to different dominant fault modes. Implementation of intelligence based techniques such as self organization algorithm for addressing damage initiation and progression along with fault isolation is achieved. Self organization is an unsupervised learning technique, which has shown capability for addressing both stages of prognostics and health monitoring simultaneously i.e. damage diagnostics and fault isolation in the component. The damage monitored using neural networks is validated statistically in a multivariate frame for significance of classification of faults, similarity between different shock events and for non-homogeneity of variance in the data sets. The framework presented for prognostics and health monitoring of electronics under drop and shock has no reliance on conventional damage monitoring techniques which are based on reactive failure such as continuous monitoring of daisy chain resistance, use built-in-self-test (BIST) and use of auxiliary devices such as fuses and canaries for detecting event when failure takes place. The methodologies developed in this work are in pre-failure feature space where some prior knowledge about when and where a particular failure mechanism will initiate and propagate is addressed. Significant advantage can be gained if prior knowledge about damage is 300 available, for prevention of catastrophic shutdown of systems. It will lead to effective and timely scheduling maintenance for replacement of parts etc. 9.2 Suggestions for Future work The present work can be extended in different following dimensions. The approach presented in this work is data driven approach at component level. Since it is a generic approach, it can be scaled up to study system level reliability of electronic systems. In this work, the prognostics and health monitoring techniques are developed and implemented on 2-dimensional packages such as ball grid array. The current trends in industry require low cost smaller, reliable and faster electronic packages. The packaging density is increasing, and more and more of miniaturization of the packages is taking place in electronics industry. Hence these techniques will be required to be implemented to novel 3D packaging configurations such as Package-interposer-Package(PIP), conventional Package-on-Package (PoP) and through-silicon via (TSV). 3D packaging modules are becoming increasingly popular in hand held electronic applications as they can incorporate logic and a memory part toghater in Z-directions. There is no literature available on behavior of these in drop and shock environment. Electronic industry is currently compelled to follow ROHS (restriction of hazardous substances) directive. With standard eutectic SnPb being phased out, the electronic industry is going to be lead-free (Pb-free). Current research work is on packages with tin-silver-copper alloys compostions (SAC305, SAC405, SAC125Ni) and standard tin-lead eutectic alloy (PbSn) compositions for solder interconnect. This work can be expanded on different packaging architectures with other different SAC alloy compositions to address prognostic and health monitoring. 301 The techniques presented in this work can be tailored according to the need for reliability. These can be implemented to a wide array of applications such as portable electronics, implantable biological devices, avionics, house hold appliances etc. In many of these applications, electronics undergo multiple overlapping harsh environment conditions such as thermal cycling, power cycling, isothermal aging, vibration and shock. The present work is implemented on electronic systems purely under shock and fits well for critical applications such as in avionics where shock can be prime source of initiating failure. Also this work is highly significant to hand held electronic applications where drop and shock alone can trigger significant damage in the electronic component. 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J., The Application of the Wigner Distribution to Machine Tool Monitoring, Proceedings of the Institution of Mechanical Engineers, vol. 206, pp 249-264, 1992. 321 11 Appendix A Benchmarking Data Set: Iris Flower Data Set Sepal Length Sepal Width Petal Length Petal Width Species 4.6 3.6 1 0.2 setosa 4.3 3 1.1 0.1 setosa 5 3.2 1.2 0.2 setosa 5.8 4 1.2 0.2 setosa 4.5 2.3 1.3 0.3 setosa 4.4 3 1.3 0.2 setosa 4.4 3.2 1.3 0.2 setosa 4.7 3.2 1.3 0.2 setosa 5 3.5 1.3 0.3 setosa 5.5 3.5 1.3 0.2 setosa 5.4 3.9 1.3 0.4 setosa 4.4 2.9 1.4 0.2 setosa 4.8 3 1.4 0.1 setosa 4.8 3 1.4 0.3 setosa 4.9 3 1.4 0.2 setosa 4.6 3.2 1.4 0.2 setosa 5 3.3 1.4 0.2 setosa 4.6 3.4 1.4 0.3 setosa 5.2 3.4 1.4 0.2 setosa 5.1 3.5 1.4 0.2 setosa 5.1 3.5 1.4 0.3 setosa 4.9 3.6 1.4 0.1 setosa 5 3.6 1.4 0.2 setosa 5.5 4.2 1.4 0.2 setosa 4.6 3.1 1.5 0.2 setosa 4.9 3.1 1.5 0.1 setosa 4.9 3.1 1.5 0.2 setosa 5 3.4 1.5 0.2 setosa 5.1 3.4 1.5 0.2 setosa 5.4 3.4 1.5 0.4 setosa 5.2 3.5 1.5 0.2 setosa 5.1 3.7 1.5 0.4 setosa 5.3 3.7 1.5 0.2 setosa 322 5.4 3.7 1.5 0.2 setosa 5.1 3.8 1.5 0.3 setosa 5.2 4.1 1.5 0.1 setosa 5.7 4.4 1.5 0.4 setosa 5 3 1.6 0.2 setosa 4.8 3.1 1.6 0.2 setosa 4.7 3.2 1.6 0.2 setosa 4.8 3.4 1.6 0.2 setosa 5 3.4 1.6 0.4 setosa 5 3.5 1.6 0.6 setosa 5.1 3.8 1.6 0.2 setosa 5.1 3.3 1.7 0.5 setosa 5.4 3.4 1.7 0.2 setosa 5.7 3.8 1.7 0.3 setosa 5.4 3.9 1.7 0.4 setosa 4.8 3.4 1.9 0.2 setosa 5.1 3.8 1.9 0.4 setosa 5.1 2.5 3 1.1 versicolor 5 2.3 3.3 1 versicolor 4.9 2.4 3.3 1 versicolor 5 2 3.5 1 versicolor 5.7 2.6 3.5 1 versicolor 5.6 2.9 3.6 1.3 versicolor 5.5 2.4 3.7 1 versicolor 5.5 2.4 3.8 1.1 versicolor 5.6 2.5 3.9 1.1 versicolor 5.2 2.7 3.9 1.4 versicolor 5.8 2.7 3.9 1.2 versicolor 6 2.2 4 1 versicolor 5.5 2.3 4 1.3 versicolor 5.5 2.5 4 1.3 versicolor 5.8 2.6 4 1.2 versicolor 6.1 2.8 4 1.3 versicolor 5.8 2.7 4.1 1 versicolor 5.7 2.8 4.1 1.3 versicolor 5.6 3 4.1 1.3 versicolor 5.6 2.7 4.2 1.3 versicolor 5.7 2.9 4.2 1.3 versicolor 5.7 3 4.2 1.2 versicolor 5.9 3 4.2 1.5 versicolor 6.2 2.9 4.3 1.3 versicolor 323 6.4 2.9 4.3 1.3 versicolor 6.3 2.3 4.4 1.3 versicolor 5.5 2.6 4.4 1.2 versicolor 6.6 3 4.4 1.4 versicolor 6.7 3.1 4.4 1.4 versicolor 6.2 2.2 4.5 1.5 versicolor 4.9 2.5 4.5 1.7 virginica 5.7 2.8 4.5 1.3 versicolor 6 2.9 4.5 1.5 versicolor 5.4 3 4.5 1.5 versicolor 5.6 3 4.5 1.5 versicolor 6.4 3.2 4.5 1.5 versicolor 6 3.4 4.5 1.6 versicolor 6.5 2.8 4.6 1.5 versicolor 6.6 2.9 4.6 1.3 versicolor 6.1 3 4.6 1.4 versicolor 6.1 2.8 4.7 1.2 versicolor 6.1 2.9 4.7 1.4 versicolor 6.7 3.1 4.7 1.5 versicolor 7 3.2 4.7 1.4 versicolor 6.3 3.3 4.7 1.6 versicolor 6.2 2.8 4.8 1.8 virginica 6.8 2.8 4.8 1.4 versicolor 6 3 4.8 1.8 virginica 5.9 3.2 4.8 1.8 versicolor 6.3 2.5 4.9 1.5 versicolor 6.3 2.7 4.9 1.8 virginica 5.6 2.8 4.9 2 virginica 6.1 3 4.9 1.8 virginica 6.9 3.1 4.9 1.5 versicolor 6 2.2 5 1.5 virginica 5.7 2.5 5 2 virginica 6.3 2.5 5 1.9 virginica 6.7 3 5 1.7 versicolor 5.8 2.7 5.1 1.9 virginica 5.8 2.7 5.1 1.9 virginica 6 2.7 5.1 1.6 versicolor 5.8 2.8 5.1 2.4 virginica 6.3 2.8 5.1 1.5 virginica 5.9 3 5.1 1.8 virginica 6.9 3.1 5.1 2.3 virginica 324 6.5 3.2 5.1 2 virginica 6.5 3 5.2 2 virginica 6.7 3 5.2 2.3 virginica 6.4 2.7 5.3 1.9 virginica 6.4 3.2 5.3 2.3 virginica 6.9 3.1 5.4 2.1 virginica 6.2 3.4 5.4 2.3 virginica 6.5 3 5.5 1.8 virginica 6.8 3 5.5 2.1 virginica 6.4 3.1 5.5 1.8 virginica 6.1 2.6 5.6 1.4 virginica 6.4 2.8 5.6 2.1 virginica 6.4 2.8 5.6 2.2 virginica 6.3 2.9 5.6 1.8 virginica 6.7 3.1 5.6 2.4 virginica 6.3 3.4 5.6 2.4 virginica 6.9 3.2 5.7 2.3 virginica 6.7 3.3 5.7 2.1 virginica 6.7 3.3 5.7 2.5 virginica 6.7 2.5 5.8 1.8 virginica 6.5 3 5.8 2.2 virginica 7.2 3 5.8 1.6 virginica 7.1 3 5.9 2.1 virginica 6.8 3.2 5.9 2.3 virginica 7.2 3.2 6 1.8 virginica 6.3 3.3 6 2.5 virginica 7.4 2.8 6.1 1.9 virginica 7.7 3 6.1 2.3 virginica 7.2 3.6 6.1 2.5 virginica 7.3 2.9 6.3 1.8 virginica 7.9 3.8 6.4 2 virginica 7.6 3 6.6 2.1 virginica 7.7 2.8 6.7 2 virginica 7.7 3.8 6.7 2.2 virginica 7.7 2.6 6.9 2.3 virginica