Simulation and Characterization of an Exact Solvable Chaotic Oscillator
and Matched Filter
by
John Phillip Bailey III
A thesis submitted to the Graduate Faculty of
Auburn University
in partial ful llment of the
requirements for the Degree of
Master of Science
Auburn, Alabama
August 4, 2012
Keywords: chaotic oscillator, matched  lter detection, SPICE
Copyright 2012 by John Phillip Bailey III
Approved by
Michael Hamilton, Chair, Assistant Professor of Electrical and Computer
Engineering
Robert Dean, Associate Professor of Electrical and Computer Engineering
Thaddeus Roppel, Associate Professor of Electrical and Computer Engineering
Abstract
The simulation and characterization of a low frequency exact solvable chaotic
oscillator and a corresponding matched  lter is presented with discussion. The work
builds on an existing design for the oscillator by realizing a version of the oscillator
which performs analogously in both SPICE simulation and hardware for both shift-
band and folded-band operation. Results from simulation and hardware are presented
and compared to verify simulation accuracy.
SPICE simulation of the matched  lter is also presented; its accuracy is veri ed
by comparison to published theoretical behavior. This simulation is used to evaluate
and characterize the frequency requirements of the matched  lter?s input. Use of the
chaotic oscillator/matched  lter pair in communication applications is supported by
the results of this characterization.
ii
Acknowledgments
The author would like to express great appreciation and thanks to Dr. Michael
Hamilton for serving as his advisor and providing signi cant guidance and assistance
throughout the process of performing this work. Dr. Robert Dean and Dr. Thaddeus
Roppel are also thanked for their review and commentary.
Appreciation is expressed to Dr. Ned Corron and Dr. Daniel Hahs for their pre-
sentation on the mathematics behind the oscillator and matched  lter and assistance
with tuning of the oscillator. The author would also like to thank Aubrey Beal for
his assistance in many aspects of this work.
A personal note of appreciation goes to John Bailey Jr. and Dawn Bailey for
their support throughout the author?s academic endeavors.
iii
Table of Contents
Abstract . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ii
Acknowledgments . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . iii
List of Tables . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . vi
List of Figures . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . vii
List of Abbreviations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . x
1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
2 Previously Published Work . . . . . . . . . . . . . . . . . . . . . . . . . 3
2.1 Exact Solvable Chaotic Waveform Generation . . . . . . . . . . . . . 3
2.1.1 Continuous-time/Discrete-time Hybrid . . . . . . . . . . . . . 4
2.1.2 Solution . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
2.1.3 Dynamics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
2.1.4 Control . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
2.2 Matched Filter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
2.3 Chaotic System Realization . . . . . . . . . . . . . . . . . . . . . . . 9
2.3.1 Oscillator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
2.3.2 Matched Filter . . . . . . . . . . . . . . . . . . . . . . . . . . 11
3 Oscillator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
3.1 Implemetation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
3.1.1 Continuous-time Section . . . . . . . . . . . . . . . . . . . . . 12
3.1.2 Discrete-time Section . . . . . . . . . . . . . . . . . . . . . . . 15
3.2 Simulation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
3.2.1 Shift-band Performance . . . . . . . . . . . . . . . . . . . . . 17
3.2.2 Folded-band Performance . . . . . . . . . . . . . . . . . . . . 20
iv
3.3 Hardware . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
3.3.1 Shift-band Performance . . . . . . . . . . . . . . . . . . . . . 25
3.3.2 Folded-band Performance . . . . . . . . . . . . . . . . . . . . 27
4 Matched Filter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
4.1 Implementation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
4.2 Simulation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
4.2.1 Shift-band Performance . . . . . . . . . . . . . . . . . . . . . 32
4.2.2 Folded-band Performance . . . . . . . . . . . . . . . . . . . . 33
4.3 Input Frequency Requirements . . . . . . . . . . . . . . . . . . . . . . 34
4.3.1 Low-pass Filtering . . . . . . . . . . . . . . . . . . . . . . . . 36
4.3.2 High-pass  ltering . . . . . . . . . . . . . . . . . . . . . . . . 38
4.3.3 Band-pass  ltering . . . . . . . . . . . . . . . . . . . . . . . . 40
5 Conclusions and Future Work . . . . . . . . . . . . . . . . . . . . . . . . 45
References . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 47
Appendix A LF Oscillator Parts List, SPICE Netlist, and Schematic . . . . 49
Appendix B LF Matched Filter SPICE Netlist and Schematic . . . . . . . . 58
Appendix C LF Oscillator Tuning Procedure . . . . . . . . . . . . . . . . . 63
v
List of Tables
3.1 Discrete-time Circuit States . . . . . . . . . . . . . . . . . . . . . . . . . 15
A.1 LF Oscillator Parts List . . . . . . . . . . . . . . . . . . . . . . . . . . . 50
vi
List of Figures
2.1 Folded-band (left) and shift-band (right) attractors [1] [2] . . . . . . . . 3
2.2 Illustration of continuous-time and discrete-time states [1] . . . . . . . . 5
2.3 Folded-band Tent Map [1] . . . . . . . . . . . . . . . . . . . . . . . . . . 7
2.4 Published Chaotic Oscillator Schematic [2]. . . . . . . . . . . . . . . . . 10
2.5 Published Chaotic Matched Filter Schematic [2]. . . . . . . . . . . . . . 11
3.1 Continuous-time Section Schematic . . . . . . . . . . . . . . . . . . . . . 12
3.2 NIC Schematic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
3.3 GIC Schematic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
3.4 Discrete-time Section Schematic . . . . . . . . . . . . . . . . . . . . . . . 15
3.5 Logic Behavior . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
3.6 LF Oscillator Simulation Shift-band V and Vs vs. t . . . . . . . . . . . . 18
3.7 LF Oscillator Simulation Shift-band Vd vs. V . . . . . . . . . . . . . . . . 19
3.8 LF Oscillator Simulation Shift-band FFT(V) . . . . . . . . . . . . . . . . 20
3.9 LF Oscillator Simulation Folded-band V and Vs vs. t . . . . . . . . . . . 21
3.10 LF Oscillator Simulation Folded-band Vd vs. V . . . . . . . . . . . . . . 22
vii
3.11 LF Oscillator Simulation Folded-band FFT(V) . . . . . . . . . . . . . . . 23
3.12 LF Chaotic Oscillator Hardware Implementation . . . . . . . . . . . . . 24
3.13 LF Oscillator Hardware Shift-band V and Vs vs. t . . . . . . . . . . . . . 25
3.14 LF Oscillator Hardware Shift-band Vd vs V . . . . . . . . . . . . . . . . . 26
3.15 LF Oscillator Hardware Shift-band FFT(V) . . . . . . . . . . . . . . . . 27
3.16 LF Oscillator Hardware Folded-band V and Vs vs. t . . . . . . . . . . . . 28
3.17 LF Oscillator Hardware Folded-band Vd vs V . . . . . . . . . . . . . . . . 29
3.18 LF Oscillator Hardware Folded-band FFT(V) . . . . . . . . . . . . . . . 30
4.1 LF Matched Filter Shift-band Vout and Vs vs. t . . . . . . . . . . . . . . 32
4.2 Published Oscillator Analytical Solution (top) and Matched Filter Ana-
lytical Solution (bottom) [2] . . . . . . . . . . . . . . . . . . . . . . . . . 33
4.3 LF Matched Filter Folded-band Vout and Vs vs. t . . . . . . . . . . . . . 34
4.4 Low-pass (top), High-pass (middle), and Band-pass (bottom) Filter Fre-
quency Response for fc1=50 Hz and fc2=5 kHz . . . . . . . . . . . . . . . 36
4.5 LF Matched Filter Shift-band Low-pass Filtered Input Performance with
fc=1 MHz (red), fc=5 kHz (green), fc=1 kHz (gold), and fc=500 Hz (purple) 37
4.6 LF Matched Filter Folded-band Low-pass Filtered Input Performance with
fc=1 MHz (red), fc=5 kHz (green), fc=1 kHz (gold), and fc=500 Hz (purple) 38
4.7 LF Matched Filter Shift-band High-pass Filtered Input Performance with
fc=50 Hz (red), fc=100 Hz (green), fc=500 Hz (gold), and fc=1 kHz (purple) 39
viii
4.8 LF Matched Filter Folded-band High-pass Filtered Input Performance
with fc=50 Hz (red), fc=100 Hz (green), fc=500 Hz (gold), and fc=1 kHz
(purple) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40
4.9 LF Matched Filter Shift-band Band-pass Filtered Input Performance . . 41
4.10 LF Matched Filter Folded-band Band-pass Filtered Input Performance . 42
4.11 Discrete-time State Recovery Circuit . . . . . . . . . . . . . . . . . . . . 43
4.12 LF Matched Filter Shift-band Recovered Output . . . . . . . . . . . . . 43
4.13 LF Matched Filter Folded-band Recovered Output . . . . . . . . . . . . 44
A.1 Low Frequency Chaotic Oscillator Schematic . . . . . . . . . . . . . . . . 57
B.1 Low Frequency Matched Filter Schematic . . . . . . . . . . . . . . . . . 62
ix
List of Abbreviations
AC Alternating Current
DC Direct Current
FFT Fast Fourier Transform
GIC Generalized Impedance Converter
LF Low Frequency
NIC Negative Impedance Converter
op-amp Operational Ampli er
PWL Piece Wise Linear
SPICE Simulation Program with Integrated Circuit Emphasis
x
Chapter 1
Introduction
Chaos has been long been regarded as an intriguing topic in the world of academia,
but, traditionally, it has been concluded that its value was, at best, the satisfaction
of academic curiosity. The power of modern computing has allowed chaos to develop
from this relatively irrelevant status into a continuously growing  eld of its own. Re-
cently proposed uses for chaos encompass many areas, including communication [3],
radar [4] and even weather modeling [5].
To understand chaotic systems, it must  rst be understood that for a system to
be considered chaotic, it must exhibit two characteristics:  rst, the system must have
a positive Lyapunov exponent, i.e., trajectories the system visits which are near to
each other must be exponentially divergent in value, and, second, these trajectories
must be bounded in some manner. These characteristics often cause a chaotic system
to appear as if its actions are random, but the utility of chaos comes from the fact
that a chaotic system?s behavior is in fact not random. It must be understood that
this is due to the fact that the behavior of a chaotic system is highly dependent on
its initial condition (the initial condition of a truly random process o ers no insight
into that process?s behavior).
A mathematical description of a chaotic system consisting of a chaotic oscillator
and a matched  lter with potential practical application in both the  elds of commu-
nications and radar is presented in Chapter 2. This thesis expands on the previously
published work by introducing a SPICE simulation that is shown to be accurate when
compared to actual hardware and theoretical results. Separate SPICE models have
1
been developed for the oscillator and matched  lter; each model is thoroughly detailed
through the presentation and analysis of simulation results.
Simulation was performed using LTSpiceIV, a SPICE simulator developed by
Linear Technology. This simulator was chosen due to its ongoing developer support,
its readily approachable schematic entry capabilities, and its continued free avail-
ability at http://www.linear.com/designtools/software/. The resulting netlists
included in this work have also been found to function correctly using Ngspice release
24, which allows for Linux-based simulation. Other SPICE simulators, including the
latest releases of PSPICE and HSPICE, were evaluated but found to be unsuitable
for this work.
Hardware was constructed using standard components to match the oscillator
model developed in SPICE. Characterization of the hardware?s performance operating
in the relevant bands was performed and is discussed. This hardware?s performance
reveals not only that its behavior matches theoretical expectation, but also that its
behavior is closely modeled by the SPICE simulation.
The matched  lter SPICE model was also used to evaluate the suitability of
this chaotic oscillator and matched  lter pair for communication applications. The
output of the oscillator, which is also the input to the matched  lter, was subjected
to low-pass, high-pass, and band-pass  ltering. Results from each of these cases are
presented.
To expand on the results found through the use of band-pass- ltered input, which
is expected to be the input necessary for communication, a simple circuit was added
to the simulation to recover the desired waveform from the matched  lter?s output.
This circuit is detailed and it is demonstrated that the circuit is able to correctly
recover the desired waveform with band-pass- ltered input.
2
Chapter 2
Previously Published Work
2.1 Exact Solvable Chaotic Waveform Generation
Because they are often associated with complex behavior, chaotic systems are
typically assumed to lack exact analytic solutions; this assumption has, however,
been disproven [6] [7] [2]. Building on this work, a di erential equation describing
an exactly solvable chaotic system was recently presented [2]. The chaotic nature of
this system is veri ed by the attractor visited by the system?s resemblance to the
well-known strange attractor  rst described by Lorenz [8]. Figure 2.1 provides an
example of this system?s attractor (right) as well as a folded-band attractor. The
di erences between these attractors will be discussed in Section 2.1.1.
Figure 2.1: Folded-band (left) and shift-band (right) attractors [1] [2]
The trajectories for the bakers map and the shift map of this di erential equation
can be represented by the convolution of an acausal basis function with a random
3
process [9]. Because of this, the di erential equation?s solution can be described as a
linear representation. The matched  lter discussed in this thesis is possible due this
linearity.
2.1.1 Continuous-time/Discrete-time Hybrid
The system described in [2] consists of a continuous-time state u(t) 2< which
provides the necessary exponential divergence and a discrete-time state s(t)2f 1g
which maintains boundedness. This state places the system in the shift-band (see
Figure 2.1). A similar system described in [1] operates in the folded-band due to its
discrete-time state s(t) 2f0;1g. In both systems, the continuous-time di erential
equation is
d2u
dt2  2 
du
dt + (!
2 + 2) (u s) = 0 (2.1)
where ! = 2 for both bands, 0 <   ln 2 for the shift-band, and  > 0 for the
folded-band. The discrete-time state can experience a switching event only when
the derivative of the continuous-time equation is zero - this occurs every 1=2t. This
switching event is governed by
du
dt(t) = 0!s(t) = sgn(u(t)) (2.2)
where
sgn(u) =
8
>><
>>:
 1 u< 0
+1 u 0
(2.3)
when operating in the shift-band and
du
dt(t) = 0!s(t) = H(u(t) 1) (2.4)
4
where
H(u) =
8
>><
>>:
0 u 1
1 u> 1
(2.5)
when operating in the folded-band. Figure 2.2 illustrates the continuous-time state
leading up to, during, and after a switching event in the discrete-time state in folded-
band operation.
Figure 2.2: Illustration of continuous-time and discrete-time states [1]
As the oscillation grows, each relative maximum and minimum triggers the con-
dition in (2.5); for the  rst seven events, however, the magnitude of u(t) is not large
enough to cause a change in s(t). The eighth event sees the magnitude u(t) large
enough to cause a 1=2t duration switch in s(t) that bounds the growth of u(t). Oper-
ation in the shift-band is analogous, with s(t) switching between  1.
2.1.2 Solution
For an initial condition un with dundt = 0, which places the system at a switching
event, an exact solution in the shift-band can be described by the superposition of
5
 xed basis functions given by P(t)
u(t) =
1X
m= 1
 m P(t m) (2.6)
where
P(t) =
8
>>>
>>>
<
>>>
>>>
:
[1 exp (  )] exp ( t) [cos!t  ! sin!t] t< 0
1 exp ( (t 1)) [cos!t  ! sin!t] t = 0
0 t> 0
(2.7)
and  m represents the values of s(t) [2]. For the folded-band, the initial condition
remains the same, but the basis function is described by Q(t), yielding
u(t) =
1X
m=0
 m Q(t tn m2 ) (2.8)
where
Q(t) =
8
>>>
>>>
<
>>>
>>>
:
[1 + exp (  2 )] exp ( t) [cos!t  ! sin!t] t< 0
1 + exp ( (t 12)) [cos!t  ! sin!t] 0 t< 12
0 12  t
(2.9)
and  m again represents the values of s(t) [1].
2.1.3 Dynamics
For the shift band, (2.6) evaluated at tn yields an inverse coding function
un = (1 exp( ))
1X
m=0
 m+n(exp( m )) (2.10)
6
for which a sequence of satisfactory  m2f 1g exists. Analogously, the folded-band
solution (2.8) evaluated at tn yields an inverse coding function
un = (1 + exp(  2 ))
1X
m=0
 m( exp(  2 ))m (2.11)
for which a sequence of satisfactory  m 2f0;1g exists. The utility of this function
comes from its generation of an amplitude sequencef 0; 1;:::; mgdependent on the
un initial condition. By controlling un, it is possible to generate a desired  m sequence
which can then be mapped to symbols. This technique is described in [3] and [10]
where it is also detailed how the adjustment required to generate a symbol decreases
as the distance in the future that the symbol is desired increases. This control has not
yet been implemented, but it is expected that its implementation will use folded-band
operation exclusively; to this end, shift-band control will not be discussed.
A relationship relating the successive un maxima can be derived, thus allowing
u(tn + 1=2) to be expressed in terms of un and sn. From this, the tent map in Figure
2.3 can be constructed.
Figure 2.3: Folded-band Tent Map [1]
7
As shown, three symbols - A, B, and C, - are chosen corresponding to the three
separate regions on the map. The spacing between un values, also known as the
return time, is not uniformly spaced. Previous values of s(t), which occur every 1=2t,
determine which symbol is generated. These are mapped as A!00 B!100 C!10; it
is expected that C will not be used for simpli cation of the receiving system design.
To generate an arbitrary symbol sequence, the required un can be determined with
the inverse coding function by inserting the amplitude sequence corresponding to the
desired symbol sequence. For example, the symbol sequence fB A B B A Ag would
map to the amplitude sequence f100001001000000g, which would then be used for
 m values in the inverse coding function. It is important to note that a practical
implementation of this coding would be restricted by a yet-to-be-developed grammar,
such that only sequences of A and B contained in that grammar could be used.
2.1.4 Control
Due to the need to adjust un, the equation describing continuous-time portion
of the circuit must be modi ed slightly to include a control input h, resulting in
d2u
dt2 [1 (2  GH(u h))] + (!
2 + 2)(u s) = 0 (2.12)
where H is de ned in (2.5) and G2f< 1g[11]. Whenever u>h, charge is rapidly
removed from the system until u < h, at which point the controlling mechanism is
stopped. With this type of control, only small corrections are necessary after initial
transients have settled.
2.2 Matched Filter
Detection of the chaotic waveform can be performed by a simple matched  lter
which has a time-reversed impulse response to that of the waveform to be detected.
8
This is described by the equations
d 
dt = v(t+ 1) v(t) (2.13)
for the shift-band,
d 
dt = v(t+
1
2) v(t) (2.14)
for the folded-band, and
d2 
dt2 + 2 
d 
dt = (!
2 + 2)  (t) (2.15)
where v is the input,  is the output, and  is an intermediate state which is de ned
in Section 2.3.2 [2].
2.3 Chaotic System Realization
Theoretical circuits built from standard components have been developed for
both the chaotic waveform generator and the corresponding matched  lter. While
they are not the exact designs used for the work discussed in this thesis, these circuits
provide the foundation on which this work builds.
2.3.1 Oscillator
The realization of the chaotic waveform generator takes the form of a chaotic
oscillator, whose schematic is shown in Figure 2.4.
9
Figure 2.4: Published Chaotic Oscillator Schematic [2].
Oscillation is realized through the use of a RLC oscillator with negative resistance
(the active circuitry required to realize the -R and L components is discussed in
Chapter 3), which can be modeled by writing the standard RLC di erential equations
Cdvdt vR +i = 0 (2.16)
and
Ldidt = v vs (2.17)
Assuming  = tT yields
T = 2RC!
r L
4R2C L (2.18)
where T represents the oscillator?s return time. (2.16) combined with (2.17) results
in
d2v
d 2  2 
dv
d + (!
2 + 2)(v vs) = 0 (2.19)
where
 = T2RC (2.20)
10
This portion of the circuit provides the necessary exponential divergence and is then
bounded by feedback from the additional circuitry which triggers at each dudt = 0
point.
2.3.2 Matched Filter
The matched  lter is also realized through the use of a RLC circuit with addi-
tional supporting circuitry. Shown in Figure 2.5, its left section implements (2.13)
and (2.14) while its RLC section implements (2.15).
Figure 2.5: Published Chaotic Matched Filter Schematic [2].
The values for the R, L, and C components are the same as those used in the
oscillator, with the distinction that the R value is positive. The value for R is
calculated using
R = T0:1  F (2.21)
where T is de ned in (2.18).  , the intermediate state introduced in (2.13) and (2.14),
can be de ned as
 =  V (t  t)V (2.22)
11
Chapter 3
Oscillator
3.1 Implemetation
As in the published design, the implementation of the chaotic oscillator uses
an RLC oscillator combined with additional circuitry to provide bounding; these
blocks will be referred to as the continuous-time section and the discrete-time section
respectively. To best explain their operation, these blocks are examined separately in
the proceeding sections. A combined schematic can be found in Appendix A.
3.1.1 Continuous-time Section
The function of the continuous-time section, shown in Figure 3.1, continues to
be provision of the exponential divergence necessary for chaos.
Figure 3.1: Continuous-time Section Schematic
12
Because both the negative resistance and large inductance values required for
this implementation are not possible with standard components, active components
are used in their place.
Negative Impedance Converter
A negative resistance is realized through the use of a NIC as shown in Figure
3.2.
Figure 3.2: NIC Schematic
Resistance seen between nodes 1 and 2 is described as
R = R1R3R2 (3.1)
where, for this application, the value of the negative resistance must be adjustable;
this is accomplished by replacing R3 with a 100 k potentiometer [12].
Generalized Impedance Converter
Although a large inductance is physically possible with a passive element, a
GIC is used in this circuit to minimize space requirements. Figure 3.3 shows an
implementation of this element.
13
Figure 3.3: GIC Schematic
Equations 3.2 and 3.3 are used to determine the appropriate values for the passive
elements [13],
Leq = R1R3R4C1R
2
(3.2)
R4 = R2LeqR
1R3C1
(3.3)
where values for R1, R2, R3, R4, and C1 are 3.01 k , 1 k , 3.01 k , 3.01 k , and
0.01  F respectively. This combination yields and e ective inductance of 0.273 H
seen between nodes 1 and 2.
Node V, generated by the RLC oscillator, corresponds to the continuous-time
state u(t). Bounding for V is provided from the discrete-time section in the form
of a voltage at node Vs. The top branch of the continuous-time circuit includes
a di erentiator which provides node Vd, corresponding to dudt. Vd is o set by an
amount adjustable by the top potentiometer so that its zero crossings occur at the
constant voltage supplied to the negative input to the comparator. Appendix C
describes this tuning process in its discussion of tuning the overall circuit. The result
of this comparison becomes node A, which is high when Vd is positive, low when Vd
is negative, and switching states when Vd is zero. The bottom branch compares V
14
to the same constant voltage used in and has the same output behavior as the top
branch. This branch does not need to be tuned as no operations are performed on
its input. Both A and B are shifted to appropriate voltage levels to be processed by
the discrete-time section.
3.1.2 Discrete-time Section
As shown in Figure 3.4, the discrete-time section of the circuit operates on nodes
A and B to produce the discrete-time state s(t), which corresponds to node S.
Figure 3.4: Discrete-time Section Schematic
The behavior of the logic blocks is detailed in Table 3.1:
A B A1 A2 A3 A4 S
L L L L A4 L L
L H L H A4 A3 A3
H L L H A4 A3 A3
H H H H H A3 H
Table 3.1: Discrete-time Circuit States
15
where the values A1, A2, A3, and A4 represent the output levels of their respective
gates.
From this table, it can be shown that S is forced low whenever B is low, and is
forced high after a slight delay (dependent on the characteristics of the logic compo-
nents used) B going high. A acts as a clock to restrict changes in S to 1=2t intervals.
Figure 3.5 demonstrates this behavior.
Figure 3.5: Logic Behavior
S is tuned by the right potentiometer to either be centered at zero (for shift-band
operation) or to vary between zero and a higher voltage (for folded-band operation),
resulting in the output node Vs. This tuning is also discussed in Appendix C.
3.2 Simulation
LTSpiceIV?s schematic entry was used to create a netlist for the oscillator cir-
cuit with guidance from [14]; all data presented in this thesis was generated with the
latest publicly available version of LTSpiceIV as of June 12, 2012. The overarching
goal of this work was to model as closely as possible the behavior of the oscillator
hardware. To assist with this, SPICE models for the TL084 op-amps and the LM339
16
comparators, from [15] and [16], respectively, were used. Exact SPICE models were
not available for the 74HC08 and 74HC32 logic gates, so LTSpiceIV?s included logic
models were used with parameters from [17]. While these gates are able to be op-
erated with a Vcc higher than 5 V, setting the SPICE model?s output to any value
greater than 4.95 V resulted in the simulator failing to converge, so this value was
used in both the simulation and the hardware. The potentiometers used in the os-
cillator hardware were also not able to be directly mapped to SPICE components;
for these, a combination of two resistors (or a single resistor when operating in rheo-
stat mode) were used. Values of the hardware potentiometers were taken and then
re ned through the use of LTSpiceIV?s parameter sweep functionality to determine
 nal values used in the simulation.
Transient analysis was used to calculate results with the command .tran 0 30ms
.5ms .1ms startup uic. The startup and uic parameters are of particular note
due to their necessity for reliable convergence [18] - without these parameters, the
simulation would fail with a singular matrix error. All data in this section was
generated starting at 0.5ms (to avoid displaying the initial transients) with a run time
of 30ms and a minimum step size of 0.1ms. Both this schematic and the resulting
netlist are provided in Appendix A. Evaluation of the simulation?s performance in
both the shift-band and folded-band follows.
3.2.1 Shift-band Performance
Figure 3.6 demonstrates the simulation?s performance when tuned to operate in
the shift-band.
17
Figure 3.6: LF Oscillator Simulation Shift-band V and Vs vs. t
As expected, Vs switches between approximately -1 and 1 V each time V exceeds
the magnitude of the set switching condition (Vd is not plotted for clarity). Operation
in this band is expected to cause the oscillations of V to switch their center between
the high and low levels of Vs each time Vs switches; the presented results verify this
expectation.
The strange attractor, introduced in Figure 2.1, is also recreated in the simulation
by plotting Vd on the Y axis and V on the X axis as shown in Figure 3.7.
18
Figure 3.7: LF Oscillator Simulation Shift-band Vd vs. V
It is readily apparent that the centers of the attractor are correctly located at
the low and high levels of Vs.
For better comparison to its hardware counterpart, LTSpiceIV?s built-in FFT
function is used to display the frequency content of V. Figure 3.8 displays the result
of this transform.
19
Figure 3.8: LF Oscillator Simulation Shift-band FFT(V)
The frequency content approaches even distribution from DC to approximately 2
kHz with its maximum occurring at 754 Hz. From this  gure, it can be seen that this
relatively even distribution allows V to e ectively behave in a manner similar to that
of a spread-spectrum signal without any modulation having been applied; previous
work on spread-spectrum techniques con rms that a chaotic signal inherently behaves
in a spread-spectrum manner [19].
3.2.2 Folded-band Performance
Figure 3.9 demonstrates the simulation?s performance when tuned to operate in
the folded-band.
20
Figure 3.9: LF Oscillator Simulation Folded-band V and Vs vs. t
In this band, Vs also performs as expecting by switching between approximately
0 and 1.8 V. Because the sign of Vs does not change, the oscillation of V is always
centered at the high value of Vs.
The strange attractor for folded-band operation is generated by the plot in Figure
3.10 and correctly has its centers at zero and the high level of Vs.
21
Figure 3.10: LF Oscillator Simulation Folded-band Vd vs. V
The frequency content of V, shown in Figure 3.11, has a higher maximum, 2.19
kHz, than the peak in the shift-band, but still maintains a similar approximately
even frequency distribution from DC to 3 kHz. Because of this frequency content,
the folded-band oscillator also exhibits spread-spectrum behavior.
22
Figure 3.11: LF Oscillator Simulation Folded-band FFT(V)
3.3 Hardware
A hardware version of the chaotic oscillator has been built with a strong emphasis
on matching the circuit described in the simulation. As with the previously published
circuit, standard readily-available components were used and assembly was performed
on a solderless breadboard. A picture of the functional hardware is provided in Figure
3.12, and a full parts list can be found in Appendix A.
23
Figure 3.12: LF Chaotic Oscillator Hardware Implementation
The large potentiometer seen in Figure 3.12 was necessary to allow easy tuning
of Vs; as the band of operation is set largely by this potentiometer?s value,  ne control
was required for proper operation. All measurements were taken on an Agilent DSO-
X 3034A Oscilloscope and power was supplied by an Agilent E3631A Triple Output
DC Power Supply. Using a single power supply eased the process of power cycling the
circuit, which was necessary if potentiometer value adjustment caused the circuit to
become stuck in a non-operational state. Power rails were set to +15 V, -15 V, and
4.95 V, with all elements sharing a common ground, and voltage levels were measured
using Agilent 10:1 probes referenced to the circuit ground. The Y axis and X axis
24
scales used in this section were adjusted between measurements for clarity; for this
reason, the settings used for each measurement are visible.
3.3.1 Shift-band Performance
To stay in line with the simulation focus of this work, hardware performance
discussion is limited to a comparison with simulated results. In shift-band operation,
Figures 3.13, 3.14, and 3.15 verify that the oscillator simulation very closely describes
the actual hardware.
Figure 3.13: LF Oscillator Hardware Shift-band V and Vs vs. t
Vs was measured to be slightly o set towards -1 V, which can be attributed to
the limited precision a orded by the single-turn (but easily adjustable) potentiometer
used in its generation.
25
Figure 3.14: LF Oscillator Hardware Shift-band Vd vs V
The magnitude of the approximate locations of the strange attractor?s centers
are measured to di er by 12.5 mV; as these locations are determined by placing the
oscilloscope cursors manually, this di erence is small enough to reasonably consider
their locations equal.
26
Figure 3.15: LF Oscillator Hardware Shift-band FFT(V)
Using the oscilloscope to calculate FFT(V) results in a peak frequency of 760 Hz -
6 Hz away from the simulated peak of 754 Hz - and a spread-spectrum like frequency
content. From the combination of these results, it can be shown that the shift-band
simulation provides an excellent approximation of the shift-band hardware.
3.3.2 Folded-band Performance
As expected, Figures 3.16, 3.17, and 3.18 demonstrate that the oscillator also
matches the simulation closely in folded-band operation. For this band, hardware
and simulation are found to correspond even more closely than in the shift-band.
27
Figure 3.16: LF Oscillator Hardware Folded-band V and Vs vs. t
When operating in the folded-band, it was possible to match the levels of Vs to
approximately equal those seen in simulation.
28
Figure 3.17: LF Oscillator Hardware Folded-band Vd vs V
As in the shift-band, it is not possible to to get exact locations for the attractor?s
centers, but the best estimates presented in Figure 3.17 show centers that are within
0.005 V of the simulation.
29
Figure 3.18: LF Oscillator Hardware Folded-band FFT(V)
The FFT(V) results continue this close correspondence - the measured peak fre-
quency of the hardware oscillator di ers from that of the simulated oscillator by less
than 10 Hz and again behaves in a manner similar to that of a spread-spectrum mod-
ulated signal. As expected, the folded-band hardware is also approximated closely by
the folded-band simulation. The culmination of these comparisons demonstrates that
the SPICE model simulation can be used to evaluate hardware performance with a
high level of con dence in the validity of the results.
30
Chapter 4
Matched Filter
4.1 Implementation
The matched  lter has been implemented as presented in Figure 2.5 with some
component values changed to re ect their corresponding values in the oscillator im-
plementation. The L component is again realized through the use of a GIC, but as
the R in the  lter requires an adjustable positive value, its realization requires only a
100k potentiometer. Using (2.18) and (2.21) yields a required signal delay of 0.3299
ms and a required R value of 3.299 k .
4.2 Simulation
Schematic entry in LTSpiceIV was again used to generate the matched  lter cir-
cuit?s netlist. Using the TL084 op-amp, however, lead to a simulation which would
not converge; to solve this issue, the LT1001 op-amp was used in its place. For this ap-
plication, the LT1001 acts as a drop-in replacement and it is expected that a hardware
implementation would use either component [20]. The signal delay block was imple-
mented as a behavioral voltage source with the parameter V=delay(V(V),.3299m).
As in the oscillator simulation, the potentiometer required for the R value was imple-
mented as a resistor. Input data was provided from the oscillator simulation through
the use of PWL  les for the V input, which were generated by the oscillator SPICE
model (these were not combined into a single model to ease the debugging process).
As in the oscillator simulations, transient analysis was used with the command .tran
31
0 30ms .5ms .1ms startup uic. A complete schematic and the resulting netlist
can be found in Appendix B.
4.2.1 Shift-band Performance
Figure 4.1 displays the  lter output Vout with Vs from the oscillator simulation
plotted for comparison (Vs is not used by the matched  lter).
Figure 4.1: LF Matched Filter Shift-band Vout and Vs vs. t
It is readily apparent that the matched  lter?s output corresponds closely to
the discrete-time state of the oscillator, albeit with an expected slight time delay.
A published analytical solution is provided in Figure 4.2 for comparison, and veri es
that the matched  lter simulation behaves as expected. The blue waveform represents
V in the top plot and Vout in the bottom plot.
32
Figure 4.2: Published Oscillator Analytical Solution (top) and Matched Filter Ana-
lytical Solution (bottom) [2]
4.2.2 Folded-band Performance
Folded-band operation of the matched  lter, shown in Figure 4.3, also closely
corresponds to the discrete-time state of the oscillator operating in the folded-band.
No analytical solution was available for comparison for folded-band operation, but,
based on the results of shift-band operation, it is expected that the matched  lter
simulation behaves correctly in the folded-band as well.
33
Figure 4.3: LF Matched Filter Folded-band Vout and Vs vs. t
4.3 Input Frequency Requirements
Because the simulation has been veri ed to match expectations, and to better
evaluate its suitability for communication applications, the frequency requirements
for the input signal V have also been explored. Low-pass, high-pass, and band-pass
 ltering of V has been performed and will be presented in this section.
The second order transfer functions for a low-pass  lter, a high-pass  lter, and
a band-pass  lter, all with unity gain [21], were used to  lter V. These are given as:
H(s) = 11 + s
Q!c + (
s
!c )
2 (4.1)
for low-pass and
H(s) = (
s
!c )
2
1 + sQ!c + ( s!c )2 (4.2)
for high-pass where Q = 1p2, and
H(s) =
s
Q!0
1 + sQ!0 + ( s!0 )2 (4.3)
34
for band-pass where
Q =
r!
c1
!c2 (4.4)
and
!0 =p!c1!c2 (4.5)
These were implemented by passing the parameters:
;low-pass
V=V(V) laplace=(1)/(1+s/({Q}*{w})+(s/{w})^2)
;high-pass
V=V(V) laplace=((s/{w})^2)/(1+s/({Q}*{w})+(s/{w})^2)
;band-pass
V=V(V) laplace=(s/({Q}*{w}))/(1+s/({Q}*{w})+(s/{w})^2)
to a behavioral voltage source. This implementation requires that the transfer func-
tion be de ned for all inputs; as a result, the  gures in this section do not contain
results with an ! of 0 or1. The frequency response of each of these components has
been evaluated and is presented in Figure 4.4 for the low-pass  lter, high-pass  lter,
and band-pass  lter. 50 Hz was used as fc1 (fc for the high-pass  lter) and 5 kHz was
used as fc2 (fc for the low-pass  lter).
35
Figure 4.4: Low-pass (top), High-pass (middle), and Band-pass (bottom) Filter Fre-
quency Response for fc1=50 Hz and fc2=5 kHz
Frequency response was calculated using LTSpiceIV?s AC analysis with the com-
mand .ac dec 10 30 8k.
4.3.1 Low-pass Filtering
The e ects of low-pass  ltering, shown in Figure 4.5 for the shift-band reveals
that the input signal from the oscillator does not require signi cant high frequency
components for proper matched  lter operation.
36
Figure 4.5: LF Matched Filter Shift-band Low-pass Filtered Input Performance with
fc=1 MHz (red), fc=5 kHz (green), fc=1 kHz (gold), and fc=500 Hz (purple)
At a fc of 5 kHz, Vout is approximately equal to Vout with no  ltering applied,
but  ltering below 5 kHz causes Vout to become distorted in a manner that renders
the original Vs unrecoverable. Figure 4.6 shows that the folded-band is also tolerant
of high frequency  ltering.
37
Figure 4.6: LF Matched Filter Folded-band Low-pass Filtered Input Performance
with fc=1 MHz (red), fc=5 kHz (green), fc=1 kHz (gold), and fc=500 Hz (purple)
For both bands, a fc of 5 kHz produces a Vout which is indiscernible from the
un ltered Vout, but  ltering frequency components below 5 kHz, however, irrecover-
ably distorts Vout. This distortion arises from the smoothing of the sharp changes in
Vout, caused by removal of high-frequency components, preventing the matched  lter
from varying its output rapidly enough to recreate Vs. Using the assumption that
the peak frequencies calculated in Sections 3.2.1 and 3.2.2 are the fundamental fre-
quencies (f0) for V, these observations show that operation in the shift-band requires
signi cantly more bandwidth (fc was found to be approximately 5 f0) above the fun-
damental frequency than operation in the folded-band (where fc was approximately
2 f0).
4.3.2 High-pass  ltering
Despite its relative insensitivity to low-pass  ltering, the matched  lter shows
a high sensitivity to high-pass  ltering. Figure 4.7 demonstrates this  nding for the
shift-band.
38
Figure 4.7: LF Matched Filter Shift-band High-pass Filtered Input Performance with
fc=50 Hz (red), fc=100 Hz (green), fc=500 Hz (gold), and fc=1 kHz (purple)
Even with fc at 100 Hz, distortion begins to occur in Vout; an fc of 500 Hz renders
Vout unrecoverable due to the waveform drifting towards 0 V whenever Vs remains
in the same state for more than 1=2t. Figure 4.8 demonstrates a similar  nding for
the folded-band.
39
Figure 4.8: LF Matched Filter Folded-band High-pass Filtered Input Performance
with fc=50 Hz (red), fc=100 Hz (green), fc=500 Hz (gold), and fc=1 kHz (purple)
From these  gures, it can be seen that high-pass  ltering above 100 Hz renders
the matched  lter?s output unusable in either band of operation. In addition, high-
pass  ltering the input while operating in the folded-band causes Vout to shift in
o set below 0 V. While these results show a need for leaving the vast majority of the
low frequency components in place, it is notable that they demonstrate Vout does
not require a DC component for proper operation.
4.3.3 Band-pass  ltering
To provide the most relevant performance evaluation for communications, the
results from low-pass  ltering high-pass  ltering must be combined to provide a range
to be used in constructing a band-pass  lter. By con ning V to a  nite bandwidth
with no DC component, it would then be possible to perform modulation such that
transmission and reception with reasonably-sized antennas could be realized. Figures
4.9 and 4.10 show the matched  lter?s performance for an fc1 of 50 Hz and an fc2 of
5 kHz.
40
Figure 4.9: LF Matched Filter Shift-band Band-pass Filtered Input Performance
Although some distortion is present in Vout, it remains a close enough approxi-
mation to be recoverable.
41
Figure 4.10: LF Matched Filter Folded-band Band-pass Filtered Input Performance
Restricting V to 50-5000 Hz results in a Vout that proves usable in the folded-
band as well. The shift in o set voltage seen in high-pass  ltering the folded-band
input is also present with band-pass  ltered input.
To verify that the discrete-time state of the oscillator can be accurately recov-
ered from Vout, a LT1018 comparator is used to generate the recovered state Srec.
Because the exact o set of Vout can vary, a 100k potentiometer is used to provide an
adjustable comparison input which is set to match this o set. Figure 4.11 provides a
schematic for this circuit.
42
Figure 4.11: Discrete-time State Recovery Circuit
With this circuit placed at node Vout of the matched  lter, a second output Srec
is generated. This output, which is shown in Figures 4.12 and 4.13, exactly represents
the discrete-time state of the oscillator (discounting the time delay introduced by the
matched  lter - this delay is expected from the original published design [2]).
Figure 4.12: LF Matched Filter Shift-band Recovered Output
43
Because of the use of 0 V and 5 V as the negative and positive references for the
comparator, the recovered output shifts between these levels rather than a positive
and negative voltage of the same magnitude. Adjusting the reference voltages to the
desired levels could more exactly recreate the shift-band Vs if required.
Figure 4.13: LF Matched Filter Folded-band Recovered Output
These results provide the conclusion that the entire communication chain, from
generation with the oscillator to detection and recovery with the matched  lter, can
be successfully and accurately simulated with the developed SPICE model for both
shift-band and folded-band operation.
44
Chapter 5
Conclusions and Future Work
Although commonly mistaken to be too di cult to  nd use in actual applications,
recent work in the  eld of chaos has proven that it can, in fact, act as a powerful
tool in multiple real-world scenarios. Fields such as radar and secure communica-
tions could potentially bene t greatly from the use of chaos. An overview of the
previously published mathematics behind an exact solvable chaotic oscillator and a
corresponding matched  lter demonstrating this potential utility has been provided.
While previous work on this subject has used both analytical solutions and phys-
ical hardware as implementations of the mathematics, this thesis has added SPICE
simulation using freely available tools as a method for exploring the nature of these
solvable chaotic systems. Explanation of the SPICE implementation has been pro-
vided to assist with any future work in the area, and the accuracy of this simulation
has been shown to be high when compared to an identical hardware implementation.
Building on this simulation capability, the previously strictly theoretical matched
 lter has been demonstrated as functional in simulation. An evaluation of its per-
formance has been detailed and found to match published expected results. The
completion of an accurate SPICE implementation has also enabled the input fre-
quency requirements of this matched  lter to be characterized. It has been found
that, at LF operation, the matched  lter?s input can be bandwidth-restricted to a
range suitable for communication applications.
Continuation of this work can proceed in a number of areas. Perhaps most
importantly, a functional simulation provides a means for rapidly determining which
coding sequences are practical for inclusion in a grammar for use with this system.
45
Compilation of this data will allow the system to move out of the realm of theory and
into real application.
In addition, simulation capabilities will also allow design of an oscillator/matched
 lter pair operating at higher frequencies - this work has already begun as described
in [11]. By possessing the ability to  nd and solve many potential problems before any
actual hardware is assembled, the likelihood that the  nal hardware will be functional
will be greatly increased.
Finally, the tolerances of all components used in the hardware design can be
thoroughly characterized in simulation. As it is impossible to avoid slight variances
between individual hardware components, examining the e ects of these tolerances
will be essential to developing a  nal design. For components where temperature
data is available, simulation will also allow exploration of temperature e ects, further
enhancing the overall tolerance characterization.
46
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N. Corron, \Design and simulation of a high frequency exact solvable chaotic
oscillator."
[12] R. C. Jaeger and T. N. Blalock, Microelectronic Circuit Design, S. W. Director,
Ed. McGraw-Hill, 2008.
47
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Press, 1997.
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2002. [Online]. Available: http://www.ti.com/product/tl084#simulationmodels
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[17] 74HC08; 74HCT08 Quad 2-input AND gate, 74HC HCT08.pdf, Philips Semi-
conductors, Jul. 2003. [Online]. Available: http://www.nxp.com/documents/
data sheet/
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48
Appendix A
LF Oscillator Parts List, SPICE Netlist, and Schematic
Schematic Description Manuf. Part Number
A1 74HC08 quad 2-input AND gate NXP 74HC08N
A2 74HC32 quad 2-input OR gate NXP 74HC32N
A3 74HC32 quad 2-input OR gate NXP 74HC32N
A4 74HC08 quad 2-input AND gate NXP 74HC08N
C1 .01  F capacitor TDK FK28C0G1H102J
C2 .01  F capacitor TDK FK28C0G1H102J
R1 221  resistor Vishay MRS25000C2210FRP00
R2 221  resistor Vishay MRS25000C2210FRP00
R3 100 k potentiometer Murata PV36W104C01B00
R4 3.01 k resistor Stackpole RNF14FTD3K01
R5 1 k resistor Stackpole RNF14FTD1K00
R6 3.01 k resistor Stackpole RNF14FTD3K01
R7 3.01 k resistor Stackpole RNF14FTD3K01
R8 30.1 k resistor Stackpole RNF14FTD30K1
R9 10 k resistor Vishay MRS25000C1002FRP00
R10 15 k resistor Vishay MRS25000C1502FRP00
R11 10 k resistor Vishay MRS25000C1002FRP00
R12 10 k resistor Vishay MRS25000C1002FRP00
R13 15 k resistor Vishay MRS25000C1502FRP00
R14 10 k resistor Vishay MRS25000C1002FRP00
R15 10 k resistor Vishay MRS25000C1002FRP00
R16 10 k resistor Vishay MRS25000C1002FRP00
49
R18 10 k resistor Vishay MRS25000C1002FRP00
R19 10 k resistor Vishay MRS25000C1002FRP00
R20 30.1 k resistor Stackpole RNF14FTD30K1
R21 10 k resistor Vishay MRS25000C1002FRP00
R22 10 k resistor Vishay MRS25000C1002FRP00
R23+R30 100 k potentiometer Murata PV36W104C01B00
R24 14 k resistor Vishay MRS25000C1402FRP00
R25 11.3 k resistor Vishay MRS25000C1132FRP00
R26+R27 100 k potentiometer Murata PV36W104C01B00
R28 100 k resistor Vishay MRS25000C1003FRP00
R29 100 k resistor Vishay MRS25000C1003FRP00
U1 LM339 low power quad comparator TI LM339AN
U2 LM339 low power quad comparator TI LM339AN
U4 TL084 JFET-input op-amp TI TL084CN
U5 TL084 JFET-input op-amp TI TL084CN
U6 TL084 JFET-input op-amp TI TL084CN
U7 TL084 JFET-input op-amp TI TL084CN
U8 TL084 JFET-input op-amp TI TL084CN
U9 TL084 JFET-input op-amp TI TL084CN
Table A.1: LF Oscillator Parts List
50
SPICE models for the TL084 and LM339 components are available from [15] and [16],
respectively. These models were used to generate this netlist.
1 r1 v n005 221
2 r2 n011 n005 221
3 r3 n011 0 25.33k
4 r4 n016 v 3.01k
5 r5 n016 n018 1k
6 r6 n018 n017 3.01k
7 r7 vs_1 n019 3.01k
8 c1 n019 n017 .01u
9 v1 -15 0 -15
10 v3 +15 0 15
11 r11 n006 vd 10k
12 v2 +5 0 5
13 r8 n015 c2_i 30k
14 r20 vd c1_i 30k
15 r9 +5 c1_i 10k
16 r10 c1_i 0 15k
17 r12 +5 c2_i 10k
18 r13 c2_i 0 15k
19 r14 +5 c2_o 10k
20 r15 +5 n007 10k
21 r16 0 n004 10k
22 r18 +5 n004 10k
23 r19 0 n014 10k
24 r21 +5 n014 10k
25 r22 n009 n010 10k
26 r23 vs n003 62.711k
27 r24 n003 +15 14k
28 r25 -15 n010 11k
29 r26 n001 c1_i 25.572k
30 r27 c1_i n002 68.353k
31 r28 n001 +15 100k
32 r29 -15 n002 100k
33 r30 n010 vs 31.309k
34 c2 n006 v .01u
35 a1 n007 c2_o 0 0 0 0 n008 0 and vhigh=4.95v
36 a2 0 0 0 n007 c2_o 0 n013 0 or vhigh=4.95v
37 a3 0 n008 0 0 n012 0 n009 0 or vhigh=4.95v
38 a4 n009 n013 0 0 0 0 n012 0 and vhigh=4.95v
39 c:u6:1 u6:11 u6:12 3.498e-12
40 c:u6:2 u6:6 u6:7 15.00e-12
41 d:u6:c vd u6:53 u6:dx
42 d:u6:e u6:54 vd u6:dx
43 d:u6:lp u6:90 u6:91 u6:dx
44 d:u6:ln u6:92 u6:90 u6:dx
51
45 d:u6:p -15 +15 u6:dx
46 b:u6:xegnd u6:99 0 v=.5*v(+15)+.5*v(-15)
47 b:u6:xfb u6:7 u6:99 i=4.715e6*i(v:u6:b)+-5e6*i(v:u6:c)+5e6*i(v:
+u6:e)+5e6*i(v:u6:lp)+-5e6*i(v:u6:ln)
48 g:u6:a u6:6 0 u6:11 u6:12 282.8e-6
49 g:u6:cm 0 u6:6 u6:10 u6:99 8.942e-9
50 i:u6:ss +15 u6:10 dc 195.0e-6
51 h:u6:lim u6:90 0 v:u6:lim 1k
52 j:u6:1 u6:11 n006 u6:10 u6:jx
53 j:u6:2 u6:12 0 u6:10 u6:jx
54 r:u6:2 u6:6 u6:9 100.0e3
55 r:u6:d1 -15 u6:11 3.536e3
56 r:u6:d2 -15 u6:12 3.536e3
57 r:u6:o1 u6:8 vd 150
58 r:u6:o2 u6:7 u6:99 150
59 r:u6:p +15 -15 2.143e3
60 r:u6:ss u6:10 u6:99 1.026e6
61 v:u6:b u6:9 0 dc 0
62 v:u6:c +15 u6:53 dc 2.200
63 v:u6:e u6:54 -15 dc 2.200
64 v:u6:lim u6:7 u6:8 dc 0
65 v:u6:lp u6:91 0 dc 25
66 v:u6:ln 0 u6:92 dc 25
67 f:u1:1 u1:9 +5 v:u1:1 1
68 i:u1:ee +5 u1:7 dc 100.0e-6
69 v:u1:i1 u1:21 c1_i dc .75
70 v:u1:i2 u1:22 n004 dc .75
71 q:u1:1 u1:9 u1:21 u1:7 u1:qin
72 q:u1:2 u1:8 u1:22 u1:7 u1:qin
73 q:u1:3 u1:9 u1:8 0 u1:qmo
74 q:u1:4 u1:8 u1:8 0 u1:qmi
75 e:u1:1 u1:10 0 u1:9 0 1
76 v:u1:1 u1:10 u1:11 dc 0
77 q:u1:5 n007 u1:11 0 u1:qoc
78 d:u1:p 0 +5 u1:dx
79 r:u1:p +5 0 46.3e3
80 f:u2:1 u2:9 +5 v:u2:1 1
81 i:u2:ee +5 u2:7 dc 100.0e-6
82 v:u2:i1 u2:21 c2_i dc .75
83 v:u2:i2 u2:22 n014 dc .75
84 q:u2:1 u2:9 u2:21 u2:7 u2:qin
85 q:u2:2 u2:8 u2:22 u2:7 u2:qin
86 q:u2:3 u2:9 u2:8 0 u2:qmo
87 q:u2:4 u2:8 u2:8 0 u2:qmi
88 e:u2:1 u2:10 0 u2:9 0 1
89 v:u2:1 u2:10 u2:11 dc 0
90 q:u2:5 c2_o u2:11 0 u2:qoc
52
91 d:u2:p 0 +5 u2:dx
92 r:u2:p +5 0 46.3e3
93 c:u4:1 u4:11 u4:12 3.498e-12
94 c:u4:2 u4:6 u4:7 15.00e-12
95 d:u4:c n015 u4:53 u4:dx
96 d:u4:e u4:54 n015 u4:dx
97 d:u4:lp u4:90 u4:91 u4:dx
98 d:u4:ln u4:92 u4:90 u4:dx
99 d:u4:p -15 +15 u4:dx
100 b:u4:xegnd u4:99 0 v=.5*v(+15)+.5*v(-15)
101 b:u4:xfb u4:7 u4:99 i=4.715e6*i(v:u4:b)+-5e6*i(v:u4:c)+5e6*i(v:
+u4:e)+5e6*i(v:u4:lp)+-5e6*i(v:u4:ln)
102 g:u4:a u4:6 0 u4:11 u4:12 282.8e-6
103 g:u4:cm 0 u4:6 u4:10 u4:99 8.942e-9
104 i:u4:ss +15 u4:10 dc 195.0e-6
105 h:u4:lim u4:90 0 v:u4:lim 1k
106 j:u4:1 u4:11 n015 u4:10 u4:jx
107 j:u4:2 u4:12 v u4:10 u4:jx
108 r:u4:2 u4:6 u4:9 100.0e3
109 r:u4:d1 -15 u4:11 3.536e3
110 r:u4:d2 -15 u4:12 3.536e3
111 r:u4:o1 u4:8 n015 150
112 r:u4:o2 u4:7 u4:99 150
113 r:u4:p +15 -15 2.143e3
114 r:u4:ss u4:10 u4:99 1.026e6
115 v:u4:b u4:9 0 dc 0
116 v:u4:c +15 u4:53 dc 2.200
117 v:u4:e u4:54 -15 dc 2.200
118 v:u4:lim u4:7 u4:8 dc 0
119 v:u4:lp u4:91 0 dc 25
120 v:u4:ln 0 u4:92 dc 25
121 c:u5:1 u5:11 u5:12 3.498e-12
122 c:u5:2 u5:6 u5:7 15.00e-12
123 d:u5:c n005 u5:53 u5:dx
124 d:u5:e u5:54 n005 u5:dx
125 d:u5:lp u5:90 u5:91 u5:dx
126 d:u5:ln u5:92 u5:90 u5:dx
127 d:u5:p -15 +15 u5:dx
128 b:u5:xegnd u5:99 0 v=.5*v(+15)+.5*v(-15)
129 b:u5:xfb u5:7 u5:99 i=4.715e6*i(v:u5:b)+-5e6*i(v:u5:c)+5e6*i(v:
+u5:e)+5e6*i(v:u5:lp)+-5e6*i(v:u5:ln)
130 g:u5:a u5:6 0 u5:11 u5:12 282.8e-6
131 g:u5:cm 0 u5:6 u5:10 u5:99 8.942e-9
132 i:u5:ss +15 u5:10 dc 195.0e-6
133 h:u5:lim u5:90 0 v:u5:lim 1k
134 j:u5:1 u5:11 n011 u5:10 u5:jx
135 j:u5:2 u5:12 v u5:10 u5:jx
53
136 r:u5:2 u5:6 u5:9 100.0e3
137 r:u5:d1 -15 u5:11 3.536e3
138 r:u5:d2 -15 u5:12 3.536e3
139 r:u5:o1 u5:8 n005 150
140 r:u5:o2 u5:7 u5:99 150
141 r:u5:p +15 -15 2.143e3
142 r:u5:ss u5:10 u5:99 1.026e6
143 v:u5:b u5:9 0 dc 0
144 v:u5:c +15 u5:53 dc 2.200
145 v:u5:e u5:54 -15 dc 2.200
146 v:u5:lim u5:7 u5:8 dc 0
147 v:u5:lp u5:91 0 dc 25
148 v:u5:ln 0 u5:92 dc 25
149 c:u7:1 u7:11 u7:12 3.498e-12
150 c:u7:2 u7:6 u7:7 15.00e-12
151 d:u7:c vs_1 u7:53 u7:dx
152 d:u7:e u7:54 vs_1 u7:dx
153 d:u7:lp u7:90 u7:91 u7:dx
154 d:u7:ln u7:92 u7:90 u7:dx
155 d:u7:p -15 +15 u7:dx
156 b:u7:xegnd u7:99 0 v=.5*v(+15)+.5*v(-15)
157 b:u7:xfb u7:7 u7:99 i=4.715e6*i(v:u7:b)+-5e6*i(v:u7:c)+5e6*i(v:
+u7:e)+5e6*i(v:u7:lp)+-5e6*i(v:u7:ln)
158 g:u7:a u7:6 0 u7:11 u7:12 282.8e-6
159 g:u7:cm 0 u7:6 u7:10 u7:99 8.942e-9
160 i:u7:ss +15 u7:10 dc 195.0e-6
161 h:u7:lim u7:90 0 v:u7:lim 1k
162 j:u7:1 u7:11 vs_1 u7:10 u7:jx
163 j:u7:2 u7:12 vs u7:10 u7:jx
164 r:u7:2 u7:6 u7:9 100.0e3
165 r:u7:d1 -15 u7:11 3.536e3
166 r:u7:d2 -15 u7:12 3.536e3
167 r:u7:o1 u7:8 vs_1 150
168 r:u7:o2 u7:7 u7:99 150
169 r:u7:p +15 -15 2.143e3
170 r:u7:ss u7:10 u7:99 1.026e6
171 v:u7:b u7:9 0 dc 0
172 v:u7:c +15 u7:53 dc 2.200
173 v:u7:e u7:54 -15 dc 2.200
174 v:u7:lim u7:7 u7:8 dc 0
175 v:u7:lp u7:91 0 dc 25
176 v:u7:ln 0 u7:92 dc 25
177 c:u8:1 u8:11 u8:12 3.498e-12
178 c:u8:2 u8:6 u8:7 15.00e-12
179 d:u8:c n017 u8:53 u8:dx
180 d:u8:e u8:54 n017 u8:dx
181 d:u8:lp u8:90 u8:91 u8:dx
54
182 d:u8:ln u8:92 u8:90 u8:dx
183 d:u8:p -15 +15 u8:dx
184 b:u8:xegnd u8:99 0 v=.5*v(+15)+.5*v(-15)
185 b:u8:xfb u8:7 u8:99 i=4.715e6*i(v:u8:b)+-5e6*i(v:u8:c)+5e6*i(v:
+u8:e)+5e6*i(v:u8:lp)+-5e6*i(v:u8:ln)
186 g:u8:a u8:6 0 u8:11 u8:12 282.8e-6
187 g:u8:cm 0 u8:6 u8:10 u8:99 8.942e-9
188 i:u8:ss +15 u8:10 dc 195.0e-6
189 h:u8:lim u8:90 0 v:u8:lim 1k
190 j:u8:1 u8:11 n018 u8:10 u8:jx
191 j:u8:2 u8:12 v u8:10 u8:jx
192 r:u8:2 u8:6 u8:9 100.0e3
193 r:u8:d1 -15 u8:11 3.536e3
194 r:u8:d2 -15 u8:12 3.536e3
195 r:u8:o1 u8:8 n017 150
196 r:u8:o2 u8:7 u8:99 150
197 r:u8:p +15 -15 2.143e3
198 r:u8:ss u8:10 u8:99 1.026e6
199 v:u8:b u8:9 0 dc 0
200 v:u8:c +15 u8:53 dc 2.200
201 v:u8:e u8:54 -15 dc 2.200
202 v:u8:lim u8:7 u8:8 dc 0
203 v:u8:lp u8:91 0 dc 25
204 v:u8:ln 0 u8:92 dc 25
205 c:u9:1 u9:11 u9:12 3.498e-12
206 c:u9:2 u9:6 u9:7 15.00e-12
207 d:u9:c n016 u9:53 u9:dx
208 d:u9:e u9:54 n016 u9:dx
209 d:u9:lp u9:90 u9:91 u9:dx
210 d:u9:ln u9:92 u9:90 u9:dx
211 d:u9:p -15 +15 u9:dx
212 b:u9:xegnd u9:99 0 v=.5*v(+15)+.5*v(-15)
213 b:u9:xfb u9:7 u9:99 i=4.715e6*i(v:u9:b)+-5e6*i(v:u9:c)+5e6*i(v:
+u9:e)+5e6*i(v:u9:lp)+-5e6*i(v:u9:ln)
214 g:u9:a u9:6 0 u9:11 u9:12 282.8e-6
215 g:u9:cm 0 u9:6 u9:10 u9:99 8.942e-9
216 i:u9:ss +15 u9:10 dc 195.0e-6
217 h:u9:lim u9:90 0 v:u9:lim 1k
218 j:u9:1 u9:11 n018 u9:10 u9:jx
219 j:u9:2 u9:12 n019 u9:10 u9:jx
220 r:u9:2 u9:6 u9:9 100.0e3
221 r:u9:d1 -15 u9:11 3.536e3
222 r:u9:d2 -15 u9:12 3.536e3
223 r:u9:o1 u9:8 n016 150
224 r:u9:o2 u9:7 u9:99 150
225 r:u9:p +15 -15 2.143e3
226 r:u9:ss u9:10 u9:99 1.026e6
55
227 v:u9:b u9:9 0 dc 0
228 v:u9:c +15 u9:53 dc 2.200
229 v:u9:e u9:54 -15 dc 2.200
230 v:u9:lim u9:7 u9:8 dc 0
231 v:u9:lp u9:91 0 dc 25
232 v:u9:ln 0 u9:92 dc 25
233 .model u9:jx pjf(is=15.00e-12 beta=270.1e-6 vto=-1)
234 .model u9:dx d(is=800.0e-18)
235 .model u8:jx pjf(is=15.00e-12 beta=270.1e-6 vto=-1)
236 .model u8:dx d(is=800.0e-18)
237 .model u7:jx pjf(is=15.00e-12 beta=270.1e-6 vto=-1)
238 .model u7:dx d(is=800.0e-18)
239 .model u5:jx pjf(is=15.00e-12 beta=270.1e-6 vto=-1)
240 .model u5:dx d(is=800.0e-18)
241 .model u4:jx pjf(is=15.00e-12 beta=270.1e-6 vto=-1)
242 .model u4:dx d(is=800.0e-18)
243 .model u2:dx d(is=800.0e-18)
244 .model u2:qoc npn(is=800.0e-18 bf=20.29e3 cjc=1e-15 tf=942.6e
+-12 tr=543.8e-9)
245 .model u2:qmo npn(is=800.0e-18 bf=1000 cjc=1e-15 tr=807.4e-9)
246 .model u2:qmi npn(is=800.0e-18 bf=1002)
247 .model u2:qin pnp(is=800.0e-18 bf=2.000e3)
248 .model u1:dx d(is=800.0e-18)
249 .model u1:qoc npn(is=800.0e-18 bf=20.29e3 cjc=1e-15 tf=942.6e
+-12 tr=543.8e-9)
250 .model u1:qmo npn(is=800.0e-18 bf=1000 cjc=1e-15 tr=807.4e-9)
251 .model u1:qmi npn(is=800.0e-18 bf=1002)
252 .model u1:qin pnp(is=800.0e-18 bf=2.000e3)
253 .model u6:jx pjf(is=15.00e-12 beta=270.1e-6 vto=-1)
254 .model u6:dx d(is=800.0e-18)
255 .tran 0 31ms .5ms .1ms startup uic
256 .end
56
Figure A.1: Low Frequency Chaotic Oscillator Schematic
57
Appendix B
LF Matched Filter SPICE Netlist and Schematic
1 r1 n004 n007 3299
2 r2 n009 vdelay 1k
3 r3 n006 v 1k
4 r4 0 n009 1k
5 r5 n006 n007 1k
6 c1 n005 n004 .1u
7 r6 n008 n005 3.01k
8 r7 vout n001 3.01k
9 r8 vout n003 1k
10 r9 n003 n002 3.01k
11 c2 n008 n002 .01u
12 r10 vout 0 25.33k
13 c3 vout 0 .01u
14 b1 vdelay 0 v=delay(v(v),.3299m)
15 r11 n005 n004 10meg
16 a:u1:1 0 u1:n004 0 0 0 0 u1:x 0 ota g=150u iout=7u cout=28p en
+=9.8n enk=4 vhigh=1e308 vlow=-1e308
17 a:u1:2 n006 n009 0 0 0 0 0 0 ota g=0 in=.1p ink=70
18 c:u1:2 u1:n004 0 .75p rpar=100k noiseless
19 r:u1:1 +15 u1:x 10g noiseless
20 r:u1:2 u1:x -15 10g noiseless
21 m:u1:1 +15 u1:n005 n007 n007 u1:n temp=27
22 m:u1:2 -15 u1:n005 n007 n007 u1:p temp=27
23 d:u1:1 n007 u1:x u1:x
24 c:u1:3 u1:n005 0 .075p rpar=1meg noiseless
25 d:u1:4 n006 n009 u1:di
26 c:u1:5 n006 n009 1p rpar=80meg
27 c:u1:7 +15 n007 .2p
28 c:u1:8 n007 -15 .2p
29 b:u1:1 0 u1:n004 i=10u*dnlim(uplim(v(n009),v(+15) -.9,.3), v
+(-15)+.9, .3)+1n*v(n009)
30 b:u1:2 u1:n004 0 i=10u*dnlim(uplim(v(n006),v(+15) -.899,.3), v
+(-15)+.899, .3)+1n*v(n006)
31 b:u1:3 0 u1:n005 i=1u*dnlim(uplim(v(u1:x),v(+15) -.9,.5), v
+(-15)+.9,.5)+1p*v(u1:x)
32 c:u1:9 +15 n009 .5p rpar=1.12t noiseless
33 c:u1:4 n009 -15 .5p rpar=1.12t noiseless
34 c:u1:6 n006 -15 .5p rpar=1.12t noiseless
35 c:u1:10 +15 n006 .5p rpar=1.12t noiseless
58
36 a:u2:1 0 u2:n004 0 0 0 0 u2:x 0 ota g=150u iout=7u cout=28p en
+=9.8n enk=4 vhigh=1e308 vlow=-1e308
37 a:u2:2 n004 0 0 0 0 0 0 0 ota g=0 in=.1p ink=70
38 c:u2:2 u2:n004 0 .75p rpar=100k noiseless
39 r:u2:1 +15 u2:x 10g noiseless
40 r:u2:2 u2:x -15 10g noiseless
41 m:u2:1 +15 u2:n005 n005 n005 u2:n temp=27
42 m:u2:2 -15 u2:n005 n005 n005 u2:p temp=27
43 d:u2:1 n005 u2:x u2:x
44 c:u2:3 u2:n005 0 .075p rpar=1meg noiseless
45 d:u2:4 n004 0 u2:di
46 c:u2:5 n004 0 1p rpar=80meg
47 c:u2:7 +15 n005 .2p
48 c:u2:8 n005 -15 .2p
49 b:u2:1 0 u2:n004 i=10u*dnlim(uplim(v(0),v(+15) -.9,.3), v(-15)
++.9, .3)+1n*v(0)
50 b:u2:2 u2:n004 0 i=10u*dnlim(uplim(v(n004),v(+15) -.899,.3), v
+(-15)+.899, .3)+1n*v(n004)
51 b:u2:3 0 u2:n005 i=1u*dnlim(uplim(v(u2:x),v(+15) -.9,.5), v
+(-15)+.9,.5)+1p*v(u2:x)
52 c:u2:9 +15 0 .5p rpar=1.12t noiseless
53 c:u2:4 0 -15 .5p rpar=1.12t noiseless
54 c:u2:6 n004 -15 .5p rpar=1.12t noiseless
55 c:u2:10 +15 n004 .5p rpar=1.12t noiseless
56 a:u3:1 0 u3:n004 0 0 0 0 u3:x 0 ota g=150u iout=7u cout=28p en
+=9.8n enk=4 vhigh=1e308 vlow=-1e308
57 a:u3:2 n003 n008 0 0 0 0 0 0 ota g=0 in=.1p ink=70
58 c:u3:2 u3:n004 0 .75p rpar=100k noiseless
59 r:u3:1 +15 u3:x 10g noiseless
60 r:u3:2 u3:x -15 10g noiseless
61 m:u3:1 +15 u3:n005 vout vout u3:n temp=27
62 m:u3:2 -15 u3:n005 vout vout u3:p temp=27
63 d:u3:1 vout u3:x u3:x
64 c:u3:3 u3:n005 0 .075p rpar=1meg noiseless
65 d:u3:4 n003 n008 u3:di
66 c:u3:5 n003 n008 1p rpar=80meg
67 c:u3:7 +15 vout .2p
68 c:u3:8 vout -15 .2p
69 b:u3:1 0 u3:n004 i=10u*dnlim(uplim(v(n008),v(+15) -.9,.3), v
+(-15)+.9, .3)+1n*v(n008)
70 b:u3:2 u3:n004 0 i=10u*dnlim(uplim(v(n003),v(+15) -.899,.3), v
+(-15)+.899, .3)+1n*v(n003)
71 b:u3:3 0 u3:n005 i=1u*dnlim(uplim(v(u3:x),v(+15) -.9,.5), v
+(-15)+.9,.5)+1p*v(u3:x)
72 c:u3:9 +15 n008 .5p rpar=1.12t noiseless
73 c:u3:4 n008 -15 .5p rpar=1.12t noiseless
74 c:u3:6 n003 -15 .5p rpar=1.12t noiseless
59
75 c:u3:10 +15 n003 .5p rpar=1.12t noiseless
76 a:u4:1 0 u4:n004 0 0 0 0 u4:x 0 ota g=150u iout=7u cout=28p en
+=9.8n enk=4 vhigh=1e308 vlow=-1e308
77 a:u4:2 n003 n001 0 0 0 0 0 0 ota g=0 in=.1p ink=70
78 c:u4:2 u4:n004 0 .75p rpar=100k noiseless
79 r:u4:1 +15 u4:x 10g noiseless
80 r:u4:2 u4:x -15 10g noiseless
81 m:u4:1 +15 u4:n005 n002 n002 u4:n temp=27
82 m:u4:2 -15 u4:n005 n002 n002 u4:p temp=27
83 d:u4:1 n002 u4:x u4:x
84 c:u4:3 u4:n005 0 .075p rpar=1meg noiseless
85 d:u4:4 n003 n001 u4:di
86 c:u4:5 n003 n001 1p rpar=80meg
87 c:u4:7 +15 n002 .2p
88 c:u4:8 n002 -15 .2p
89 b:u4:1 0 u4:n004 i=10u*dnlim(uplim(v(n001),v(+15) -.9,.3), v
+(-15)+.9, .3)+1n*v(n001)
90 b:u4:2 u4:n004 0 i=10u*dnlim(uplim(v(n003),v(+15) -.899,.3), v
+(-15)+.899, .3)+1n*v(n003)
91 b:u4:3 0 u4:n005 i=1u*dnlim(uplim(v(u4:x),v(+15) -.9,.5), v
+(-15)+.9,.5)+1p*v(u4:x)
92 c:u4:9 +15 n001 .5p rpar=1.12t noiseless
93 c:u4:4 n001 -15 .5p rpar=1.12t noiseless
94 c:u4:6 n003 -15 .5p rpar=1.12t noiseless
95 c:u4:10 +15 n003 .5p rpar=1.12t noiseless
96 v1 -15 0 -15
97 v2 +15 0 15
98 v3 v 0 pwl file=5v_lf_v.txt
99 v4 vs 0 pwl file=5v_lf_vs.txt
100 .model u4:di d(ron=1.15k roff=1g vfwd=1 vrev=1 epsilon=1
+revepsilon=1 noiseless)
101 .model u4:p vdmos(vto=300m kp=50m pchan)
102 .model u4:n vdmos(vto=-300m kp=50m)
103 .model u4:x d(ron=10k roff=1t vfwd=.82 vrev=.82 epsilon=.1
+revepsilon=.1)
104 .model u3:di d(ron=1.15k roff=1g vfwd=1 vrev=1 epsilon=1
+revepsilon=1 noiseless)
105 .model u3:p vdmos(vto=300m kp=50m pchan)
106 .model u3:n vdmos(vto=-300m kp=50m)
107 .model u3:x d(ron=10k roff=1t vfwd=.82 vrev=.82 epsilon=.1
+revepsilon=.1)
108 .model u2:di d(ron=1.15k roff=1g vfwd=1 vrev=1 epsilon=1
+revepsilon=1 noiseless)
109 .model u2:p vdmos(vto=300m kp=50m pchan)
110 .model u2:n vdmos(vto=-300m kp=50m)
111 .model u2:x d(ron=10k roff=1t vfwd=.82 vrev=.82 epsilon=.1
+revepsilon=.1)
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112 .model u1:di d(ron=1.15k roff=1g vfwd=1 vrev=1 epsilon=1
+revepsilon=1 noiseless)
113 .model u1:p vdmos(vto=300m kp=50m pchan)
114 .model u1:n vdmos(vto=-300m kp=50m)
115 .model u1:x d(ron=10k roff=1t vfwd=.82 vrev=.82 epsilon=.1
+revepsilon=.1)
116 .tran 0 30ms .5ms .1ms startup uic
117 .end
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Figure B.1: Low Frequency Matched Filter Schematic
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Appendix C
LF Oscillator Tuning Procedure
1 Remove capacitor C2.
2 Measure voltages at both the positive and negative input to the top comparator,
U1.
3 Adjust the top potentiometer, modeled as R26 and R27, until both comparator
inputs are as close to equal as possible.
4 Reinsert C2.
5 Measure the voltage at circuit nodes V, Vd, and Vs.
6 Adjust the left potentiometer, modeled as R3, until V appears to be chaotic. If
this does not occur, skip to step 8.
7 Verify chaotic operation by displaying Vd vs. V (this will generate an attractor).
8 Tune the right potentiometer, modeled as R23 and R30, until the circuit is
operating in the desired band.
9 Repeat steps 6-8 as necessary for  ne-tuning.
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