Planar Magnetics Design for Low Voltage High Power DC-DC Converters
by
Je rey M. Aggas
A thesis submitted to the Graduate Faculty of
Auburn University
in partial ful llment of the
requirements for the Degree of
Master of Science
Auburn, Alabama 
May 4, 2014
Keywords: planar magnetics, inductor, buck converter
Copyright 2014 by Je rey M. Aggas
Approved by
Robert Dean, Chair, Associate Professor of Electrical and Computer Engineering
Stuart Wentworth, Associate Professor of Electrical and Computer Engineering
Lloyd Riggs, Professor of Electrical and Computer Engineering
Abstract
Planar magnetic technology is widely used in a variety of applications from telecommu-
nications to power electronics. In particular, the use of planar inductors and transformers in
power electronics have burgeoned as a result of increasing switching frequencies. However,
the design and construction of these magnetic structures becomes more di cult as switching
frequencies increase. At high frequencies, the skin and proximity e ects contribute signi -
cantly to a component?s total loss. Thus, methods for analyzing the various losses inherent
to planar magnetic components were discussed in detail. The air gap necessary for planar
inductor design was characterized and discussed in depth. The core geometry, core material,
number of turns and gap width a ect the inductance of a planar inductor. All of these
factors must be carefully considered when designing and building an inductor.
A multitude of planar inductors were designed for use in a 12-1 V synchronous buck
converter con guration. A simple testing method was proposed that allowed quick and
accurate comparison of the various inductors. The inductors were fully characterized through
the e ciency of the overall buck converter. Limitations for the developed inductors were
found to be core saturation and discontinuous mode operation.
Finite element analysis (FEA) was performed to investigate the current distribution
throughout the windings. It was quickly concluded that 2D analysis was not su ciently
accurate; consequently, all FEA modeling was performed with the 3D solver. From this
analysis, the gap location with respect to the windings was determined to be critical to the
level of current imbalance. As such, a conclusion was reached that the windings should be
located as far from the gap as possible. A more ideal solution, if available, is the utilization
of cores having the air gap located at the top of the middle leg.
ii
The most suitable planar inductor determined through preliminary testing was inte-
grated in the most e cient buck converter design. The planar inductor buck converter
board performed comparably with a similar board utilizing COTS inductors. A peak e -
ciency of 94.7% was achieved at the a load current of 6 A. The optimal load current rating
of each buck converter phase was determined to be 12 A. For this load current level, the
planar inductor performed best at 400 kHz with an e ciency of 92%. The DC resistance of
the planar inductor was about 1.5 m , which caused the e ciency of the component to fall
o more quickly than the 1 m COTS inductors.
iii
Acknowledgments
I would  rst like to sincerely thank Dr. Robert Dean for giving me the opportunity to
pursue my Masters of Science under his guidance. I feel very fortunate to have worked with
and for a professor that cares so much for his students. His genuine kindness, incessant moti-
vation and strong Christian values translated to an exceptional work environment. I am very
grateful to have had a mentor, teacher and supervisor as knowledgeable and accommodating
as Dr. Dean as I prepare to enter the "real world".
I would also like to thank Dr. Christopher Wilson for his support and leadership over
the past two years. His ability to accomplish in  ve minutes what I spent an entire day
trying to  gure out was nothing short of astounding. Although I have missed picking his
brain, since he accepted his new job, I learned some invaluable skills under his wing that will
aide me for the rest of my life (in particular, LATEX , which made producing this manuscript
a feasible task).
I was fortunate to have worked with some excellent co-workers through-out my time at
Auburn. I would like to thank Luke Jenkins for making me feel welcome when I  rst started
and being the voice of reason in the o ce throughout my time here. Luke provided the team
with the leadership and guidance to tackle a problem of any size. I would like to thank Will
Abel for putting up with me not only as a co-worker, but also as roommate. I would like to
thank Justin Moses and Keaton Rhea for all of the great Moe?s lunchtime conversations. I
would also like to express my thanks to John Tatarchuck for informing me that The Onion
is not a reliable news source. I am grateful to have also had the chance to work with Aubrey
Beal, whose impeccable kindness, steadfast patience, and engineering savvy will indubitably
make him a great professor one day.
iv
I would also like to thank my parents for their never-ending support of all my endeavors.
They have never been unwilling to extend a helping hand to me at any time of need, and for
that I am very grateful. I feel very fortunate to have such great role-models that continually
o er me their wisdom and encouragement.
Throughout my time at Auburn, I was lucky enough to have the greatest pick-up soccer
group anyone could ask for. I would like to thank Brice Nguelifack, Sunday Asogwa, David
Robinson, Karim Ha z, Joey Nickerson, Anoosh Baghernejad, Preston Dukes and everyone
else for all the great games.
Lastly, I would like to thank my girlfriend Molly for always making life great and being
so awesome.
v
Table of Contents
Abstract . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ii
Acknowledgments . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . iv
List of Figures . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . viii
1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
1.1 Overview of Planar Magnetic Components . . . . . . . . . . . . . . . . . . . 2
1.1.1 Bene ts . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
1.1.2 Limitations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
1.2 Planar Cores . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
1.2.1 Geometry . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
1.2.2 Material . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
2 Planar Magnetic Component Design and Loss Characteristics . . . . . . . . . . 8
2.1 Loss Mechanisms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
2.1.1 Winding Loss . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
2.1.2 Gapping . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
2.1.3 Core Loss . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
2.2 Design Procedure . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
3 Initial Testing in Buck Converter Con guration . . . . . . . . . . . . . . . . . . 20
3.1 DC-DC Buck Converter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
3.1.1 Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
3.1.2 Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
3.1.3 Multi-Phase Architecture . . . . . . . . . . . . . . . . . . . . . . . . . 26
3.2 Buck Converter Integration and Initial Testing . . . . . . . . . . . . . . . . . 29
3.2.1 Testing Strategy . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
vi
3.2.2 Inductance Design . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36
3.3 E ciency Results . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38
4 Finite-Element Modeling and Analysis . . . . . . . . . . . . . . . . . . . . . . . 44
4.1 Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44
4.1.1 Mesh Operations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44
4.1.2 FEM Solvers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 46
4.2 Planar Inductor Analysis . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 52
4.2.1 Inductor #1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 56
4.2.2 Inductor #2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 59
4.2.3 Inductor #3 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 63
4.2.4 Inductor #4 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 64
5 Buck Converter E ciency Testing and Results . . . . . . . . . . . . . . . . . . . 68
5.1 Board Design . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 68
5.1.1 Layout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 68
5.1.2 Assembly . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 71
5.2 E ciency Results . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 72
5.3 Comparison vs. Previous Designs . . . . . . . . . . . . . . . . . . . . . . . . 73
5.4 Comparison vs. COTS Inductors . . . . . . . . . . . . . . . . . . . . . . . . 78
6 Conclusion and Future Work . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 83
6.1 Summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 83
6.2 Future Work . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 84
Bibliography . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 85
Appendix A MATLAB Scripts . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 88
A.1 E ciency plotting script . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 88
A.2 Data storage script . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 94
A.3 Waveform generation and analysis . . . . . . . . . . . . . . . . . . . . . . . . 97
Appendix B Material Speci cations . . . . . . . . . . . . . . . . . . . . . . . . . . 99
vii
List of Figures
1.1 Planar structure . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
1.2 Examples of planar magnetic technologies . . . . . . . . . . . . . . . . . . . . . 3
1.3 Comparison of winding structures . . . . . . . . . . . . . . . . . . . . . . . . . . 4
1.4 Core Geometries . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
2.1 Eddy current formation in a conductor . . . . . . . . . . . . . . . . . . . . . . . 9
2.2 Eddy current formation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
2.3 Filter inductor current waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . 13
2.4 Comparison of minor and major BH loops . . . . . . . . . . . . . . . . . . . . . 14
2.5 Filter inductor current waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . 15
2.6 Planar  lter inductor design process . . . . . . . . . . . . . . . . . . . . . . . . 19
3.1 Buck converter types . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
3.2 Buck converter states . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
3.3 Buck converter operation modes . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
3.4 Multi-phase buck converter with two phases . . . . . . . . . . . . . . . . . . . . 27
3.5 Comparison between single-phase and multi-phase buck converters . . . . . . . 28
viii
3.6 Swappable inductor board concept . . . . . . . . . . . . . . . . . . . . . . . . . 30
3.7 Inductor breakout boards. Cores: E18 (top left), E22 (top right), ER18 (bottom
left) ER23 (bottom right) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
3.8 Ferroxcuber planar core diagrams . . . . . . . . . . . . . . . . . . . . . . . . . 31
3.9 Inductor mounting strategy . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
3.10 Types of gaps for ferrite cores . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33
3.11 Methods for applying appropriate core holding pressure . . . . . . . . . . . . . . 34
3.12 Buck converter test setup . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35
3.13 Relationship between gap width, inductance factor, and inductance tolerance . . 37
3.14 Buck Converter V4.1 E ciency comparison - 3A . . . . . . . . . . . . . . . . . 38
3.15 Buck Converter V4.1 E ciency comparison - 10A . . . . . . . . . . . . . . . . . 39
3.16 Buck Converter V4.1 E ciency comparison - 16A . . . . . . . . . . . . . . . . . 39
3.17 Buck Converter V4.1 E ciency comparison - 22A . . . . . . . . . . . . . . . . . 40
3.18 Buck Converter V4.1 E ciency comparison - 120kHz . . . . . . . . . . . . . . . 40
3.19 Buck Converter V4.1 E ciency comparison - 200kHz . . . . . . . . . . . . . . . 41
3.20 Buck Converter V4.1 E ciency comparison - 360kHz . . . . . . . . . . . . . . . 41
3.21 Buck Converter V4.1 E ciency comparison - 500kHz . . . . . . . . . . . . . . . 42
4.1 Examples of mesh grids in 2D and 3D solvers . . . . . . . . . . . . . . . . . . . 45
4.2 Mesh operation on rounded surfaces . . . . . . . . . . . . . . . . . . . . . . . . 46
ix
4.3 3D inductor structure . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 53
4.4 Various winding locations within the core window . . . . . . . . . . . . . . . . . 53
4.5 AC component extraction and frequency response . . . . . . . . . . . . . . . . . 54
4.6 Curve  t parameters for Ferroxcube ER18 3C96 2-turn inductor . . . . . . . . . 55
4.7 Inductor with 2 mil distributed gap and bottom winding orientation . . . . . . . 56
4.8 Magnetic  ux density [mT] through the cross section of the core . . . . . . . . . 57
4.9 Current density of  rst 3 harmonics and DC (60Hz) . . . . . . . . . . . . . . . . 58
4.10 Current density viewed as cross-section of  rst 3 harmonics and DC (60Hz) . . . 59
4.11 Inductor with 2 mil distributed gap and central winding orientation . . . . . . . 60
4.12 Magnetic  ux density [mT] through the cross section of the core . . . . . . . . . 60
4.13 Current density of  rst 3 harmonics and DC (60Hz) . . . . . . . . . . . . . . . . 61
4.14 Current density viewed as cross-section of  rst 3 harmonics and DC (60Hz) . . . 62
4.15 Inductor with 3 mil distributed gap and central winding orientation . . . . . . . 63
4.16 Magnetic  ux density [mT] through the cross section of the core . . . . . . . . . 63
4.17 Inductor with 4 mil central leg gap and lower winding orientation . . . . . . . . 65
4.18 Magnetic  ux density [mT] through the cross section of the core . . . . . . . . . 65
4.19 Magnetic  ux density [mT] through the cross section of the core . . . . . . . . . 65
4.20 Current density viewed as cross-section of  rst 3 harmonics and DC (60Hz) . . . 66
x
5.1 Buck converter layout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 69
5.2 Various turn con gurations used to make 2-turn inductor . . . . . . . . . . . . . 70
5.3 Un-populated  nal buck converter design with planar inductor . . . . . . . . . . 71
5.4 Labeled V4.3 buck converter with diode  x . . . . . . . . . . . . . . . . . . . . 72
5.5 E ciency data plotted over frequency . . . . . . . . . . . . . . . . . . . . . . . 72
5.6 E ciency data plotted over load current . . . . . . . . . . . . . . . . . . . . . . 73
5.7 Buck Converter V4.3 E ciency improvement - 4A . . . . . . . . . . . . . . . . . 74
5.8 Buck Converter V4.3 E ciency improvement - 10A . . . . . . . . . . . . . . . . 74
5.9 Buck Converter V4.3 E ciency improvement - 15A . . . . . . . . . . . . . . . . 75
5.10 Buck Converter V4.3 E ciency improvement - 18A . . . . . . . . . . . . . . . . 75
5.11 Buck Converter V4.3 E ciency improvement - 120kHz . . . . . . . . . . . . . . 76
5.12 Buck Converter V4.3 E ciency improvement - 200kHz . . . . . . . . . . . . . . 76
5.13 Buck Converter V4.3 E ciency improvement - 280kHz . . . . . . . . . . . . . . 77
5.14 Buck Converter V4.3 E ciency improvement - 340kHz . . . . . . . . . . . . . . 77
5.15 Buck converter V4.3 e ciency vs. COTS inductors - 10A . . . . . . . . . . . . . 78
5.16 Buck converter V4.3 e ciency vs. COTS inductors - 15A . . . . . . . . . . . . . 79
5.17 Buck converter V4.3 e ciency vs. COTS inductors - 20A . . . . . . . . . . . . . 79
5.18 Buck converter V4.3 e ciency vs. COTS inductors - 220kHz . . . . . . . . . . . 80
xi
5.19 Buck converter V4.3 e ciency vs. COTS inductors - 300kHz . . . . . . . . . . . 80
5.20 Buck converter V4.3 e ciency vs. COTS inductors - 400kHz . . . . . . . . . . . 81
5.21 Buck converter V4.3 e ciency vs. COTS inductors - 500kHz . . . . . . . . . . . 81
xii
Chapter 1
Introduction
The growth in supercomputer facilities and data centers over the past decade has en-
gendered an increased demand for high density and high e ciency power supplies [1]. As
a further requirement, modern processors require a power supply with stringent transient
performance to ensure the required voltage upheld [2],[3]. Consequently, modern switched-
mode power supplies (SMPS) have seen an increase in operating frequency to accommodate
load demands. This push towards higher operating frequencies gives rise to bene ts as well
as drawbacks from a design perspective. A decrease in the size of the magnetic component
is a natural consequence of increasing the operating frequency. However, additional losses
are introduced as a result of the skin and proximity e ects at these higher frequencies.
Planar magnetic technology (Figure 1.1) has bene ted greatly from the advancements in
electronics manufacturing. Low pro le windings have been around for some time. However,
before the advent of printed circuit board (PCB) technology, the construction of planar
windings was di cult, time-consuming, and for the most part, not economically viable. As
the cost of PCB fabrication has fallen, the technology has began to supplant itself not only
in power electronics, but also in  elds such as communications and power distribution.
Planar magnetic technology o ers a number of advantages that mitigate many of the
problems inherent to conventional magnetic devices [4],[5]. An overview of the technology
and its candidacy for power electronic applications will be presented as follows:
a136 Magnetic components for power electronics
a136 Bene ts and limitations of planar magnetics
a136 Commercially available planar cores
1
(a) Diagram of planar inductor (b) Diagram in exploded view
Figure 1.1: Planar structure
1.1 Overview of Planar Magnetic Components
Planar magnetic technology is present in a variety of applications ranging from power
electronics to wireless communication systems [1]. Several approaches to "planar" windings
have been utilized in order to best suite the application. Perhaps the most common planar
technology involves standard PCB techniques with various winding structures (Figure 1.2a).
Various winding techniques have been explored over the years [6],[7]. Flexible substrates
such as polyimide are often used for electronics that have unusual packaging constraints (i.e.
cameras, cell phones)[8]. This technology can be easily extended to planar magnetics as
shown in Figure 1.2b. For high current applications where ohmic losses must be minimized,
a hybrid approach employing PCB technology and stamped copper traces is often a suitable
approach (Figure 1.2c). For certain applications, the cost associated with PCB fabrication
may preclude the use of these methods. In such cases, windings may be "hand-made" and
stacked accordingly while making use of an insulator. Vertically and horizontally oriented
examples are presented in Figure 1.2d and Figure 1.2e, respectively. RF applications also
make use of planar windings for magnetic components (Figure 1.2f). Often, an air core is
su cient to achieve the necessary inductance since the operating frequency is generally much
higher than in power electronic applications.
2
(a) Standard multilayer PCB (b) Flexible multilayer PCB
(c) Hybrid PCB with copper
stamping
(d) Vertical windings
(e) Copper foils with Kapton
taper (f) Air core RF inductor
Figure 1.2: Examples of planar magnetic technologies
1.1.1 Bene ts
Planar magnetic technology exhibits a variety of advantages over conventional wire-
wound magnetic components. Some of the prominent bene ts as related to power electronics
are as follows:
a136 Low pro le - The required core volume of an inductor to avoid magnetic saturation
is a strong function of the current. For this reason, the volume of the core for a given
application is often a  xed value. Consequently, the overall volume of the planar and
conventional magnetic components will be roughly equal. However, a larger footprint
is often accepted to achieve a reduction in the height of the component.
a136 Implementation and repeatabilty - Modern PCB technology allows for arbitrary
design of the winding and interleaving structure. This is a particularly important
point when considering large scale integration and the need for consistent component
3
characteristics. Additionally, printing the windings directly onto the PCB removes the
losses inherent to the soldered terminations required for surface mount devices (SMD).
a136 Thermal characteristics - Although the volume of planar and conventional magnetic
devices are often similar, planar technology tends to provide a higher surface-to-volume
ratio. This a ords the structure a greater ability to dissipate the heat from ohmic and
core losses.
a136 Reduced AC losses - In general, SMPS applications operate at switching frequencies
ranging from hundreds of kilohertz to a couple megahertz. However, a signi cant
amount of the total energy lies in the upper level harmonics. As a result, the skin
e ect often contributes to additional losses in conventional round-wire components.
The  at windings inherent to planar inductors and transformers can reduce these high
frequency losses dramatically. Various investigations into this subject have shown PCB
windings can provide a 90% reduction in AC resistance. The winding geometries for
conventional and planar structures are presented in Figure 1.3.
(a) Conventional round conductors (b) Planar conductors
Figure 1.3: Comparison of winding structures
1.1.2 Limitations
Some limitations are often associated with planar magnetic technology. Most can be
worked around with appropriate design procedures. The most prominent limitations are:
4
a136 Limited number of turns - Conventional winding structures have a much easier time
achieving a large number of turns. Due to the nature of PCB technology, achieving
multiple turns often equates to additional layers. If the total number of layers is  xed,
the dc resistance of the component will su er in order to achieve the necessary turns
ratio or inductance. This preventative cost is being mitigated as PCB fabrication costs
continue to fall.
a136 Large footprint - The low pro le structure attained through planar technology comes
at the cost of a larger footprint. This can be problematic if board space for an appli-
cation is limited. However, in many cases, the board size will be constrained in the
normal (z) direction as well as the horizontal (xy) direction. As mentioned previously,
the low pro le characteristic of planar technology can be exploited in these situations.
a136 Low window utilization - Planar technologies based on rigid PCB techniques will
often possess a relatively low window utilization factor. The dielectric layers associated
with PCB technologies take up a considerable amount of the available window. The
hybrid approach mentioned previously is an example of a work around for this limiting
factor.
1.2 Planar Cores
Magnetic cores for use in planar magnetics are available in a variety of industry standard
core sizes, geometries, and materials. The extensive adoption of planar technology has driven
the development of application speci c magnetic core materials and shapes. The type of core
will di er greatly with the application; therefore, this discussion will be restricted primarily
to power electronics applications.
5
1.2.1 Geometry
The most common core geometry within the power electronics realm is the planar E
core and its variants. The planar E core, shown in Figure 1.4a, is the easiest to integrate into
a PCB. However, the rectangular shape of the legs are not ideal for achieving a uniform  ux
density. The planar ER core (Figure 1.4b) has a number of advantages over the standard
planar E core. Although it is slightly more di cult to implement in a PCB, the  ux density
is more evenly distributed through the legs due to the optimized leg shapes. Additionally,
the dc resistance associated with these cores is reduced due to the shorter winding lengths.
For high current applications where a hybrid PCB with stamped copper is utilized, the
standard E core (Figure 1.4c) is often used to provide the necessary height. The planar Q
core, shown in Figure 1.4d, is similar to the planar ER core, but is more e cient with respect
to distributing  ux evenly throughout the volume [9].
(a) Planar E core (b) Planar ER core
(c) E core (d) Planar Q core
Figure 1.4: Core Geometries
1.2.2 Material
A variety of magnetic materials with considerable di erences are available, making the
choice of material a critical design step. Metal alloy, powdered metal, and ferrite are the
primary material classes for power electronic applications. Metal alloy materials are tape
wound cores that have extremely high permeability and saturation  ux density. Unfortu-
nately, the resistivity of the material is such that eddy current losses are unacceptable above
6
400 Hz. For this reason, they are generally not viable candidates for most SMPS appli-
cations, which often operate at over 100 kHz. Powdered metal cores have a much lower
permeability than metal alloy cores due to non-magnetic sections distributed throughout
the structure. Although these materials often have high saturation  ux densities, they are
still quite lossy at SMPS frequencies. Ferrite materials are predominantly the best option
for SMPS applications. Many ferrite materials are formed through a mixture of iron oxide
with manganese and zinc or nickel. The MnZn ferrites are generally used for frequencies
up to 2 MHz. NiZn ferrites were developed to have much higher resistivity, making them
suitable for applications up to several hundred MHz. The saturation  ux density of ferrites is
considerably lower than in metal alloys and powdered metal materials; thus, core saturation
is often a limitation of ferrite materials. [10],[9].
7
Chapter 2
Planar Magnetic Component Design and Loss Characteristics
2.1 Loss Mechanisms
Inductor losses can generally be subdivided into two categories: core loss and winding
loss. Core loss involves hysteresis loss as well as eddy current formation within the core
material itself. Winding loss is often spoken of in terms of AC and DC losses. DC losses are
determined by the DC resistance of the winding and the magnitude of the DC component.
AC losses occur as a result of the skin and proximity e ects.
2.1.1 Winding Loss
For the vast a majority of SMPS applications, winding losses will make up the majority
of the total component losses. One reason for this is the large DC o set inherent to  lter
inductor applications. Consequently, the associated loss mechanisms must be carefully con-
sidered throughout the design process. AC winding losses are the result of eddy currents
forming within the windings. These eddy currents can form due to the skin and proximity
e ects as well as fringing magnetic  elds. The skin and proximity e ects are mechanically
similar. Additional eddy currents often form as the result of air gap location. Both situations
will be considered.
Skin and Proximity E ects
The skin e ect and proximity e ect increase the equivalent resistance of a trace by
altering the current distribution within the winding. Both work under the same principle
and have the potential to cause current imbalance in the windings. Consider a conductor
8
carrying current i(t) as shown in Figure 2.1. According to Lenz?s law, the magnetic  ux
produced by the eddy currents will oppose the  ux due to the current i(t). It follows that
the net result of the original current combined with the eddy currents alters the current
distribution.
Figure 2.1: Eddy current formation in a conductor
The precise current distribution can be solved for using Maxwell?s equations, but is often
evaluated empirically by means of the skin depth,  . The skin depth is a decaying function
in frequency and is given by
9
 =
r  
  f (2.1)
where  is the resistivity,  is the permeability, and f is the frequency. It should be noted that
resistivity of a material is a function of temperature. The dependence of  on temperature,
T, is given as
 (T) =  0[1 + (T T0)] (2.2)
where  is a temperature coe ccient.
2.1.2 Gapping
Power inductors and  lter inductors found in SMPS often require a discrete gap in order
to maintain a predictable inductance. The size and location of the gap can substantially
change the performance of the inductor. With regard to SMPS, the size of the gap is
determined by two criteria. First, the e ective permeability,  e, is controlled through the
size of the gap. In turn, this limits the maximum  ux density for a given load current.
The second function of the gap is to control the amount of ripple current allowed by the
design speci cation. These functions are naturally con icting and an iterative process is
often needed to  nd the appropriate gap size [11],[12].
The location of the gap is also of great importance. A review of magnetic circuits
will assist in clarifying this point. For an inductor, the total reluctance of the magnetic
component is given as the ratio of magnetomotive force (mmf) to total magnetic  ux
R= F (2.3)
where F is the mmf given as
F =
 
H dl (2.4)
10
and  is the total magnetic  ux given as
 =
 
S
B dS: (2.5)
For a material with a high permeability,  r >> 1, the total reluctance of the magnetic circuit
is given as
R= l 
r 0A
: (2.6)
The addition of a small air gap ( r = 1) introduces a high reluctance element into an
otherwise low reluctance path. Analogous to Ohm?s law, the majority of the energy is stored
within the high reluctance air gap [13]. However, due to the sharp discontinuity in path
reluctance, the magnetic  ux tends to "bow out" causing signi cant fringing  elds in the
area of the gap. Shown in Figure 2.2b is the ideal formation of the magnetic  ux through
the air gap. The more realistic formation of these  elds is shown in close proximity to planar
windings in Figure 2.2c. The formation of eddy currents as a result of these fringing  elds
is shown in Figure 2.2d according to Lenz?s law. The orientation of these fringing  elds can
be particularly detrimental to performance. As shown in Figure 2.2c and Figure 2.2d, the
incident  elds are roughly normal to the surface of the winding. This particular orientation
will form the strongest possible eddy currents within the windings according to
r H = J + @D@t : (2.7)
The formation of eddy currents will have the overall e ect of crowding the current within the
trace. The direction of the eddy currents shown in Figure 2.2d indicate that distinct regions
of current imbalance will develop. The middle of the trace will have a reduction in current
density due to the canceling e ect of the eddy currents. However, the regions of the trace in
close proximity to the gap will experience a much higher current density. This phenomena
11
will be explored further when  nite element method (FEM) simulations of planar magnetic
devices are presented.
(a) Magnetic circuit with an air gap
(b) Ideal  ux  elds through the air gap
(c) Fringing  elds incident on copper traces
(d) Development of eddy currents within the
trace
Figure 2.2: Eddy current formation
Improved Winding Con guration
Altering the shape of the windings is one approach investigated in [14],[15] to combat
the strong eddy currents that tend to form on any conductor near the air gap. This method
12
essentially accepts a higher DC resistance to reduce the overall resistance through reduction
in AC losses. Several optimal structures have been proposed; however, they all work under
an optimization principle, where an optimal winding structure is one that minimizes the
overall winding resistance [6] as shown in Figure 2.3.
(a) Diagram of shaped windings around
fringing  ux
(b) Optimizing curve for shaped windings
Figure 2.3: Filter inductor current waveforms
2.1.3 Core Loss
Core losses in inductors can vary greatly with the application. Tape-wound metal alloys
generally have the highest core losses of any material class. Ferrite materials are usually
considered to have the lowest core losses. Although most SMPS utilize ferrite materials, the
characteristics of the system can increase the hysteresis losses in the core dramatically.
A typical B-H curve is shown in Figure 2.4a. In general, an inductor will operate over
a certain region of the loop - ideally avoiding the saturation region. Figure 2.4b depicts
the B-H loop for operation as an ac inductor. The operating loop will always be symmetric
about the H-axis if there is no DC bias. Figure 2.4c illustrates a  lter inductor which is often
used in SMPS applications. This particular inductor has a large DC current component with
a smaller superimposed AC component. The area of the minor B-H loop will increase as the
AC component of the current increases. Since power loss in a core material is a function of
13
B-H loop area, it should be noted that core losses in  lter inductors can be quite small if
the percentage current ripple is small. However, a smaller ripple current often will require a
larger inductance. Consequently, the reduction in core losses are often accompanied by an
increase in winding loss [16].
(a) Full B-H curve path
(b) B-H loop
(c) Minor B-H loop
Figure 2.4: Comparison of minor and major BH loops
The ability to model core loss empirically is an invaluable tool in characterizing the
performance of an inductor. Traditional empirical formulas lacked the ability to handle
arbitrary waveforms. In the case of a  lter inductor, the waveform is essentially a triangle
14
waveform with a DC o set. Two examples of typical  lter inductor current waveforms
are presented in Figure 2.5. Several new methods have been developed in order to more
accurately calculate core loss due to non-sinusoidal waveforms [17].
(a) Filter inductor current waveform
with 15% current ripple
(b) Filter inductor current waveform
with 30% current ripple
Figure 2.5: Filter inductor current waveforms
Steinmetz?s Equation
The  rst empirical model used to describe core loss was Steinmetz?s equation (SE). In
this model, the frequency and peak  ux density were used to estimate the loss within the
core. The constants k,  , and  are material dependent curve- t parameters used to describe
the power loss density as shown in Equation 2.8.
P = kf ^B (2.8)
Various problems arose from this model when applied to power electronic applications. The
SE description of core power loss was di cult to apply over a large frequency range as the
material parameters displayed variation. Second, and more important, this model ignores
the e ect of a DC bias within the circuit. Many inductors used in power electronic appli-
cations carry a signi cant DC bias in addition to the AC component. For these reasons,
15
an improvement in core power loss calculations was desperately needed for power electronic
applications.
Modi ed Steinmetz?s Equation
A modi ed Steinmetz?s equation (MSE) was developed by Albach, Durbau and Brock-
meyer [18] that included a term based on the varying magnetic  eld within the core. An
equivalent frequency provides a weighted average of the time varying magnetic  eld as shown
in Equation 2.9.
feq = 2 B2 2
 T
0
(dBdt )2dt (2.9)
The power loss density can then be found by using Equation 2.10.
P = kf  1eq ^B fr (2.10)
Although this provided considerable improvement over the original Steinmetz equation, the
assumptions about the kind of averaging used to determine the equivalent frequency leads
to limited accuracy.
Generalized Steinmetz Equation
To combat the limitations of the MSE, Li, Abdallah and Sullivan [19] developed the
generalized Steinmetz equation (GSE). The GSE (Equation 2.11) was developed on the
premise that the instantaneous power loss is a function of the instantaneous magnetic  eld
and its derivative.
P(t) = k
  
  dB
dt
  
  
a
jB(t)jb (2.11)
The GSE was determined to not provide any signi cant advantage over the previously devel-
oped MSE. In some cases, the results were even more inaccurate than the modi ed Steinmetz
equation.
16
improved Generalized Steinmetz Equation
Due to the lack in accuracy of the GSE and MSE, it became apparent that the entire
hysteresis path was critical to determine the core loss. Venkatachalam, Sullivan, Abdallah
and Tacca [17] determined that an appropriate relationship to describe instantaneous power
loss could be stated in the form shown in Equation 2.12.
P(t) = k( B)w
  
  dB
dt
  
  
z
(2.12)
From this, it was determined that the original Steinmetz parameters  and  could be  t
into Equation 2.12 in the form
P(t) = 1T
 T
0
k1jB(t)j   
  
  dB
dt
  
  
 
(2.13)
The parameter k1 is calculated as
k1 = k(2 )  1 2 
0 jcos j
 jsin j   d (2.14)
This result provides the most accurate estimation of core loss for arbitrary waveforms. The
iGSE utilizes the hysteresis path as well as the time derivative of that path to quantify core
loss.
2.2 Design Procedure
The design and implementation of planar inductor is an involved process that requires
careful consideration of several key factors. A  ow-chart de ning a general algorithm for
designing planar inductors is shown in Figure 2.6.
17
a136 Circuit parameter de nition: Although it may seem rudimentary, a thorough un-
derstanding of the circuit is critical for developing magnetic components. Understand-
ing overall system requirements is particularly important when building power con-
verters since the inductor is very in uential over the output waveform. Faulty design
of the magnetic component can lead to poor system performance and may also damage
the load.
a136 Core material and geometry: A variety of core material and geometry combinations
are available to the designer from a multitude of manufacturers. Most materials have
one or two characteristics that separate them from other material, such as core loss,
high  ux, etc. It is important to recognize the most pertinent issue in a design in order
to fully exploit the characteristics of the core material.
a136 Turns and gap width: The number of turns and the gap width control the inductance
and  ux density of the structure. They must always be designed for in tandem to avoid
core saturation and high winding losses. In general, a minimum gap is required to keep
the core out of the saturation region. However, a larger gap will reduce the inductance.
Thus, multiple turns can be added to increase the inductance. An unavoidable increase
in DCR will usually be the result of increasing the number of turns. Consequently,
both gap and the number of turns must be optimized for any given design.
a136 Winding con guration: One approach that enables the designer to make use of
more turns without increasing the DC resistance is through a parallel turn structure.
This, in essence, reduces the resistance of a structure by a factor equal to the number of
parallel windings used. However, implementing parallel windings necessitates the use
of high layer-count boards, which will often increase the cost of production. If space is
not at a premium, multiple two-layer boards can be stacked to e ectively implement
a parallel winding structure without raising the cost of production signi cantly.
18
a136 FEM Optimization: FEM optimization can be very helpful in determine the  ux
distribution throughout a core. Additionally, the current distribution of arbitrary
structures can be accurately solved with this tool. Methods and techniques associated
with FEM analysis are presented in detail in Chapter 4.
Figure 2.6: Planar  lter inductor design process
19
Chapter 3
Initial Testing in Buck Converter Con guration
3.1 DC-DC Buck Converter
The buck converter is a common type of switch-mode converter used to step down a
voltage. Its most common application is in power conversion for processor applications.
Modern processors often operate between 0.8 V and 1.2 V. E ciently converting a 12 V
input voltage to about 1 V is a problem that has received widespread attention within
the power electronics realm. A variety of aspects must be considered to e ectively and
e ciently perform power conversion. A suitable controlling algorithm must be developed
for the converter switching. As switching speeds increase, board layout becomes a very
in uential factor on the e ciency of the buck converter. Utilizing appropriate switching
devices is also important to minimize losses, particularly as switching frequency increases.
The  lter inductor often provides a large percentage of the losses within the converter.
Consequently, any improvements that can be made to the magnetic component can greatly
increase the overall converter e ciency.
3.1.1 Overview
Buck converters can be classi ed into two distinct categories: asynchronous and syn-
chronous. The asynchronous type o ers decreased complexity at the cost of lower e ciency.
The synchronous implementation requires the control of an additional switch, but often
possess a higher conversion e ciency. The asynchronous and synchronous buck converter
schematics are shown in Figure 3.1a and Figure 3.1b, respectively.
20
(a) Asynchronous buck converter (b) Synchronous buck converter
Figure 3.1: Buck converter types
3.1.2 Operation
In order to fully understand the role a  lter inductor plays in a buck converter appli-
cation, it is necessary to observe the entire conversion algorithm. The synchronous buck
converter has two states that each occur during one switching cycle. For a given duty cycle,
D, and switching period, T, the switching FET denoted by Q1 is "ON" for D T seconds. For
the remainder of the period, (1 D) T, the synchronous recti er denoted by Q2 is "ON".
These two states are portrayed in Figure 3.2a and Figure 3.2b.
(a) Synchronous buck converter in the
 rst state
(b) Synchronous buck converter in the
second state
Figure 3.2: Buck converter states
21
A buck converter has two distinct modes of operation: continuous and discontinuous.
These modes simply refer to the nature of the output current waveform. Continuous con-
duction mode (CCM) refers to a mode where the inductor current, IL, is conducting over the
entire period. When in discontinuous conduction mode (DCM), there exists a portion of the
switching period in which IL goes to zero. The two distinct modes of operation are shown
in Figure 3.3. DCM often occurs when the amount of energy being drawn by the load drops
below a certain point. Insu cient inductance can also cause a buck converter to operate in
DCM.
(a) Continuous conduction mode (CCM) (b) Discontinuous conduction mode (DCM)
Figure 3.3: Buck converter operation modes
The required duty cycle for a buck converter is simply the ratio of input and output
voltages.
D = VOV
In
(3.1)
For notational purposes, time constants ton and toff will be used to de ne the lengths of
time that Q1 is closed and open, respectively.
ton = D T (3.2)
toff = (1 D) T (3.3)
22
The energy stored in an inductor is given as
E = 12L I2L (3.4)
During the  rst operating state between t = 0 and t = ton, the inductor current IL is
increasing. Thus, from Equation 3.4, it can easily be seen that the energy stored is increasing.
During the second state, the inductor current is decreasing; thus, the inductor is dissipating
energy. A simple analysis of the operating states shown in Figure 3.2 will reveal that the
inductor voltage, VL, takes on two possible values over the entire period. For the  rst state,
shown in Figure 3.2a, the inductor voltage will be equal to Vo Vin. During the second state,
shown in Figure 3.2b, the inductor will be Vo, neglecting the voltage drop across the switch
Q2. Consequently, the change in current through the inductor will be linear according to the
fundamental relationship between current and voltage in an inductor.
VL = LdILdt (3.5)
During the  rst state when Q1 is closed and Q2 is open, the increase in current through the
inductor is given as:
 iLon =
 ton
0
VL
Ldt =
(Vin Vo)
L ton (3.6)
The decrease in inductor current when Q1 is open and Q2 is closed is given as:
 iLoff =
 T toff
0
VL
Ldt = 
Vo
Ltoff (3.7)
Equations 3.6 and 3.7 de ne the AC component of the inductor current IL. It can be noted
from Figure 3.2 that the average inductor current is equal to the average output current,
Io. With this knowledge, the minimum and maximum values of the output current can be
23
solved for explicitly.
Iomax =  IL +  iLon2 (3.8)
Iomin =  IL +  iLoff2 (3.9)
Combining Equations 3.6 - 3.9 and assuming a load resistance of R yields
Iomax = VoR + 12
 (V
in Vo)
L ton
 
(3.10)
Iomin = VoR + 12
 
 VoLtoff
 
(3.11)
At this point, it is possible to utilize Equations 3.10 and 3.11 to determine the boundary
conditions between continuous and discontinuous current modes. Using Equations 3.1 - 3.3,
Equation 3.10 can be simpli ed as
Iomax = VoR + 12
"
(VoD  Vo)
L ton
#
= VoR + 12
 V
o( 1D 1)
L ton
 
= VoR + 12
 V
o( 1D 1)
L D T
 
= VoR + 12
 V
o(1 D)
L T
 
= Vo
 1
R +
(1 D)
2Lf
 
24
Likewise, Equation 3.11 can be simpli ed in a similar fashion.
Iomin = VoR + 12
 
 VoL (1 D) T
 
= VoR + 12
 
 Vo(1 D)L T
 
= Vo
 1
R 
(1 D)
2Lf
 
The obvious boundary condition for the buck converter to remain in CCM is Iomin = 0. This
can be seen graphically in Figure 3.3b. In the majority of converter designs, the input and
output voltage as well as the load resistance will be speci ed. From this, it is possible to
solve for a critical inductance value, Lc, to keep a buck converter operating at switching
frequency, f, in continuous current mode.
Iomin = 0 =  IL +  iLoff2 (3.12)
= Vo
 1
R 
(1 D)
2Lcf
 
(3.13)
The critical inductance in Equation 3.13 can be solved for as a function of converter switching
frequency, f.
Lc = (1 D)R2f (3.14)
Inductors are inherently large and lossy components, traits undesirable in power conversion
processes. Thus, it is preferable to minimize the required inductance as much as possible.
Equation 3.14 illustrates the relationship between critical inductance, duty cycle, load re-
sistance, and frequency. From a practical design perspective, switching frequency is often
the only variable that can be arbitrarily chosen. The duty cycle depends on the conversion
ratio of output to input voltage. The resistance is dependent on the load requirements and
will often vary depending on the activity of the load. Increasing the switching frequency
25
will reduce the inductance necessary to remain in continuous current mode. However, high
frequency losses within the core and windings as well as switching losses will increase with
operating frequency. High performance loads such as modern processors often require stable
input current levels. This stipulation is much more strict than simply keeping a converter in
CCM. Consequently, a central goal in converter design is minimizing current ripple. From
Equation 3.6, the required inductance for maintaining a maximum current ripple,  I, is
given as
Lmin = D(Vin Vo)f I
max
(3.15)
In addition to low input current ripple, modern processors also demand a rapid transient
response ability of the power supply. In other words, they require the ability to quickly
switch between an idle state and a full-load state while maintaining the appropriate load
voltage, Vo. The transient response recovery time, Ttrr, is the worst case slew rate for a
converter. Worst case in this sense implies a switch from an idle state of 0 A to a full load
state of Ipk A.
Ttrr = LIpkV
o
(3.16)
From Equations 3.15 and 3.16, a design trade-o becomes overt. A minimum inductance is
necessary to satisfy rigorous load demands. However, transient capabilities are undermined
by this increase in inductance. Increasing the switching frequency will reduce the minimum
inductance and the Ttrr concurrently. However, this method results in higher core losses and
increased AC resistance through the windings.
3.1.3 Multi-Phase Architecture
Multi-phase buck converter implementations provide numerous bene ts over single phase
designs. Ohmic losses in single phase buck converters become unacceptable at high current
levels. Dividing the current load among multiple phases allows each individual phase to
operate more e ciently.
26
Figure 3.4: Multi-phase buck converter with two phases
Perhaps the most valuable aspect of a multi-phase implementation is its e ect on current
ripple and transient response time. For a given switching frequency, increasing the induc-
tance will increase the transient response time of the system. However, a multi-phase buck
implementation can reduce the necessary inductance for a given ripple level and in doing so,
reduce the transient response recovery time. This is achieved through running multiple buck
converters in parallel with equivalent time spacing in between phase switching. This has the
e ect of adding the individual ripple components out of phase. In doing so, the e ective
ripple current is reduced.
27
To illustrate this point, consider a three phase synchronous 12-1 V buck converter. The
system must supply 36 A at 1 V with a maximum allowable ripple current of 3 percent.
Performing this with a single phase converter presents two problems. The  rst problem
is that of excessive copper losses. Designing an e cient buck converter to supply over 25
A is nearly impossible without the use of expensive techniques such as copper plating. In
addition, a maximum current ripple of three percent is di cult to achieve while maintaining
acceptable transient properties. To mitigate these problems, a multi-phase buck converter
with three phases can be used.
Figure 3.5: Comparison between single-phase and multi-phase buck converters
28
To minimize the current ripple, each phase should switch at evenly spaced intervals
within the switching period. Figure 3.5 depicts how the phases are spaced over a period.
Depending on the number of phases in the system, an appropriate phase delay is applied
to each phase preventing the current ripple from adding constructively. This e ectively
reduces the overall current ripple of the system. A single phase implementation with a 10
percent ripple is presented as a benchmark. In this particular example, the multi-phase
buck converter with three phases each having a 10 percent ripple current contributed to a
total converter ripple current of only 2.74 percent. In general, the multi-phase ripple current
percentage will be that of each individual phase divided by the number of phases.
% ripple phase ripple %# of phases (3.17)
Equation 3.17 works under the assumption that the phases are optimally spaced. The
transient response of the multi-phase buck converter will improve as a result of the reduced
inductance. For a system with N phases, the minimum inductance per phase can be reduced
by a factor of N and still meet the desirable ripple current. Furthermore, from Equation 3.16,
the transient response recovery time will decrease by a factor of N.
3.2 Buck Converter Integration and Initial Testing
In many ways, the most challenging aspect of developing a planar inductor for use in
buck converters is the testing methodology. The designer has two broad categories of testing
available: integrated and stand-alone. In addition, empirical and numerical methods should
be utilized to minimize the amount of hardware testing. The buck converter being developed
had speci cations outlined in Table 3.1.
29
Parameter Value
Output Voltage 1 V
Input Voltage 12 V
Output Current 12 - 25 A
Output Ripple Current 15 %
Switching Frequency 100 - 500 kHz
Table 3.1: Buck converter speci cations
3.2.1 Testing Strategy
Although printed circuit board technology o ers a variety of bene ts, the cost and turn-
time associated with prototyping are distinct drawbacks. The buck converter being developed
underwent multiple board iterations over relatively short periods of time. Integrating a
planar inductor into each of these board designs would be time and cost preventative under
most budgets. Consequently, a testing strategy was developed that sacri ced performance for
modularity. Eight di erent winding structures were considered for use in the buck converter.
The developed system relies on "swappable" boards to get fast and consistent experimental
results. The testing strategy involves connecting the buck converter to swappable inductor
cards as shown in Figure 3.6.
Figure 3.6: Swappable inductor board concept
30
The use of these cards allows may inductors to be considered. Eight di erent inductor
boards with varying winding strategies and cores were designed. Figure 3.7 shows the various
breakout boards. The boards were designed for use with four di erent core geometries,
shown in Figure 3.8 [20],[21],[22]. For each geometry, one and two turn implementations
were developed. This strategy allows for arbitrary creation of a variety of inductors, all
possessing di erent characteristics.
Figure 3.7: Inductor breakout boards. Cores: E18 (top left), E22 (top right), ER18 (bottom
left) ER23 (bottom right)
(a) E18 geometry (b) E22 geometry (c) ER18 geometry (d) ER23 geometry
Figure 3.8: Ferroxcuber planar core diagrams
31
Mounting
The contacts used to interface between the buck converter and inductor breakout board
were not able to be mounted directly. Interface pins were necessary to connect the two
boards; this is shown in Figure 3.9. Although these connections contribute a fair amount
of DC resistance to the inductor structure, the added resistance will be consistent across all
testing. Thus, when comparing the various inductors tested in this way, the properties of
the inductor can be extrapolated. Another non-ideal consequence of this testing method was
the introduction of a loop through the mounting bars. This additional loop seemed to cause
a small amount of current ripple in addition to what was expected from the buck converter
design.
Figure 3.9: Inductor mounting strategy
Gapping
The ability to achieve and control the inductance of a planar magnetic structure is
paramount in power electronic applications. The inductance of planar ferrite core inductors
is determined by the number of turns, the core material and the air gap, with the latter
32
being the most critical. Various methods are available for achieving a certain air gap width.
The most accurate gap widths are custom cut by the manufacturer or a third party vendor.
For high performance and mass production applications where parameter control is critical,
machining is the preferable gapping method. For prototyping and iterative design situations,
the cost associated with machine gapping makes the method impractical. A cheaper but still
relatively accurate method for gapping is the use of a spacer. Shim stock plastic is a low-
cost material that comes in a plethora of thicknesses making it ideal for ferrite gapping. Its
relative permeability,  r, is approximately one, giving it identical magnetic properties to that
of air. A couple of factors must be considered if using sheet plastic as a gapping material.
Some  exibility as to where the gap can be located is lost when using plastic  llers. A single
gap in the middle post is not possible with this strategy. Instead, the gap must extend across
all three legs of the core. A comparison between the gap types is illustrated in Figure 3.10.
It should be noted that the width of the distributed gap in Figure 3.10b is half the width of
the machined middle leg gap in Figure 3.10a. However, the e ective reluctance of the cores
will be identical.
(a) Machined middle leg gap with air  ll (b) Distributed gap with a plastic  ller
Figure 3.10: Types of gaps for ferrite cores
Another consideration when utilizing plastic  llers is the core assembly pressure. Ma-
chined cores generally have clamps that apply the proper amount of pressure for a seamless
and consistent reluctance path; an example is shown in Figure 3.11a. Cores that do not have
custom gaps often have no clamp for holding the two pieces together. The core requires a
certain amount of holding pressure outlined by the manufacturer to ensure the speci cations
33
are met. There are a couple ways achieve the proper holding pressure for unmachined cores,
with none of them being perfect. Many sources suggest employing an adhesive between the
core halves. Although this provides su cient holding pressure, the exact width of the gap
becomes unpredictable with the added adhesive. Additionally, this method makes removing
the cores a laborious if not impossible task. The approach taken in this research was to
simply tape the cores together very tightly. If done correctly, the pressure applied by the
tape is su cient to maintain a consistent reluctance path throughout the core. An example
of a taped core is shown in Figure 3.11b.
(a) Core pressure applied by metal clip (b) Core pressure applied by tape
Figure 3.11: Methods for applying appropriate core holding pressure
Testing Setup
The performance of each inductor was characterized by the e ciency of the overall
buck converter. The losses due to the various components of the buck converter were well-
documented through simulation and experimental results. Consequently, the performance of
various inductors could be characterized indirectly by observing changes in buck converter
e ciency. A complete and comprehensive analysis of a buck converters performance neces-
sitates the collection of e ciency data over a wide range of switching frequencies and load
currents. To expedite this collection process, an automated tester was developed to sweep a
speci ed range of operating conditions and record e ciency data.
34
(a) Overall test setup (b) Carrier Board
(c) Electronic load board (d) Graphical user interface
Figure 3.12: Buck converter test setup
The automated tester was comprised of four primary components. The system in its
entirety is shown in Figure 3.12a. Various power supplies are used to provide the input
power to the buck converter as well as auxiliary power to the control circuitry. The carrier
board, shown in Figure 3.12b, interfaces up to  ve buck converter phases with the control
circuitry. The electronic load board, shown in Figure 3.12c, dynamically controls the load
current. To verify the the current being drawn by the load, two independent methods are
employed to ensure accuracy. The sense resistors and hall-e ect current sensor are outlined
35
in Figure 3.12a. A simple GUI, pictured in Figure 3.12d, was created to allow the user to
specify sweep ranges for operating frequency as well as output current.
3.2.2 Inductance Design
Achieving a precise inductance when building an inductor by hand can be very challeng-
ing. The core geometries available for planar magnetics are not conducive to determining
what the inductance of a structure will be through a closed-form expression. Most of the
closed for expressions for determining the inductance of a structure are suitable only for sim-
ple geometries (i.e., loops, squares, etc.). When considering inductors with multiple turns,
 at traces, and unusual geometries, a precise determination of the inductance of a structure
is often a di cult problem. Fortunately, core manufactures provide empirical data to assist
the designer in achieving a target inductance. Core saturation is an additional factor that
must be considered when developing  lter inductors. Saturation can be de ned in two ways.
Graphically, it is de ned as the point in the B-H curve where the slope is zero or the point
at which the B-H curve becomes nonlinear. The latter de nition is often referred to as soft
saturation.
The inductance of a planar magnetic structure is controlled by three factors: the core
material and geometry, the number of turns and the gap width. The ferrite core materials
designed for power electronics all have similar material permeability. Thus, the volume of the
core heavily dictates the available inductance. The number of turns has the largest e ect on
the inductance. However, an optimal inductor design will use a minimum number of turns to
reduce the winding resistance as much as possible. The gap width also has a large in uence
on the inductance. Further, the gap width in conjunction with the number of turns must be
optimized to prevent the core from saturating. The inductance factor is an empirical value
provided by the core manufacturer to quickly determine the inductance of a structure. The
total inductance of a magnetic structure can be determined by multiplying the inductance
factor, AL by the number of turns squared, N2.
36
Gap Width Determination
Manipulating the magnetic component?s inductance through gap width variation is con-
ducive to quickly prototyping and testing inductors. The windings often associated with
planar magnetics are located on PCB substrates, making them di cult to change quickly.
However, the spacer method of inductor gapping discussed previously provides a quick and
simple way to vary the inductance of a planar component. Core manufacturers provide
empirical data that assists with achieving a certain inductance by altering the gap width.
Figure 3.13: Relationship between gap width, inductance factor, and inductance tolerance
Figure 3.13 illustrates some of the key points regarding the gap width of an inductor.
The ability to precisely control the inductance is inversely related to the gap width. In other
words, the ability to form a precise inductance is more di cult as the gap is made smaller.
37
This is a consequence of permeability variations within the core material. The relationship
between e ective permeability and relative permeability is given as
 eff =  c1 + 
c 
lg
lc
(3.18)
where  c is the relative permeability of the core, lg is the gap width and lc is the e ective
length of the core. As the ratio of lglc gets smaller, variations of the core permeability are
ampli ed. This point is illustrated by the green curve in Figure 3.13.
3.3 E ciency Results
E ciency data was collected on around 50 planar inductor variations that translated
into thousands of data points and e ciency curves. For brevity, a couple of inductors that
form a representative sample are presented here for comparison.
Figure 3.14: Buck Converter V4.1 E ciency comparison - 3A
38
Figure 3.15: Buck Converter V4.1 E ciency comparison - 10A
Figure 3.16: Buck Converter V4.1 E ciency comparison - 16A
39
Figure 3.17: Buck Converter V4.1 E ciency comparison - 22A
Figure 3.18: Buck Converter V4.1 E ciency comparison - 120kHz
40
Figure 3.19: Buck Converter V4.1 E ciency comparison - 200kHz
Figure 3.20: Buck Converter V4.1 E ciency comparison - 360kHz
41
Figure 3.21: Buck Converter V4.1 E ciency comparison - 500kHz
Figure 3.14 depicts a critical pitfall of not providing enough inductance for a given
design. The red trace represents the e ciency of a 1-turn inductor providing about 247 nH.
This inductor has an extremely low e ciency measurement at low switching frequencies.
This is a result of the large ripple current forcing the converter into DCM, as discussed
in Section 3.1.2. Since the load current in this case is so low, the ripple inductance must
also be very small to avoid being pushed into DCM. As the switching frequency increases,
the e ciency increases as a result of a smaller ripple current. This point can be further
emphasized by observing the next largest inductances represented by the green and teal
lines. Both of these inductors have a slightly larger inductance than the  rst one, but still
not enough to avoid DCM completely. In contrast, the inductors represented by the blue and
purple lines provide about 2  H of inductance and operate in CCM over the entire frequency
range.
42
Figures 3.15 - 3.17 depict the same inductors at progressively higher load currents. Some
additional insight can be extracted by observing this progression. First, as the load current
increases, a larger ripple current is required to force the converter into saturation. Hence,
the low frequency e ciency results for the 250 nH inductor are not as bad. Second, the
e ciency of the inductors operating in CCM decreases due to additional ohmic losses. This
point is clearly illustrated by observing the ER18, 2 turn inductor. It provided the highest
e ciency when operating at lower loads; however, its e ciency dropped o more quickly
than the others since it had the highest DC resistance of the compared inductors.
Figures 3.18 - 3.21 depict e ciency for the same four inductors plotted vs load instead
of frequency; the same characteristics can be viewed from another angle. Another limiting
factor can be faintly seen in Figure 3.18. The ER18, 2 turn inductor, in addition to having
a higher DCR, also exhibits core saturation at the higher load currents. The curve begins
to slope downward around 20 A, indicating the core may be slightly saturation.
43
Chapter 4
Finite-Element Modeling and Analysis
4.1 Overview
Design and analysis of magnetic components becomes increasingly di cult as the struc-
ture increases in complexity. This level of complexity is often unavoidable when developing
PCB-based magnetic components [23]. The principal reasoning for the complexity is the
winding structure. Multiple layers are necessary in nearly all cases to satisfy component loss
constraints [24]. Consequently, an intricate method of interconnecting the various layers is
often required. In most cases, this introduces a signi cant level of complexity when com-
pared to common surface mount inductors such as a toroid - which has very well established
closed form solutions for loss, inductance, etc.
The  nite-element method (FEM) is a popular numerical technique for approximating
solutions to di erential equations with well-de ned boundary conditions [25]. Maxwellr
software developed by the Ansoft Corporation is a popular FEM suite utilized primarily for
low frequency electromagnetics. The advent and widespread availability of high performance
computers have made this technology accessible to most designers. This type of analysis is
often employed when designing arbitrary electromagnetic structures. It uses simple varia-
tional calculus methods to minimize an error function until a speci ed error level is reached
[26].
4.1.1 Mesh Operations
The most basic mechanics of an FEM solver involve partitioning the structure into a
collection of tetrahedral elements (often referred to simply as elements). Modeling can be
performed in 2D as well as 3D, with the latter requiring considerably greater computational
44
power. Figure 4.1a shows an inductor modeled in 2D with its associated mesh shown in
Figure 4.1b. The general tetrahedral shape is reduced to triangles for the 2-dimensional
case. It should be noted that the elements within the core (red) and the traces (green) are
considerably smaller than the elements found outside the core. This provides more resolution
in areas of the design that are critical to component performance. Modeling a component in
2D is often insu cient when modeling components that do not posses a signi cant degree
of symmetry. Furthermore, a 2D model will often convey inaccurate results since it lacks so
much information about the rest of the structure [27].
(a) Gapped inductor modeled in 2-D (b) 2-D mesh - triangles
(c) Coupled inductor modeled in 3-D (d) 3-D mesh - tetrahedral
Figure 4.1: Examples of mesh grids in 2D and 3D solvers
45
A 3D modeling scheme, although more computationally intensive, delivers information
about the entire structure rather than just a cross section. A 3D coupled inductor model is
shown in Figure 4.1c along with its corresponding mesh grid shown in Figure 4.1d. When
modeling in 3D, the meshing algorithm becomes more complicated since multiple dimensions
of the tetrahedral elements must be considered. The trade-o between size, accuracy and
required computing power is much more important in 3D modeling [23]. Maxwell 3D pos-
sesses an engine to adaptively assign mesh patterns to a structure based on desired values
of maximum and minimum lengths and widths. Since the mesh elements are inherently re-
stricted to linear tetrahedrals, the algorithm used to describe curved and spherical surfaces
to the solver is critical. The mesh engine provided by Maxwell 3D will iteratively assign a
mesh pattern to the structure, as shown in Figure 4.2b, until an acceptable approximation
is found based on the tolerated amount of error depicted in Figure 4.2a.
(a) Diagram of surface errors resulting
from mesh operations (b) Adaptive mesh operations
Figure 4.2: Mesh operation on rounded surfaces
4.1.2 FEM Solvers
Maxwell 3D o ers a variety of  eld solvers tailored to various situations. These four
solvers are summarized below:
1. Magnetostatic - This solver computes the static (DC) magnetic  elds due to DC
current in conductors, permanent magnets, and static magnetic  elds represented by
boundary conditions. The quantity solved for is the magnetic  eld strength, H; current
46
density (J) and magnetic  ux density (B) are automatically calculated from the mag-
netic  eld. Derived quantities such as energy and inductance can also be calculated.
2. Eddy Current Analysis - This solver computes the steady-state, time-varying (AC)
magnetic  elds at a given frequency, thus making this a frequency domain solution.
The source of the magnetic  elds can be a sinusoidal AC current sources as well as
time-varying magnetic  elds enforced as boundary conditions. The quantities solved for
are magnetic  eld (H) and magnetic scalar potential ( ). Similar to the magnetostatic
solver, quantities such as current density (J), magnetic  ux density (B), and inductance
(L) can be solved for as well. One limitation of this solver is its inability to handle
nonlinear magnetic materials.
3. Transient Analysis - This time domain solver computes the magnetic  elds within
the structure at discrete time steps. The solver formula utilizes the current vector
potential in solid conductors as well as the scalar potential over the entire solution
window. Excitation sources can take the form of arbitrary time-varying current within
the conductors and permanent magnets. Magnetic  eld (H) and current density (J)
are solved for initially and in turn used to  nd other quantities such as power loss and
 ux linkage.
4. Electrostatic - This solver computes the static (DC) electric  elds. The possible
sources of the static electric  elds are applied potentials and charge distributions. The
quantity solved for in this analysis is electric scalar potential ( ). In turn, the electric
 eld (E), electric  ux density (D) are automatically calculated. Derived quantities
such as capacitance and energy can be found from the basic  eld quantities.
For design and analysis of an inductor, the current density and  ux density are the most
pertinent pieces of information. Consequently, the magnetostatic and eddy current solvers
were utilized for the analysis of the planar inductor. Since the inductor current will be a
47
small AC component superimposed on a larger DC component, these two solvers provided
su cient information for determining the  ux density and current distribution.
Magnetostatic Solver
The magnetostatic solver provides a tool to calculate the  ux density due to the DC
component of the current. Filter inductors used in buck converter applications often possess
a large DC current component, making this analysis all the more important. The solver
computes the magnetic  eld in a two step process. The conductors (perfect and non-perfect)
are  rst analysed to determine the current density, J. The current density in a conductor is
proportional to the potential di erence as expressed in Equation 4.1.
J =  E =   r (4.1)
Given an arbitrary volume, V, the current  ow out of the volume must equal the net change
in charge within the volume.
 
S
J dA = ddt
 
V
 dV = 
 
V
@ 
@tdV (4.2)
The surface, S, encloses the volume, V, with charge density,  . From the divergence theorem,
the  rst term in 4.2 can be expressed as a divergence.
 
S
J dA =
 
V
rJ dV (4.3)
From Equations 4.2 - 4.3, the continuity equation can be found as
 
V
r JdV = 
 
V
@ 
@tdV (4.4)
48
This relationship holds for any volume regardless of size, shape, or location. Thus, the
integration over the volume is arbitrary and can be dropped for simpli cation.
r J = @ @t (4.5)
Since the magnetostatic solver only analyzes the DC component of the current, the charge
density within a given region will not vary with time. Equivalently,
r J = @ @t = 0 (4.6)
Combining the result in Equation 4.6 with Equation 4.1, a solution can be obtained in terms
of electric potential,  .
r (  r ) = 0 (4.7)
Once the current density is computed, the static magnetic  elds can be calculated utilizing
a system of equations derived from Gauss? law for magnetism and Ampere?s law.
 
@ 
B dS = 0 (4.8)
r B =  
 
J + @E@t
 
(4.9)
In a similar fashion to Equation 4.6, the time varying term in Equation 4.9 can be set to
zero in the magnetostatic case.
r B =  J (4.10)
Once a solution for the magnetic  eld has been found, a variety of parameters including
energy storage and inductance can be computed.
U = 12LI2 = 12
 
V
H BdV (4.11)
49
L = 1I2
 
V
H BdV (4.12)
Eddy Current Analysis
The AC component of the current waveform was analyzed using the eddy current analy-
sis tool within Maxwell 3D. This solver treats all values as phasors, precluding the inclusion
of the DC component within the analysis. The solver will determine the eddy currents in
all conductors. In the initial steps of the analysis, the magnetic  eld strength, H, is calcu-
lated based on the speci ed AC current sources and boundary conditions. Since the eddy
current solver produces a frequency domain solution, it is convenient to express the relevant
equations in terms of phasors. Ampere?s law with a slight modi cation can be expressed in
phasor form by:
r B =  
 
J + @E@t
 
(4.13)
=  
 
 E + @@tE
 
(4.14)
=  ( +j! )E (4.15)
Equivalently, Faraday?s law can be expressed in phasor form by:
r E = @B@t (4.16)
= j!B (4.17)
Solving for the electric  eld, E, in Equation 4.15 and combining with Equation 4.17 yields:
r 
 1
( +j! ) r B
 
= j!B (4.18)
50
In terms of magnetic  eld, H, Equation 4.18 becomes:
r 
 1
 +j! r H
 
= j! H (4.19)
Once the magnetic  eld has been determined, the AC magnetic  eld energy can be found
as:
UAvg = 14
 
V
B H dV (4.20)
The skin e ect is calculated for currents induced throughout the structure according to:
 =
r 2
!  0 r (4.21)
The current density, J, is determined by means of the skin e ect at various points throughout
the conductor as well as the calculated magnetic  eld. The power loss in the conductors can
in turn be calcuated as:
P =
 
V
J J 
2 dV (4.22)
The overall resistance of the structure can be determined using the power loss found in
Equation 4.22 and the RMS current by:
R = PI2
RMS
=
1
2 
 
V J J
 dV
I2RMS =
 
V J J
 dV
 I2peak (4.23)
Although the eddy current solver only provides information on the AC component of
the current, these results can be combined with the analysis of the DC component in the
magnetostatic solver to form a total solution. This method of analysis proved very practical
to determine which current component caused limitations in various aspects of the design.
51
4.2 Planar Inductor Analysis
By utilizing the magnetostatic solver in conjunction with the eddy current solver, all
pertinent information regarding the properties of the  lter inductor in buck converter con-
 guration can be studied. The most common problems associated with  lter inductors in
buck con gurations seem to be core saturation and current distribution. Core saturation is
most easily studied with the magnetostatic solver since it depends mostly on the DC current
component. Although, if the AC current component is large enough, the core could be forced
into saturation due to the  ux swing. A typical  lter inductor hysteresis loop can be found
in Figure 2.4c. The eddy current solver is necessary to determine the current distribution
throughout the traces. The unequal current distribution in an application such as this often
results from fringing  elds near the inductor gap.
Simulation within the Maxwell environment can be performed in 2-D and 3-D. The
complexity of the inductor being analyzed precludes the use of a 2-D simulation since it
requires a large degree of symmetry. The inductor chosen through testing to be integrated
into the buck converter had two turns and was  tted to an ER18 core geometry. The choice
was based on an estimated operating output current for each individual buck converter phase
of 12 A. A ten layer board was selected to provide enough copper area for an acceptable
resistance level. An overview of the model is shown in Figure 4.3. The dielectric (FR-4) was
omitted from the model since it has a permeability roughly equivalent to air; thus, it would
not have any great e ect on the characteristics being studied. An interleaving structure was
utilized to reduce inter-winding capacitance as discussed in [7], [28]. Due to the high cost of
producing a ten layer board with an embedded inductor, an over-arching goal of the design
was to ensure the component had a large degree of versatility. In other words, the design
was aimed at providing a wide range of inductances and saturation points through gap and
material manipulation only. Furthermore, the window utilization factor was kept relatively
low, allowing the windings to be placed at slightly di erent locations relative to the core and
the gap. This point is illustrated in Figure 4.4.
52
Figure 4.3: 3D inductor structure
(a) Windings positioned at the bottom of the
core
(b) Windings positioned near the gap of the core
at the top
Figure 4.4: Various winding locations within the core window
The analysis presented in the following sections outlines four distinct structure orienta-
tions. The winding structure is held constant across each model while the gap width, gap
location, and winding location are manipulated. The purpose of this analysis method is to
determine how each variable a ects the current distribution as well as the core  ux density.
For the magnetostatic analysis, all analysis was performed with a DC current of 12 A.
This value was chosen as a result of the peak performance level of the overall buck converter,
53
determined through extensive experimental testing. Empirical formulas describing the  ux
density within a core indicated the ER18 core geometries would be suitable at these current
levels.
(a) Filter inductor current (b) Filter inductor current - AC component
(c) Filter inductor current - Frequency spectrum
Figure 4.5: AC component extraction and frequency response
Characterizing the AC component of the inductor current is slightly more di cult due
to the nature of the waveform. Since the eddy current solver is a frequency domain solution,
it provides solutions in discrete frequency steps. The current waveform through the inductor
is a saw-tooth wave with a DC o set as shown in Figure 4.5a. Since waveforms of arbitrary
frequency content cannot be de ned within the Maxwell eddy current solver environment,
54
analysis must be performed at individual frequencies. Clearly, since the eddy current solver
does not consider DC, the e ective waveform being studied was the AC component of the
 lter inductor current, shown in Figure 4.5b. The frequency spectrum of the AC component
is illustrated in Figure 4.5c. Clearly, the majority of the energy is present within the funda-
mental frequency of 150 kHz. However, signi cant frequency content exists in the harmonics
of the switching frequency. The frequency content of a typical buck converter current wave-
form was investigated in [4] with the conclusion that the  rst three harmonics are signi cant;
as such, these components were investigated with eddy current analysis.
Four inductor con gurations were analyzed within Maxwell; all inductors utilized a two
turn winding structure designed to work with a Ferroxcube ER18 geometry. Preliminary
testing indicated the most suitable material for this particular application was the Ferroxcube
3C96. With all else being equal, the inductance and  ux density were controlled entirely
by the gap width. The manufacturer provides some experimental data for estimating the
inductance of a given structure. Thus, extrapolation by curve  tting was used to get an
approximate inductance and  ux density for the various designs. Plots of empirical data
along with curve  ts are shown in Figure 4.6.
(a) ER18 2-turn inductance (b) ER18 2-turn magnetic  ux density
Figure 4.6: Curve  t parameters for Ferroxcube ER18 3C96 2-turn inductor
55
The desired inductance for the magnetic component was between 1 and 1.5  H. Con-
sequently, the analysis performed utilizes gap widths of 2 and 3 mils. The saturation  ux
density for Ferroxcube?s material 3C96 is 500 mT. The empirical estimation of  ux density
shown in Figure 4.6b indicates that the cores should not reach saturation.
4.2.1 Inductor #1
The  rst inductor con guration investigated had a 2 mil distributed gap with the wind-
ings placed in the lower region of the core away from the gap. A 3D model view of this
con guration is shown in Figure 4.7. The gap width is 2 mils through each leg of the core.
This con guration was estimated to provide about 1.5  H; this can be veri ed by observing
Figure 4.6a. The maximum  ux density was estimated to be 360 mT as seen in Figure 4.6b.
Figure 4.7: Inductor with 2 mil distributed gap and bottom winding orientation
56
Figure 4.8: Magnetic  ux density [mT] through the cross section of the core
The chief advantage of investigating  ux density with a 3D FEM model is the localized
information it provides. The 1-D empirical calculation is only able to o er a predicted
average  ux density. However, as can be seen in Figure 4.8, the actual  ux density varies
greatly throughout the core. By observing the center leg, it should be clear that the  ux
straddles the border of the core closest to the windings. The reason for this is simple. In a
similar fashion to electric current and resistance, the magnetic  ux density will be higher in
paths with a lower reluctance. Several areas of the core, particularly in the corners, contain
very little of the total core  ux. The loop surrounding the core window, in contrast, possesses
regions of  ux density between 300 and 700 mT. The large  ux di erential throughout the
core will lead to a relatively soft saturation, since di erent areas of the core will become
saturated at di erent current levels.
The eddy current solver helps visualize current imbalances throughout the windings. As
mentioned previously, the fundamental switching frequency will be analyzed as well as the
 rst two harmonics (300 kHz & 450 kHz). In addition, the current density at 60 Hz will be
studied as a reference; given the thickness of the windings, the results obtained at 60 Hz will
be approximately equivalent to the DC characteristics.
57
(a) Current density on top trace - 60 Hz (b) Current density on top trace - 150 kHz
(c) Current density on top trace - 300 kHz (d) Current density on top trace - 450 kHz
Figure 4.9: Current density of  rst 3 harmonics and DC (60Hz)
As illustrated in Figure 4.9a, the current distribution at DC (60Hz) is relatively uniform.
The slight imbalance is due solely to the resistance di erential between the inside and outside
of the trace. At 150 kHz, the current become sightly imbalanced, as shown in Figure 4.9b.
The current imbalance continues to increase in the cases of 300 kHz and 450 kHz. The most
severe current "hot spots" occur near the legs of the core. From this, it can be concluded
that the majority of the current imbalance is the result of fringing  elds near the gap.
58
(a) Current density cross-section - 60 Hz (b) Current density cross-section - 150 kHz
(c) Current density cross-section - 300 kHz (d) Current density cross-section - 450 kHz
Figure 4.10: Current density viewed as cross-section of  rst 3 harmonics and DC (60Hz)
The cross-sectional view of the traces deliver more insight into the nature of the current
imbalance. The edges of the traces have a higher current density than the middle. However,
it is also clear from the cross-sectional plots shown in Figure 4.10 that the traces closer to
the gap experience a larger current imbalance. Referring back to Figures 2.2c - 2.2d, it is
clear the shape of the current distribution  ts the shape of the fringe  elds present in the gap
region. Similar to the view in Figure 4.9, the imbalance intensi es with increasing frequency.
4.2.2 Inductor #2
The only change made to the inductor characterized previously involved the position of
the windings relative to the gap. The windings were placed in close proximity to the gap, in
59
the middle of the core. The gap remained at 2 mils. A diagram of the inductor is shown in
Figure
Figure 4.11: Inductor with 2 mil distributed gap and central winding orientation
Figure 4.12: Magnetic  ux density [mT] through the cross section of the core
Assuming all of the  ux remains within the core, which is usually a reasonable ap-
proximation, the magnetic  ux density should not depend on the location of the current
60
producing the  ux. This point is illustrated by observing Figures 4.8 and 4.12. The  ux
density through the inductors with di erent winding locations is roughly the same.
(a) Current density on top trace - 60 Hz (b) Current density on top trace - 150 kHz
(c) Current density on top trace - 300 kHz (d) Current density on top trace - 450 kHz
Figure 4.13: Current density of  rst 3 harmonics and DC (60Hz)
The current density of the top copper winding is shown in Figure 4.13 for DC and the
 rst three harmonics. The current imbalance in this case appears to be less severe than the
previous case. However, a closer inspection will indicate that this layer is carrying about
25% less current overall than the same layer in the previous example. The reason for this
has to do with the proximity of the winding being viewed to the core gap.
61
(a) Current density cross-section - 60 Hz (b) Current density cross-section - 150 kHz
(c) Current density cross-section - 300 kHz (d) Current density cross-section - 450 kHz
Figure 4.14: Current density viewed as cross-section of  rst 3 harmonics and DC (60Hz)
The cross-sectional view of the current distribution indicates the layers in which the
current crowding is most severe. Much like the previous case, the current imbalance closely
aligns the shape of the fringing  ux  elds protruding from the gap region. However, in
this case, the top layer is further from the gap, meaning it will carry less current than the
traces in close proximity to the gap. This phenomenon can be seen clearly in Figures 4.14b -
4.14d. A signi cant amount of research has gone into the optimal placement of the windings
in relation to the gap. For the most part, the consensus remains that the two should be
separated as much as possible. The most e cient way to accomplish a suitable spacing is
by moving the gap to the top of the legs. Unfortunately, the core selected for this work is
not constructed in this way. To alleviate this, another approach has been taken that alters
the shape of the windings to reduce the AC resistance [7].
62
4.2.3 Inductor #3
The third inductor investigated, shown in Figure 4.15, had an identical winding location
to the  rst, but the size of the gap was increased by 1 mil. By observing Figures 4.6a and
4.6b, it can be seen that the result of increasing the gap width is lower inductance as well
as lower  ux density. For a gap of 3 mils, the inductance is estimated as about 1.1  H. The
peak  ux density should be reduced to about 250 mT.
Figure 4.15: Inductor with 3 mil distributed gap and central winding orientation
Figure 4.16: Magnetic  ux density [mT] through the cross section of the core
63
A diagram of magnetic  ux density throughout the core is illustrated in Figure 4.16.
The peak  ux density was found to be around 230 - 280 mT, lining up closely with the 1-D
approximation. When compared to the similar inductor with a 2 mil gap, it can be seen that
magnetic  ux is inversely proportional to gap width. This also agrees with the 1-D formula
de ning  ux through a material:
Bpk =  0NIpkg + lc
 r
(4.24)
where N is the number of turns, Ip is the peak current, g is the gap width, and lc is the
mean loop length of the core. The proportionality with the gap width occurs when
lc
 r <<g; (4.25)
which is most often the case when dealing with high-permeability ferrite materials. The
current distribution for the 3 mil gapped inductor was nearly identical to that of the 2 mil
gap. This result was intuitive since it has been established that winding location with respect
to the gap is the primary driver behind current imbalance.
4.2.4 Inductor #4
The  nal inductor investigated with FEM analysis was a single gapped version of the
 rst inductor. The gap was made twice as large (4 mils) and placed only on the middle leg.
The inductance provided by this structure will be identical to that of the  rst design since
the core reluctance, and hence, the e ective permeability of the core, will be identical to that
of the distributed 2 mil gapped inductor. A plot of the  ux density within the 4 mil central
gapped inductor is shown in Figure 4.18. Observing and comparing the  ux density of the 4
mil central leg gapped inductor with the 2 mil distributed gap inductor shown in Figure 4.8
illustrates the similar  ux characteristics. To further emphasize the equality between the
two gaping methods, a 6 mil central leg gapped inductor was analyzed with the magnetic
 ux density displayed in Figure 4.19.
64
Figure 4.17: Inductor with 4 mil central leg gap and lower winding orientation
Figure 4.18: Magnetic  ux density [mT] through the cross section of the core
Figure 4.19: Magnetic  ux density [mT] through the cross section of the core
65
The current distribution was investigated for the 4 mil inductor. The results can be
extended to the 6 mil inductor with a high degree of con dence. The current distribution
of the top trace is shown for DC and the  rst three harmonics in Figure 4.20. The current
distribution of this inductor design draws some stark contrasts with that of the previous
designs with distributed gaps.
(a) Current density top layer view - 60 Hz (b) Current density top layer view - 150 kHz
(c) Current density top layer view - 300 kHz (d) Current density top layer view - 450 kHz
Figure 4.20: Current density viewed as cross-section of  rst 3 harmonics and DC (60Hz)
The  rst di erence is the degree to which the current imbalance is occurring; with the
gap only in the middle leg, the current is signi cantly more balanced when compared to the
66
previous cases. In particular, the current crowding occurs only on the inner radius of the
winding. This is a direct result of the fringing  elds only a ecting the inside ring of the
windings. Thus, the current is more evenly spread through the remainder of trace. The
overall e ect of the increased current balance is a reduction in AC resistance. From this, it
can be concluded that a single central gap has a superior performance than a distributed gap
due to a lower AC resistance. Unfortunately, a single gap core of the appropriate geometry
and material was not available. From the FEM analysis, the next best design rule was to
keep the traces as far away from the gap as possible. This methodology was utilized when
developing the buck converter with integrated magnetics.
67
Chapter 5
Buck Converter E ciency Testing and Results
5.1 Board Design
In order to implement the planar inductor into the pre-existing buck converter, a variety
of design changes had to be made to the board. The most critical of these changes was
increasing the number of layers. A major drawback of planar magnetics is the lack of
available copper area; this problem is exacerbated when developing inductors for high current
applications. The maximum number of layers available in standard PCB processes is ten.
However, thicker two ounce copper was available for use on the outer layers, which made the
ten layer board equivalent to a 12 layer board with one ounce layers. Keeping the number of
layers no greater than ten was necessary to avoid cost prohibitive manufacturing processes
required for high layer-count boards.
5.1.1 Layout
The inductor design and board layout were performed in KiCad, an open-source schematic
editor and PCB layout tool. The shape of the inductor made the layout fairly di cult. Most
PCB layout editors are tailored for laying out linear traces shapes. The inductor being
designed was formed by a two turn loop, thus, conventional layout techniques could not
be used. Small linear segments were used to approximate the round circular traces of the
inductor windings. The ten layer board was made up of alternating signal and ground layers
for parasitic inductance reduction. However, the inductor made use of the ground layers
by inserting a cut-out in the layer. The top layer and bottom ground layer are shown in
Figures 5.1a and 5.1b, respectively.
68
(a) Top signal layer of buck converter
(b) Bottom ground layer of buck converter
Figure 5.1: Buck converter layout
Each of the two turns was made up of  ve parallel turns. An interleaving structure was
utilized to avoid inter-winding capacitance. The interleaving structure was a pattern of four
turn con gurations shown in Figure 5.2. The ground plane was altered in a fashion that
avoided interfering with any high frequency traces serving as switch turn-on and turn-o 
circuitry. The board cut-outs, denoted as yellow lines in Figures 5.2a - 5.2d, were di cult
to match precisely to the cut-out required by the core. Therefore, square approximations
were made to be as close to the required cutout as possible. Additionally, this method
kept board costs down, since arbitrary board cut-outs with lots of small angles are di cult
and expensive to produce. Since the planar could not be built as a discrete component,
the schematic needed to be modeled with the inductor as a short circuit. The e ect of
69
this is shown in Figure 5.2a, where the output of the switch is labeled as Vout due to the
inductor short. This change required extra care to be taken when laying out the inductor
and relocating the necessary components since many parts were now on the same net.
(a) Winding A - Layers 1,5,9 (b) Winding B - Layers 2,6,10
(c) Winding C - Layers 3,7 (d) Winding D - Layers 4,8
(e) Winding A & B superim-
posed
Figure 5.2: Various turn con gurations used to make 2-turn inductor
70
5.1.2 Assembly
The un-populated PCB is shown Figure 5.3. The thickness of the board was about 1.76
mm, which left about 1.5 mm of clearance between the board and the ferrite core. The board
was assembled with conventional soldering techniques for most components. However, the
driver, switch, and synchronous recti er are  ip-chip devices that required specialized assem-
bly techniques to ensure proper operation. These devices were placed utilizing a technique
developed and demonstrated in [29],[30]. This method makes use of an X-ray for device
alignment and a re- ow oven to cycle the solder through a speci c temperature pro le rec-
ommended by the manufacturer.
Figure 5.3: Un-populated  nal buck converter design with planar inductor
One critical mistake was discovered upon assembling the board. The free-wheeling diode
was not included in the V4.3 buck converter design. This omission can seriously degrade the
reliability of the synchronous recti er as well as the overall e ciency. The easiest solution
was determined to be bridging the switch node to the nearest ground plane, which happened
to be the ground terminal of the output  lter capacitors [31]. This remedy is portrayed
in Figure 5.4. Another mistake, albeit much more minor, was the size of the outside core
cut-outs. In previous testing, the core was able to be adhered at an appropriate pressure by
wrapping tape around both pieces. The size of the outer leg cut-outs prevented this method
of mounting the core. Thus, applying enough pressure to the core sides was much more
di cult with this board.
71
Figure 5.4: Labeled V4.3 buck converter with diode  x
5.2 E ciency Results
The e ciency of the buck converter was tested for a current range of 4 to 25 A and
a frequency range of 120 to 500 kHz. E ciency plots over frequency and load current are
shown in Figures 5.5 and 5.6, respectively.
Figure 5.5: E ciency data plotted over frequency
72
Figure 5.6: E ciency data plotted over load current
5.3 Comparison vs. Previous Designs
The e ciency improvements brought about by the integrated planar inductor were the
result of many factors. The  rst and most obvious improvement was the board integration
and elimination of the mounting bars. This reduced the DCR of the inductor by about 2 m .
Another obvious improvement was the addition of six layers to the design, which more than
halved the DCR of each turn. A more subtle change was the interleaving strategy and how
the terminals were established between the switch node and the output node. A comparison
of the buck converter V4.1 and V4.3 are shown in Figures 5.7 - 5.14. The teal line indicates
the buck convert V4.3 with the integrated planar inductor.
73
Figure 5.7: Buck Converter V4.3 E ciency improvement - 4A
Figure 5.8: Buck Converter V4.3 E ciency improvement - 10A
74
Figure 5.9: Buck Converter V4.3 E ciency improvement - 15A
Figure 5.10: Buck Converter V4.3 E ciency improvement - 18A
75
Figure 5.11: Buck Converter V4.3 E ciency improvement - 120kHz
Figure 5.12: Buck Converter V4.3 E ciency improvement - 200kHz
76
Figure 5.13: Buck Converter V4.3 E ciency improvement - 280kHz
Figure 5.14: Buck Converter V4.3 E ciency improvement - 340kHz
77
The e ciency improvements can be seen clearly for load currents greater than 10 A,
where losses due to DCR begin to get large compared to core loss. The V4.3 board has a
relatively constant e ciency over frequency since it has su cient inductance to remain out
of DCM and a low enough magnetic  ux density to avoid saturation.
5.4 Comparison vs. COTS Inductors
The planar inductor board V4.3 performed competitively with many high quality com-
mercial o -the-shelf (COTS) inductors. For illustration, two of the better COTS inductors
tested are compared directly to the planar inductor at a variety of load currents and fre-
quencies. These comparisons are illustrated in Figures 5.15 - 5.21.
Figure 5.15: Buck converter V4.3 e ciency vs. COTS inductors - 10A
78
Figure 5.16: Buck converter V4.3 e ciency vs. COTS inductors - 15A
Figure 5.17: Buck converter V4.3 e ciency vs. COTS inductors - 20A
79
Figure 5.18: Buck converter V4.3 e ciency vs. COTS inductors - 220kHz
Figure 5.19: Buck converter V4.3 e ciency vs. COTS inductors - 300kHz
80
Figure 5.20: Buck converter V4.3 e ciency vs. COTS inductors - 400kHz
Figure 5.21: Buck converter V4.3 e ciency vs. COTS inductors - 500kHz
81
The planar component is most competitive with the COTS inductors at low to mid load
current ranges. The reason being the 1.5 m DCR of the planar component compared to the
less than 1 m of the COTS components. This discrepancy can be mitigated through the
use of more layers and thicker copper. The planar inductors seem to have a slight advantage
at higher frequencies over the COTS inductors. This is most likely a result of the  at traces,
which are shaped optimally for high frequency operation. Overall, a buck converter being
run at low to mid output load currents and mid to high frequencies can bene t from the
planar magnetic technology. However, as load current increases, the DCR of the planar
component is simply to great to compete with the surface mount COTS inductors.
82
Chapter 6
Conclusion and Future Work
6.1 Summary
A planar inductor was developed and integrated with a 12-1 V DC-DC synchronous
buck converter. Further, the developed planar inductor was shown to perform comparably
with present state-of-the-art COTS power inductors. In many cases, the developed planar
inductor provided higher e ciency and a lower dependence on switching frequency when
compared to COTS inductors.
An extensive review of planar magnetic technology was outlined in Chapter 1. The
discussion of planar magnetic technology was restricted to power electronic applications with
an emphasis on low voltage, high current DC-DC buck converters. A survey of applications
which included data centers and high performance computing centers were discussed. The
various loss characteristics of an inductor were outlined in Chapter 2. Unlike transformers,
winding loss was shown to be the primary source of power loss within inductors. A typical
design procedure was presented and outline brie y. For purposes of simplicity and testing
speed, a method of quickly characterizing planar inductors was outlined in Chapter 3. Several
inductors utilizing a multitude of core geometries and materials were compared. Ferroxcube?s
ferrite material 3C96 was determined to be the optimal material for the buck converter
application at the selected switching frequency range. FEM analysis was shown to be an
invaluable tool for designing and characterizing inductors. This tool becomes even more
critical as the complexity of the winding structure increases. The  nal buck converter with
an integrated inductor was presented in Chapter 5. E ciency comparisons were illustrated
for the  nal planar inductor and two COTS inductors. The planar inductor was shown to
outperform the COTS inductors at low to mid load currents.
83
6.2 Future Work
Through development of the planar inductor, the principle loss mechanism was deter-
mined to be the winding resistance. This was comprised of DC and AC loss components. As
such, further measures should be taken to mitigate the winding loss of the inductor. Some
example of feasible approaches were discussed previously. The most promising approach for
this application is the shaped winding approach discussed in [24]. This method is especially
useful when working with middle gapped cores to reduce the AC winding resistance. Fur-
thermore, the techniques proposed in Chapter 4 to analyze the AC resistance of a structure
could be expanded upon.
84
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87
Appendix A
MATLAB Scripts
A.1 E ciency plotting script
1
2 %% Specify comparison name
3 compName = 'Buck Converter V4.3 Efficiency Improvement';
4 fileName = 'V4 3 Improve';
5 %% Specify Y Lim range for plots
6 YMIN = 65;
7 YMAX = 97;
8 %% Specify plot options
9
10 % Plot data markers?
11 dataMarkers = 'y';
12
13 % Save .FIG file?
14 FIGsave = 'n';
15
16 % Legend location
17 legLoc = 'SouthWest';
18 %% Cell Array of plot types
19 if dataMarkers == 'n'
20 plotStyle = f'  c' '  g' ' .b' ' r' '  m' ' b' ' k' ':r' ' y' ' g'...
21 '  b' ' c' ' y' ' m' ' k' ' b' ' r' ' k' ' g' ' c' ' y'...
22 ' r' ' g' ' b' ' k' ' c' ' m' ':m' ' b'g;
23 elseif dataMarkers == 'y'
24 plotStyle = f'  c?' '  go' ' .b*' ' r+' '  mx' ' bs' ' kd' ':r?'...
25 ' yv' ' g>' '  b<' ' cp' ' yx' ' mx' ' kx' ' bx' ' r*' ' ko' ...
26 ' g*' ' c+' ' yo' ' rh' ' gp' ' bd' ' ks' ' cs' ' mv' ':mh' ' bv'g;
27 else
28 error('Invalid dataMarkers specification...');
29 end
30 %% Make directory to store plots
31 wb = waitbar(0,'Setting up new directory...');
32 set(wb,'Position',[700 200 270 56.25])
33 mkdir(compName);
34 %% PLOT VS. LOAD
35
36 % Determine common frequencies
37 Lcount = length(L);
38 commF = L(1).freq start:L(1).freq step:L(1).freq stop;
39 for i=2:Lcount
88
40 bufferF = L(i).freq start:L(i).freq step:L(i).freq stop;
41 commF = intersect(commF,bufferF);
42 end
43
44 % Set up parameters for waitbar
45 stepTot = Lcount*length(commF);
46 step = 1/stepTot;
47 bar = 0;
48
49 % Cycle thru common frequencies
50 for i=1:length(commF)
51 fprintf('Plotting frequency %d kHznn',commF(i));
52 message = sprintf('Plotting frequency %s kHz',num2str(commF(i)));
53 waitbar(bar,wb,message);
54
55 % Assemble title and file strings
56 fid = strcat(fileName,num2str(commF(i)),'kHz');
57 if dataMarkers == 'n'
58 fidPNG = strcat(fileName,num2str(commF(i)),'kHz','.png');
59 fidPNG small = strcat(fileName,num2str(commF(i)),'kHz small','.png');
60 else
61 fidPNG = strcat(fileName,'Markers ',num2str(commF(i)),'kHz','.png');
62 fidPNG small = strcat(fileName,'Markers ',num2str(commF(i)),...
63 'kHz small','.png');
64 end
65 titleStr = strcat(compName,f'  'g,num2str(commF(i)),f' 'g,'kHz');
66
67 % Get efficiency curves for current frequency
68 for j=1:Lcount
69 % Use appropriate load and efficiency values if DMM available
70 f buffer = L(j).data FreqSort(:,2);
71 if L(j).DMM == 'y'
72 L buffer = L(j).data FreqSort(:,8);
73 Eff buffer = L(j).data FreqSort(:,10);
74 elseif L(j).DMM == 'n'
75 L buffer = L(j).data FreqSort(:,3);
76 Eff buffer = L(j).data FreqSort(:,5);
77 else
78 error('Corrupt data file');
79 end
80
81 % Get current load and efficiency values and sort by measured Iout
82 ind = find(f buffer == commF(i));
83 loadVec = L buffer(ind(1):ind(end)); %#ok<*SAGROW>
84 dataVec = Eff buffer(ind(1):ind(end));
85 currentData = sortrows([loadVec dataVec],1);
86
87
88 % Make legend entry for current inductor
89 coreStr = L(j).CoreGeometry;
90 if isnumeric(L(j).Turns)
91 turnStr = strcat(num2str(L(j).Turns),' turns');
92 else
93 turnStr = strcat(L(j).Turns(1),' parallel turns');
89
94 end
95 matStr = L(j).Material;
96 gapStr = strcat(num2str(L(j).Gap),' mil gap');
97 inductance = L(j).L;
98 legendEntry = strcat(coreStr,f' 'g,turnStr,f' 'g,matStr,f' 'g,...
99 gapStr, f'  'g,num2str(inductance,3), 'uH');
100 legendInfofjg = char(legendEntry); %#ok<SAGROW>
101
102 % Add curve to plot
103 h = figure(1);
104 hold on;
105 plot(currentData(:,1),currentData(:,2),plotStylefjg);
106 fprintf('Plot %s addednn',char(legendEntry));
107 message = sprintf('Plot %s added',char(legendEntry));
108 bar = bar + step;
109 waitbar(bar,wb,message);
110 end
111
112 % Label plot
113 title(titleStr);
114 xlabel('Load Current [A]');
115 ylabel('Efficiency [%]');
116 xlim([0,28]);
117 ylim([YMIN,YMAX]);
118 % adjust legend location to not block curves
119 if commF(i) < 160
120 legend(legendInfo,'Location','NorthEast');
121 else
122 legend(legendInfo,'Location','SouthWest');
123 end
124 cd(compName)
125 message = sprintf('Saving PNG file  %d kHz %s/%s',commF(i),...
126 num2str(i),num2str(length(commF)));
127 waitbar(bar,wb,message);
128 grid on;
129 print(h,' dpng',' r600', fidPNG);
130 print(h,' dpng',' r100', fidPNG small);
131 if FIGsave == 'y'
132 message = sprintf('Saving FIG file  %d kHz %s/%s',num2str(i),...
133 num2str(length(commF)));
134 waitbar(bar,wb,message);
135 hgsave(h,fid);
136 end
137 % return to function folder, close figure
138 cd ..;
139 close(h);
140
141 fprintf('Plot %d/%d complete  %d kHznn',i,length(commF),commF(i));
142
143 end
144
145 fprintf('Vs. Load plot generation complete...nnnn');
146 close all;
147 clear wb;
90
148 %% PLOT VS. FREQ
149
150 % Round all load data to nearest integer and get common load currents
151 Lcount = length(L);
152 for i=1:Lcount
153 ind = 1;
154 Fstep = L(i).freq stepN;
155 if L(i).DMM =='y'
156 loadCol = 8;
157 elseif L(i).DMM == 'n'
158 loadCol = 3;
159 else
160 error('Corrupt data file');
161 end
162
163 % use round to integer of average load values
164 for j=1:L(i).load stepN
165 I act = round(mean(L(i).data LoadSort(ind:ind+Fstep 1,loadCol)));
166 L(i).data LoadSort(ind:ind+Fstep 1,loadCol) = I act;
167 ind = Fstep*j+1;
168 Ibuffer(j) = I act;
169 end
170
171 % get common load currents
172 if i==1
173 commI = Ibuffer;
174 else
175 commI = intersect(commI,Ibuffer);
176 end
177 Ibuffer = []; % clear load buffer
178 end
179
180 % Set up parameters for waitbar
181 stepTot = Lcount*length(commI);
182 step = 1/stepTot;
183 bar = 0;
184
185 % Plot for each common load current
186 for i=1:length(commI)
187 fprintf('Plotting load current %d Ann',commI(i));
188 message = sprintf('Plotting load current %s A',num2str(commI(i)));
189 %waitbar(bar,wb,message);
190
191 % Assemble title and file strings
192 fid = strcat(fileName,num2str(commI(i)),'A');
193 if dataMarkers == 'n'
194 fidPNG = strcat(fileName,num2str(commI(i)),'A','.png');
195 fidPNG small = strcat(fileName,num2str(commI(i)),'A small','.png');
196 else
197 fidPNG = strcat(fileName,'Markers ',num2str(commI(i)),'A','.png');
198 fidPNG small = strcat(fileName,'Markers ',num2str(commI(i)),...
199 'A small','.png');
200 end
201 titleStr = strcat(compName,f'  'g,num2str(commI(i)),f' 'g,'A');
91
202
203 % Get efficiency curves for current load
204 for j=1:Lcount
205 % Use appropriate load and efficiency values if DMM available
206 if L(j).DMM == 'y'
207 I buffer = L(j).data LoadSort(:,8);
208 Eff buffer = L(j).data LoadSort(:,10);
209 elseif L(j).DMM == 'n'
210 I buffer = L(j).data LoadSort(:,3);
211 Eff buffer = L(j).data LoadSort(:,5);
212 else
213 error('Corrupt data file');
214 end
215
216 % store available frequency points in buffer
217 freqVec = L(j).data LoadSort(1:L(j).freq stepN,2);
218
219 % Get efficiency data for current load value
220 ind = find(I buffer == commI(i));
221 dataVec = Eff buffer(ind:ind+L(j).freq stepN 1);
222
223 % Make legend entry for current inductor
224 coreStr = L(j).CoreGeometry;
225 if isnumeric(L(j).Turns)
226 turnStr = strcat(num2str(L(j).Turns),' turns');
227 else
228 turnStr = strcat(L(j).Turns(1),' parallel turns');
229 end
230 matStr = L(j).Material;
231 gapStr = strcat(num2str(L(j).Gap),' mil gap');
232 inductance = L(j).L;
233 legendEntry = strcat(coreStr,f' 'g,turnStr,f' 'g,matStr,f' 'g,...
234 gapStr, f'  'g,num2str(inductance,3), 'uH');
235 legendInfofjg = char(legendEntry); %#ok<SAGROW>
236
237 % Add curve to plot
238 h = figure(1);
239 hold on;
240 plot(freqVec,dataVec,plotStylefjg);
241 fprintf('Plot %s addednn',char(legendEntry));
242 message = sprintf('Plot %s added',char(legendEntry));
243 %bar = bar + step;
244 %waitbar(bar,wb,message);
245 end
246
247 % Label plot
248 title(titleStr);
249 xlabel('Frequency [kHz]');
250 ylabel('Efficiency [%]');
251 ylim([YMIN,YMAX]);
252 if commI(i)>16
253 legend(legendInfo,'Location','North');
254 else
255 legend(legendInfo,'Location','South');
92
256 end
257
258 cd(compName)
259 message = sprintf('Saving PNG file  %d A %s/%s',commI(i),...
260 num2str(i), num2str(length(commI)));
261 %waitbar(bar,wb,message);
262 grid on;
263 print(h,' dpng',' r600', fidPNG);
264 print(h,' dpng',' r100', fidPNG small);
265 if FIGsave == 'y'
266 message = sprintf('Saving FIG file  %d A %s/%s',commI(i),...
267 num2str(i), num2str(length(commI)));
268 waitbar(bar,wb,message);
269 hgsave(h,fid);
270 end
271 cd ..;
272 close(h);
273
274 fprintf('Plot %d/%d complete  %d Ann',i,length(commI),commI(i));
275
276 end
277
278 fprintf('Vs. Frequency plot generation complete...nn');
93
A.2 Data storage script
1 clear all;
2 clc;
3 load V4 1;
4 cd('C:nUsersnjaggasnGoogle DrivenThesisnPower ProjectnAutomatedTesternV4 3')
5
6 %% FILE FORMAT
7 %
8 % SyncBuck coreGeo xtxgxxx[ doubleBoard].csv
9 % ? ? ? ? ?
10 % 1 2 3 4 5
11 %
12 % Format Key:
13 % 1  core geometry (i.e. E18, E22, ER23, ER18)
14 % 2  turn number (i.e. 1 or 2)
15 % 3  effective middle post gap width in mils (i.e. 2,4,6, etc)
16 % 4  material (i.e. 3c96, 3f3, 3c92)
17 % 5  append doubleBoard if using stacked breakout boards
18 %
19
20 %% Import data files
21 files = dir;
22
23 for i=3:length(files)
24 %% Get current file and import data
25 fileH = files(i);
26 fid = fileH.name;
27
28 % get test params
29 dashI = find(fid == ' ');
30 uScI = find(fid == ' ');
31 perI = find(fid == '.');
32 dashSc = union(dashI,uScI);
33 markers = union(dashSc,perI);
34 coreGeo = fid(markers(1)+1:markers(2) 1);
35
36 Linfo = fid(markers(2)+1:markers(3) 1);
37 turns = Linfo(1);
38 gI = find(Linfo == 'g');
39 gap = Linfo(3:gI 1);
40 material = Linfo(gI+1:end);
41
42 if ?isempty(strfind(fid,'doubleBoard'))
43 BoardStack = 2;
44 else
45 BoardStack = 1;
46 end
47
48 % ensure file is in csv format
49 check = fid(markers(end):end);
50 if strcmp(check,'.csv')
94
51 fprintf('%s data validatednn',fid);
52 else
53 fprintf('%s data not validnn',fid);
54 break;
55 end
56
57 % import data
58 x = importdata(fid);
59
60 %% Select data elements to save
61 Inom = x.data(:,1);
62 freq = x.data(:,2);
63 Iout = x.data(:,14);
64 Pout = x.data(:,18);
65 Eff = x.data(:,19);
66 Eff 5V = x.data(:,20);
67 Eff tot = x.data(:,21);
68 try
69 Iout DMM = x.data(:,23);
70 Pout DMM = x.data(:,27);
71 Eff DMM = x.data(:,28);
72 Eff DMM 5V = x.data(:,29);
73 data = [Inom freq Iout Pout Eff Eff 5V Eff tot Iout DMM Pout DMM ...
74 Eff DMM Eff DMM 5V];
75 DMM = 'y';
76 catch
77 data = [Inom freq Iout Pout Eff Eff 5V Eff tot];
78 DMM = 'n';
79 end
80
81 % sort data according to frequency and nominal load current
82 y.data LoadSort = sortrows(data,1);
83 y.data FreqSort = sortrows(data,2);
84 y.freq start = min(freq);
85 y.freq step = diff(y.data LoadSort(1:2,2));
86 y.freq stop = max(freq);
87 y.freq stepN = (max(freq)  min(freq)) / y.freq step + 1;
88
89 y.load start = min(Inom);
90 y.load step = diff(y.data FreqSort(1:2,1));
91 y.load stop = max(Inom);
92 y.load stepN = (max(Inom)  min(Inom)) / y.load step + 1;
93
94 % assemble data structure with inductor information
95 cd ..;
96 y.CoreGeometry = coreGeo;
97 if (BoardStack == 2)
98 y.Turns = strcat(turns,'P');
99 turnID = strcat('turns ',turns,'P');
100 else
101 y.Turns = str2double(turns);
102 turnID = strcat('turns ',turns);
103 end
104 y.Material = upper(material);
95
105 y.Gap = str2double(gap);
106 y.L = Lcalc(coreGeo,material,turns,gap);
107 y.DMM = DMM;
108
109 % Save to Version structure
110 gapID = strcat('gap ',gap);
111 matID = upper(strcat('M',material));
112 V4 3.(coreGeo).(turnID).(matID).(gapID) = y;
113
114 % Display current board parameters
115 fprintf('Board %d/%d savednn',i,length(files));
116 fprintf('Core Geometry: %snn',coreGeo);
117 fprintf('# of Turns: %snn',turns);
118 fprintf('Board Stack: %dnn',BoardStack);
119 fprintf('Material: %snn',material);
120 fprintf('Gap Width: %snn',gap);
121 fprintf('DMM data available: %snnnn',DMM);
122 cd('C:nUsersnjaggasnGoogle DrivenThesisnPower ProjectnAutomatedTestern')
123 end
124
125 cd ..;
126 clearvars  except V4 1 V4 3
127 save V4 1;
96
A.3 Waveform generation and analysis
1 %% Used to generate current waveforms
2
3 %% System parameters
4 N = 3; % number of phases
5 f = 150; % switching frequency in kHz
6 Idc = 12; % dc current component
7 percI = 10; % percent ripple current
8 Vin = 12;
9 Vout = 1;
10 Nview = 2; % number of period to view
11 M = 1000; % points per period
12
13 %% Calculate waveform parameters
14
15 % switching period in microseconds
16 T = 1000/f;
17
18 % minimum and maximum current values
19 Imax = Idc + 0.5*percI/100*Idc;
20 Imin = Idc  0.5*percI/100*Idc;
21
22 % duty cycle
23 D = Vout/Vin;
24
25 %% Build waveforms
26 % time
27 t = linspace(0,T*Nview,Nview*M);
28
29 % switch
30 swV1 = Vin*ones(1,ceil(D*M));
31 swV = repmat([swV1 zeros(1,floor((1 D)*M))],1,Nview);
32
33 % inductor voltage
34 L V = swV  Vout;
35
36 % current
37 i1 = linspace(Imin,Imax,ceil(D*M));
38 i2 = linspace(Imax,Imin,floor((1 D)*M));
39 iWF = repmat([i1 i2],1,Nview);
40 Idc line = Idc*ones(1,Nview*M);
41
42 % output voltage
43 Vo = iWF/Idc;
44
45 figure(1);
46 subplot(2,2,1);
47 plot(t,swV);
48
49 subplot(2,2,2);
50 plot(t,L V);
97
51
52 subplot(2,2,3);
53 plot(t,iWF);
54
55 subplot(2,2,4);
56 plot(t,Vo);
57
58 H2 = figure(2);
59 P2 = plot(t,iWF,'LineWidth',3,'Color','r');
60 ylim([Idc 8 Idc+4]);
61 xlim([0 t(end)]);
62 xlabel('Time (t) [nmus]','FontSize',14);
63 ylabel('Current (I) [A]','FontSize',14);
64 title('Inductor Current Waveform','FontSize',16,'FontWeight','bold');
65 grid on;
66 c = get(get(H2,'CurrentAxes'));
67 c.FontSize = 14;
68 print(H2,' dpng',' r300','InductorCurrent')
69
70 H4 = figure(4);
71 P4 = plot(t,iWF Idc,'LineWidth',3,'Color','r');
72 ylim([ 5 5]);
73 xlim([0 t(end)]);
74 xlabel('Time (t) [nmus]','FontSize',14);
75 ylabel('Current (I) [A]','FontSize',14);
76 title('Inductor Current  AC component','FontSize',16,'FontWeight','bold');
77 grid on;
78 c = get(get(H4,'CurrentAxes'));
79 c.FontSize = 14;
80 print(H4,' dpng',' r300','InductorCurrent AC')
81
82 %% FFT of current waveform
83
84 % downsample factor
85 L = 50;
86
87 % # of FFT points
88 NFFT = 2048;
89
90 % decimate the signal, remove the DC offset and study only the AC component
91 iD = downsample(iWF,L) 12;
92
93 % new Nyquiest frequency
94 fNyq = 0.5*M*f*1e3/L;
95
96 % take FFT and assemble frequency vector
97 ID = abs(fftshift(fft(iD,NFFT)));
98 ID = 10*log10(ID/max(ID));
99 fvec = linspace(0,fNyq,NFFT/2);
98
Appendix B
Material Speci cations
99
100
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102
103
104
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107