Search
Now showing items 1-10 of 31
Impact of Charge Collection Mechanisms on Single Event Effects in SiGe HBT Circuits
(2009-07-17)
Investigations into single event effect (SEE)
induced charge collection in
Silicon Germanium (SiGe) heterojunction
bipolar transistors (HBT)
are made through three-dimensional (3-D) device simulation.
The transistor ...
Flip Chip and Heat Spreader Attachment Development
(2009-04-09)
Flip chip packages offer many advantages over traditional wire bonding based packages. Flip chip packages have high input/output (I/O) handling capability, better electrical performance and smaller size. Proper package ...
Analysis of an Application where the Unscented Kalman Filter is not Appropriate
(2009-09-15)
In this work a spin stabilized rocket with a ring of lateral pulse jets for attitude correction
and fins that open early in flight is simulated. The rocket is simulated with five different sensor
packages: rate gyros ...
Analysis and Improvement of Virtex-4 Block RAM Built-In Self-Test and Introduction to Virtex-5 Block RAM Built-In Self-Test
(2009-04-27)
A reliable method for testing embedded memories within Virtex-4 and Virtex-5 Field-Programmable Gate Arrays (FPGAs) is needed by the current FPGA community. A method for testing the Virtex-4 embedded Block Random Access ...
Output Hazard-Free Test Generation Methodology
(2009-03-25)
Architectural restrictions of scan greatly limit the effectiveness of traditional scan based delay tests. It has been recently shown that additional testing for delays on short paths using fast clocks can significantly ...
Alternate In-Situ Environmental Testing System by Matrix Design
(2009-03-30)
Compared with the existing in-situ environmental testing system, this alternative one got significant improvement on measuring capacity, total cost, as well as number of connections that must be made between the hardware ...
A Low Power, Low Noise Phase Locked Loop MMIC for Ku- and X-Band Applications
(2009-03-23)
This paper presents the analysis, design, simulation, and test results for a Fractional-N
PLL frequency synthesizer. The synthesizer is designed to cover multiple frequency bands,
require low power, and have low noise. ...
Performance Optimization of Wireless Mesh Networks
(2009-04-01)
Wireless mesh network (WMN) is a communication network consisting of radio nodes organized in a mesh topology. The components of a mesh network are mesh clients, mesh routers for forwarding packets to mesh gateways that ...
Built-In Self-Test of Global Routing Resources in Virtex-4 FPGAs
(2009-05-05)
It is important to test programmable routing resources in Field Programmable Gate Arrays (FPGAs) because they take up the largest portion of configuration memory bits. In Virtex-4 FPGAs, routing resources account for over ...
Fault Detection and Diagnostic Test Set Minimization
(2009-02-16)
The objective of the research reported in this thesis is to develop new test generation algorithms using mathematical optimization techniques. These algorithms minimize test vector sets of a combinational logic circuit for ...