Area-Array Package Reliability Models for No-Core PCB Assemblies in Extreme Thermo-Mechanical Environments

Abstract

The trends in the electronic packaging industry are to design smaller packages that have higher complexity, and to improve package reliability while reducing costs. These needs in the packaging industry have lead to a newer generation of chip architectures, such as: Chip Scale Packages, Plastic Ball Grid Arrays, and Flip Chips. The ability of these package types to process faster information, and have high degrees of wiring complexity, while taking up minimal space, has made them very appealing to the automotive, space, and military industries. However, despite the increased performance capabilities of these leading-edge package types, their thermo-mechanical reliability is a concern for harsh environment applications. In this work, risk-management models for reliability prediction of BGA packages on NO-CORE assemblies in harsh environments have been presented. The models presented in this paper provide decision guidance for selection of component packaging technologies. In addition, qualitative parameter interaction effects, which are often ignored in closed-form modeling, have been incorporated in this work. Previous studies have focused on deterministic prediction of reliability. There is need for a turnkey approach for making trade-offs between geometry and materials, and quantitatively evaluating the impact on reliability. The presented statistics based approach targets a probabilistic life prediction for component wear-out under thermo-mechanical stresses. Models developed have been correlated with experimental data and non-linear finite element models. Factor effects for geometry, materials, and architectures based on statistical models, and FEA models have been developed. Convergence of statistical, failure mechanics, and FEA based model sensitivities with experimental data has been demonstrated. Validation of model predictions with accelerated test data has been presented.