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dc.contributor.advisorDai, Fa Foster
dc.contributor.authorSouder, William
dc.date.accessioned2009-04-14T20:13:49Z
dc.date.available2009-04-14T20:13:49Z
dc.date.issued2009-04-14T20:13:49Z
dc.identifier.urihttp://hdl.handle.net/10415/1631
dc.description.abstractIn today's society there is a growing trend where microwave wireless devices are becom- ing common in every household and workplace. The increasing desire for these devices is to create smaller low power devices. There is a growing need in today's wireless industry for high speed low noise, low power integrated frequency synthesizers. Frequency synthesizers can be found in nearly all aspects of wireless communication. One of the more popular frequency synthesizers, the phase locked loop (PLL), will be presented in this paper. This PLL was developed according to the design speci cations required by Dr. Fa Foster Dai and the United States Army Space and Missile Defense Command. This thesis will present the design, simulation, and testing results of a 13 GHz phase locked loop developed for military radar applications.en
dc.rightsEMBARGO_NOT_AUBURNen
dc.subjectElectrical Engineeringen
dc.titleA Low Power 10 GHz Phase Locked Loop for Radar Applications Implemented in 0.13 um SiGe Technologyen
dc.typethesisen
dc.embargo.lengthNO_RESTRICTIONen_US
dc.embargo.statusNOT_EMBARGOEDen_US


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