This Is AuburnElectronic Theses and Dissertations

Energy Source Lifetime Optimization for a Digital System through Power Management




Kulkarni, Manish

Type of Degree



Electrical Engineering


This work analyzes a typical battery powered digital electronic system and we propose a system level voltage scaling method and a functional power management method called instruction slowdown for low power. In the first part, we examine a circuit with voltage scaling capability and observe its impact on the energy efficiency of the battery. We study the system with a power source under throughput constraints and we propose a method to find a right size of battery to satisfy given system requirements. For systems with limit on battery weight or volume, we suggest a right circuit voltage operating point. We also notice that the performance evaluation metric such as battery discharge-delay or number of cycles per recharge are more relevant when power source optimization is a primary goal. In the later part of this work, an instruction named slowdown for low power (SLOP) is introduced. Functionally, it resembles the conventional NOP but requires power-specific hardware implementation. Depending upon the power reduction requirement, adequate number of SLOPs are automatically inserted in the instruction stream by the power management hardware. A possibility also exists to allow compiler or programmer to insert SLOPs in order to create programs which would have flexibility to run in either normal mode or in low power mode. While processing a SLOP, additional power control signals are generated for various units; so they can be powered down or clock gated. Simulation of a five-stage pipelined 32-bit MIPS processor shows that the SLOP method, termed instruction slowdown (ISD), becomes more effective than a conventional clock slowdown (CSD) when leakage is high. For 32nm CMOS technology, ISD can save more than 70% power compared to about 40% by CSD. The work shows that power reduction through a judicious choice of slowdown factor and the method adopted, clock slowdown for low leakage and instruction slowdown for high leakage, can enhance the battery lifetime.