|dc.description.abstract||Adders and multipliers are the most widely used computational units in integrated circuits. In many compact low power and high speed designs, more complex arithmetic operations such as multiplication are performed through repeated additions. In such applications, providing carry completion signaling in low cost ripple carry adders can allow the control logic to schedule the next addition as soon as an earlier one is complete, thereby achieving the average case, rather than worst case addition delay over a set of computations. Earlier attempts at using current sensing for such carry completion signaling suffered from serious limitations. This thesis presents a new approach for the design of a ripple carry adder with a current sensing capability which observes late settling carry signal nodes in the circuit and indicates when they reach a quiescent state. By this functional circuitry we avoid key problems of more hardware and power. Simulations for new design of ripple carry adder with current sensing completion detection technique show better than 50% speedup, on average, with less than 10% area overhead. The performance improvement with respect to carry look ahead adder which takes 40% more area than our ripple carry adder design is found to be 20%. This could give significant area and power savings in smaller circuit designs.
To demonstrate a potential application of ripple carry adder with completion detection capability, we incorporate our carry ripple adder into a Booth multiplier design and study the performance gain over a traditional ripple carry adder based design. Simulation results show that a 32-bit Booth Multiplier using the new completion signaling circuits can outperform a 32-bit Booth Multiplier with ripple carry adder (RCA) by 20-50%, while requiring less than 2% additional silicon area. This is comparable to the gains from the best carry look ahead adder designs at a fraction of the area overhead costs. The new approach eliminates the limitations suffered from the previous current sensing techniques. The overall performance of is improved with a minimal area overhead.||en