|In the age of portable communication devices, with electronics playing a vital role in all aspects of our daily lives, their reliability is of great concern to the industry. In the highly competitive portable electronics market, the product life-cycles are constantly shrinking, as new technologies emerge, making older ones obsolete at unprecedented rates. As a result, the OEMs face the challenge of developing novel products within shorter development cycles. Furthermore, with increased consumer expectations of superior performance and high quality, the reliability of the products is no more an afterthought in the product design process.
The consumer electronics industry is largely driven by tends towards miniaturization and high functionality. Due to their smaller and lighter construction, paired with careless handling at the hands of the consumer, portable electronics are under constant risk of mechanical abuse in the form of accidental drops. This work serves to address the need for reliability models, which predict the useful life of electronic components without carrying out exhaustive testing procedures. The study explores the feasibility of employing the Finite Element Method to simulate mechanical phenomenon, as an alternative to conducting experimental tests. The study demonstrates the use of validated Finite Element simulations based results to develop life prediction models for electronic components subjected to drop and shock loadings.
In this work, the drop and shock reliability of electronic components has been extensively researched. The study investigates the reliability aspects associated with contemporary packaging architectures, such as Ball Grid Arrays (BGAs) and Package-On-Package (PoP) structures; with special focus on second level interconnects, fabricated with novel Pb-free solder alloys. The Finite Element Method has been employed to predict stresses and strains in solder interconnect, during transient-dynamic shock events. Digital Image Correlation based strain measurements on the test vehicle have been used to validate the FE models. The Levenberg-Marquardt Algorithm, a non linear least squares minimizing method, has been used to evaluate constants which relate the interconnect life-in; terms of shock-events-to-failure; to the stain levels it experiences during each event.
The study also looks at the reliability issues associated with Copper Traces on the PCB surface, investigating the effects of variation in their geometries and orientation on their reliability. Furthermore, a fatigue life model, derived from the experimental data, is presented for enabling life prediction of Cu-traces in drop/shock. The reliability studies presented in this work, offer an insight into BGA and PoP solder interconnect and PCB metallization failure mechanisms. The developed life prediction models enable easy yet effective assessment of electronic component reliability, eliminating the need for exhaustive testing procedures, thereby shortening the product development cycle.