Design and Implementation of a SoC-Based Real-Time Vector Tracking GPS Receiver
Type of DegreeMaster's Thesis
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This thesis provides the design and implementation of a GPS receiver which utilizes advanced tracking algorithms on a small, low cost platform. The tracking algorithms used are of a class of algorithms known as vector tracking. Vector tracking receivers have been known to have an increased immunity to jamming and maintain signal lock on weaker signals. These benefits often come at the price of computation time, as the algorithms can require extensive matrix inversion and impose critical timing requirements on the receiver. To handle the computational burdens, a system-on-chip implementation was chosen using the Xilinx Zynq architecture. This architecture couples an FPGA with a dual-core ARM processor in a small package and can be acquired on development boards at a low cost. This thesis demonstrates how this architecture is utilized to overcome the strict timing requirements of a real-time vector tracking GPS receiver. The design and implementation of the receiver is described such that it can be used as an aide in the development of other advanced acquisition, tracking, or navigation algorithms. Performance results are given in regards to tracking, positions, and processing times.