|dc.description.abstract||One of the fundamental problems in transferring a circuit pattern onto a substrate using electron beam lithography is the proximity effect, which is due to electron scattering in the resist
and results in the ``non-ideal"" distribution of exposure (energy deposited in the resist) leading to the blurring of the written circuit pattern. For high-density circuit patterns with fine features of nanometer scale, the proximity effect can become so
severe that features may merge if not corrected for the effect. All of the previous proximity effect correction schemes used a two-dimensional (2-D) exposure model for proximity effect correction
by ignoring or averaging the variation of exposure along the depth dimension in the resist. In this thesis, the three-dimensional (3-D) proximity effect correction for binary lithography is
addressed with emphasis on sidewall shape. The objective of 3-D correction is to control electron beam dose distribution within each circuit feature using a 3-D point spread function (PSF) in
order to achieve a certain desired remaining resist profile after development.
As the first step towards developing 3-D proximity effect correction schemes, two prototype versions, 3-D iso-exposure contour correction and 3-D resist profile correction, have been implemented in this thesis. The main purpose of these prototype
implementation is to demonstrate the efficiency of real 3-D correction and, therefore, the iso-exposure contours and resist profiles of certain cross-sections in one direction only are
considered in these versions. The 3-D resist profile correction leads to more realistic results in general since it takes the resist development process into account.
Through computer simulations, the 3-D proximity effect and performance of the 3-D correction methods have been analyzed for simple patterns such as a single and three-line patterns.||en_US