| dc.description.abstract | Silicon carbide (SiC) based MOS devices are well suited to meet the need for energy efficient power electronics. For 4H-SiC MOSFET technology, one of the crucial challenges is to improve the quality of SiO2/SiC interface, which is plagued by high interface trap density (Dit) and low inversion layer mobility. Till date, nitric oxide (NO) post oxidation annealing of the gate oxide has become the standard process to produce commercial quality devices with acceptable channel mobility(∼35cm2V−1s−1, only 4% of the theoretical limit). However, due to the competing nitridation and oxidation reactions during NO annealing, there is a limit to the nitrogen coverage at the SiO2/SiC interface, which can reduce the trap density near the 4H-SiC conduction band edge. On the other hand, according to the recently proposed C-ψs method which avoids the probing frequency limitation in the conventional characterization methods, nitridation treatment generates certain amount of fast interface states. Because of the increase of the fast interface state density, NO annealing at a temperature higher than 1250 ◦C is not effective. Meanwhile, a dielectric/SiC interface that results in higher channel mobility, steeper sub-threshold slope and stable positive threshold voltage is still extremely desired for next-generation devices. Conversion of SiO2 into phospho-silicate glass (PSG) reduces the interface trap density more efficiently and improves the channel mobility by a factor of 3 compared to nitridation. In addition to trap passivation, both nitrogen and phosphorus atoms at the interface can dope the channel region of the MOSFET. This counter-doping effect in PSG is more prominent than nitridation, which contributes more to the mobility improvement. However, as PSG is an intrinsical polar material, undesirable polarization induces threshold-voltage instability, making this gate dielectric impractical.
In this research, we have investigated the phospho-silicate glass (PSG) as gate dielectric in SiC metal-oxide-semiconductor (MOS) devices. With several characterization techniques, we demonstrate that PSG formed by phosphoryl chloride (POCl3) annealing has more efficient role in passivating the interface traps (Dit) than NO annealing, both in 4H and 6H polytypes. As nitridation method, there exist “fast states” at the PSG/SiC interface, which
are undetectable by conventional characterization methods. C-ψs method was used to extract the accurate Dit profiles, including those “fast states”. Through the Dit profiles extracted by C-ψs method, a universal relationship between the total interface traps Nit (the Dit integration) and the peak channel mobility for both 4H and 6H polytypes has been identified, through which the mobility improvement of PSG dielectric on 6H-SiC devices is suggested. We have explored the correlation between the phosphorus uptake in PSG dielectric and its effect on the electrical properties of 4H-SiC MOS devices. Based on the P2O5-SiO2 phase diagram, different phosphorus uptake is achieved by varying the POCl3 annealing temperature in the range 900 ◦C - 1100 ◦C. The interface trap density is closely related to the interfacial phosphorus coverage, and more interfacial phosphorus incorporation leads to more reduction of Dit. In general, the mobility in 4H-SiC MOSFETs can be improved by a larger phosphorus uptake. However, due to the difference of counter-doping effect at various POCl3 annealing temperatures, the P passivation and surface counter-doping reach
an optimum at 1000 ◦C POCl3 annealing, resulting in the highest mobility ∼105cm2V−1s−1. At high oxide field Eox, we observe two mobility behaviors in temperature dependency for different PSG dielectrics. In 1000 ◦C PSG dielectric, possibly due to a minimal interface roughness, the surface phonon scattering is limiting the high field mobility; in other PSG dielectrics, the mobility limiting factor is surface roughness scattering.
In addition, two competing mechanisms in PSG dielectric instability are identified, polarization and electron trapping. Through a modulation of thin PSG structure and phosphorus uptake, we have suggested that it is possible to achieve stable PSG-gated 4H-SiC devices. | en_US |
