Improved RF Noise Modeling for Silicon-Germanium Heterojunction Bipolar Transistors

Abstract

Accurate radio frequency (RF) noise models for individual transistors are critical to minimize noise during mixed-signal analog and RF circuit design. This dissertation proposes two improved RF noise models for SiGe Heterojunction Bipolar Transistors (SiGe HBTs), a semi-empirical model and a physical model. A new parameter extraction method for small signal equivalent circuit of SiGe HBT has also been developed.

The semi-empirical model extracts intrinsic base and collector current noise from measured device noise parameters using standard noise de-embedding method based on a quasi-static input equivalent circuit. Equations are then developed to model these noise sources by examining the frequency and bias dependences. The model is shown to work at frequencies up to at least half of the peak unit-gain cutoff frequency (fT), and at biasing currents below high injection fT roll off. The model is scalable for emitter geometry, and can be easily implemented using currently available CAD tools.

For the physical model, improved electron and hole noise models are developed. The impact of the collector-base space charge region (CB SCR) on electron RF noise is examined to determine its importance for scaled SiGe HBTs. The van Vliet model is then improved to take into account the CB SCR effect. The fringe EB junction effect is included to improve base hole noise. The base noise resistance is found to be different from the AC intrinsic base resistance, which cannot be explained by the fringe effect. Applying a total of four bias-independent model parameters, the combination of new electron and hole noise models based on a non-quasistatic input equivalent circuit provides excellent noise parameter fittings for frequencies up to 26 GHz and all biases before fT roll off for three generations of SiGe HBTs. The model also has a good emitter geometry scaling ability.

The new small signal parameter extraction method developed here is based on a Taylor expansion analysis of transistor Y-parameters. This method is capable of extracting both input non-quasistatic effect and output non-quasistatic effect, which are not available for any of the existing extraction methods.