Statistical and Visual Analysis of Solder Joint Reliability in extreme Environments

Abstract

Over the last several decades, surface mount technology has advanced and become the most profitable industry worldwide. Cell phones or some type of hand held technology have become prominent throughout multiple age groups. Due to the thermal cycling these products are subjected to during their day-to-day operation, the reliability of these handheld electronic devices has become a major concern for the manufacturers. Recent testing at Auburn University, as well as other research institutions and industry, have shown significant concern with leadfree solder when exposed to long term isothermal aging. To address these, testing was performed to establish the top leadfree solder materials. In the first installment of the solder doping project, sixteen solder-paste materials were examined through thermal shock and mechanical (vibration and drop) testing. In thermal shock testing, boards were subjected to thermal shock test with temperatures between 40°C and +125°C in CSZ TSB Chamber, with 50 boards being tested at a time. The thermal shock cycle consisted of 3000 cycles with 5 minutes at each temperature extreme and transition time of 2.5 minutes. The setup test assemblies were mounted on an LDS LV217 electro-dynamic shaker table. The 4.6 Grms vibration profile was chosen to complete the test in 20 hours. In Drop testing, a Lasmont M23 Drop tower was used with the process as per JESD-B111 specifications. Boards were subjected to 300 drops or to failure with 1500G with 0.5 millisec half-sine shock pulse. Survival data for each test was analyzed with all variables taken into effect, and the top 5 performing materials were chosen for thermal cycle testing in TC2. In the second phase of the study, the reliability performance of various electronic assemblies during thermal cycling testing are investigated. The top performing doped lead free solder alloys designed for high-temperature reliability from phase I testing are used. The test boards were 0.200” thick power computing printed circuit boards with MEGTRON6 substrate material and OSP coating. Single-sided assemblies are built separately for the Top-side and Bottom-side of the boards. JEDEC JESD22-A104-B test standard was followed; the test boards were subjected for thermal cycling between the temperatures -400C and +1250C, 120-minute cycle profile with 45-minute transitions and 15-minute dwells at peak temperatures is maintained. The test assemblies include surface mount resistors, 5mm, 6mm, 13mm, 15mm, 17mm, 31mm, 35mm and 45mm ball grid array packages respectively. The failure data of the test assemblies were used in this study to understand the effect of solder paste composition on the solder joint reliability during thermal cycling testing. Results of these experiments have provided valuable data for materials that may be more reliable than SAC305 solder materials for high temperature storage and thermal cycling applications.