Predicting Signal Probabilities Using Neural Networks to Improve Test Point Insertion

Abstract

This thesis presents an artificial neural network signal probability predictor for VLSI circuits that considers reconvergent fan-outs. Testability analysis techniques are useful in the insertion of testpoints to improve circuit testability. Unfortunately, reconvergent fan-outs in digital circuits creates inaccurate testability analysis. Conventional testability analysis methods like COP do not consider reconvergent fan-outs and can degrade test point quality, while more advanced methods can increase test point analysis time significantly. This study shows that the training and use of artificial neural network to predict signal probabilities increases post-test point insertion fault coverage compared to using COP, especially in circuits with many reconvergent fan-outs per gate.