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dc.contributor.advisorMillican, Spencer
dc.contributor.authorFadamiro, Ayokunle
dc.date.accessioned2020-05-11T18:58:23Z
dc.date.available2020-05-11T18:58:23Z
dc.date.issued2020-05-11
dc.identifier.urihttp://hdl.handle.net/10415/7182
dc.description.abstractA new quaternary FPGA (QFPGA) architecture based on floating-gate memory elements is presented and analyzed. While technology scaling has delivered substantial FPGAperformance, consumer demands grow beyond what binary circuits can deliver. FPGAs implementing multi-valued logic (MVL) have been explored, but previously proposed architectures rely on non-standard fabrication techniques and optimistic performance analysis. Results show the proposed QFPGA implementation based on floating-gate memories has a competitive delay and power performance compared to equivalent binary implementations and previous QFPGA architectures from literature when simulated in FinFET technology.en_US
dc.subjectElectrical and Computer Engineeringen_US
dc.titleA Practical Quaternary FPGA Architecture Using Floating Gate Memoriesen_US
dc.typeMaster's Thesisen_US
dc.embargo.lengthen_US
dc.embargo.statusNOT_EMBARGOEDen_US
dc.contributor.committeeHarris, Christopher
dc.contributor.committeeAdit, Singh


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