Fabrication and Characterization of High Temperature P-channel 4H-SiC MOSFETs

Abstract

Power devices are of paramount relevance with the emergence of greener technology to utilize renewable energy sources. Conventional Si devices are reaching their performance limit due to Silicon’s physical limitation of low band gap and low break down voltage. In this regard, wide band gap semiconductor mainly silicon carbide (4H-SiC) is most promising in producing high-performance power devices. 4H-SiC power MOSFETs and Schottky diodes are already commercialized due to their ability to withstand high voltage and lower power consumption. Additional to the vertical power MOSFETs and other discrete devices, high-performing integrated circuits (IC) made of 4H-SiC would be very useful in applications such as space exploration and electric vehicles. An IC uses complementary metal-oxide semiconductor technology (CMOS) that needs both n- and p-channel MOSFETs. The operation of a MOSFET largely depends on the oxide-semiconductor interface. Therefore, rigorous study of both n- and p-type 4H-SiC/SiO2 interface is necessary to produce high-performing 4H-SiC ICs. The research on p-channel 4H-SiC MOSFETs is few compared to the rigorous study of n-channel 4H-SiC MOSFETs over the past decade. Because of this, the focus of this thesis has been to study the p-type 4H-SiC/SiO2 interface and improve p-channel MOSFET channel conduction at high temperatures. The performance of 4H-SiC MOSFETs is yet to reach its full potential. The operation is mainly limited by low channel mobility due to the presence of a large number of interface traps at the oxide semiconductor interface. Interfacial traps capture charge carriers and increase scattering at the channel, that intern lowers channel conductivity. In this thesis, several post-oxidations annealing treatments were incorporated to reduce a large number of interface traps and make highly conductive n- and p-channel MOSFETs, keeping the focus on the p-type interface mainly. After finding the best annealing method that is nitric oxide annealing (NO), the channel transport properties of electrons and holes are studied by Hall measurements following the fabrication of NO annealed 4H-SiC n- and p-channel 4H-SiC MOSFETs. Furthermore, the principal channel scattering mechanisms are distinguished using the application of body bias and temperature-dependent Hall analysis. For both kinds of MOSFETs, Coulomb scattering is seen to be dominant in the weak inversion region. In the strong inversion region phonon and surface roughness scattering are prevailing for n-channel MOSFET, whereas for p-channel, surface roughness scattering plays a crucial role. The power law dependence of mobility on the transverse electric field for n- and p-channel 4H-SiC MOSFETs are found. The importance of body bias and temperature-dependent study that can predict the behavior of MOSFETs with different substrate doping is presented. In the next phase of work, an alternative annealing treatment was tried to find out to replace toxic and expensive NO. For this purpose, several post oxidation nitrogen annealing treatments were carried out to observe their effect on device performance. N- and p-type 4H-SiC MOS capacitors are fabricated and characterized under temperature and bias. X-ray photoelectron spectroscopy is performed to quantify nitrogen at the interface. Additionally, the role of nitrogen at the interface is explained using density functional theory (DFT) calculation through collaboration with Auburn’s theoretical condensed matter group. The results presented here regarding electron and hole channel transport in n- and p-channel 4H-SiC MOSFETs play a crucial role in 4H-SiC IC fabrication as well as provide insights into improving oxide semiconductor interface in the fabrication of 4H-SiC power MOSFETs.