Drop Shock Performance of Solder Alloys in BGA Assemblies under Different Thermal Conditions

Abstract

Lead-free soldering has become mainstream since the Restriction of Hazardous Substances (RoHS) Directive. Solders have come a long way from the traditional SnPb (Tin-Lead) to lead-free alloys doped with elements such as Bismuth (Bi), Antimony (Sb), Nickel (Ni), etc. Following the transition from ductile lead-based alloys to strong but brittle lead-free solder alloys, the board-level drop test has become a vital reliability evaluation criterion for electronic packages. Board-level drop impact testing is one of the most critical methods of evaluating the reliability of electronic assemblies. The main objective of this dissertation is to model the drop shock reliability of various lead-free solder alloys under different acceleration levels and temperatures. The first study investigates the drop shock reliability of ball grid array (BGA) assemblies utilizing various SAC-based alloys and compares their performance with the established SnPb alloy benchmark. Drop test was conducted at different acceleration levels and pulse widths. Additionally, the input energy for each specific acceleration level was determined. A drop life prediction model was then developed for each alloy at different energy levels. In parallel, a hardness test was performed for all alloys under pristine conditions, and the results were correlated with the corresponding drop life performance. A comprehensive microscopy analysis has been performed to ascertain the failure modes and identify trends in failure patterns as a function of acceleration levels. The study findings revealed that SAC-Bi alloys exhibit superior performance compared to both SAC305 and SnPb alloys at lower energy levels. Moreover, the failure mode for SAC-Bi alloys and SnPb remains independent and constant across all energy levels, while SAC305 exhibits variability in its failure mode. Traditionally, drop shock tests have predominantly been performed at room temperature, failing to accurately simulate real-world conditions where electronic circuits contend with operational or environmental thermal strains during normal operation. To address this knowledge gap, the second study aims to conduct drop shock tests at elevated temperatures, ensuring the reliability of solder joints in practical applications. In the second study, ball grid array (BGA) assemblies containing SAC305 solder alloy were tested at various temperatures. The drop shock experiments were performed according to the Joint Electron Device Engineering Council (JEDEC) drop test standards, with a peak acceleration of 1500G and a pulse duration of 0.5ms. Subsequently, the drop shock reliability of the solder joints under each test condition was assessed using a two-parameter Weibull analysis. The Arrhenius model was also applied to develop a drop life prediction model. Furthermore, comprehensive microscopy analysis was performed to identify the failure modes and trends with increasing temperature. The results indicated that SAC305 performs best at room temperature (25°C). However, its lifespan experiences a substantial decrease as the temperature rises, with reductions of 64%, 76%, and 78% at 50°C, 75°C, and 100°C, respectively. Moreover, a failure mode transition was observed with an increase in temperature. The third study employed drop shock tests at 25°C and 75°C with SAC305 and SACQ solder alloys on OSP and ENIG surface finishes. Analysis revealed that SACQ generally outperformed SAC305 except for ENIG at 25°C, while both alloys experienced decreased drop life with higher temperature and ENIG surface finish. Notably, SACQ OSP at 25°C showed the best performance, while SAC305 ENIG at 75°C displayed the worst. Additionally, SAC305 OSP exhibited a shift in failure mode from the IMC layer at 25°C to bulk solder at 75°C, while other conditions consistently demonstrated IMC layer failures. These findings underline the significant influence of both temperature and surface finish on drop shock reliability, suggesting SAC-Q and OSP surface finish as potential choices for drop-resistant devices and emphasizing the importance of considering these factors for optimal solder joint performance in real-world electronics.