Prognostics and Health Management of Lead Free Electronics Subjected to Single Steady-State and Multiple Cyclic Thermal Environments by Vikrant Subhash More A thesis submitted to the Graduate Faculty of Auburn University in partial fulfillment of the requirements for the Degree of Master of Science Auburn, Alabama May 9, 2011 Keywords: Prognostication and Health Management, Lead-free, Phase Growth, Intermetallic compound Copyright 2010 by Vikrant Subhash More Approved by Pradeep Lall, Chair, Thomas Walter Professor of Mechanical Engineering Jeffrey Suhling, Quina Distinguished Professor of Mechanical Engineering Roy Knight, Assistant Professor of Mechanical Engineering ii Abstract Requirements for system availability for ultra-high reliability electronic systems such as implantable biological systems, avionics and space are driving the need for advanced heath monitoring techniques for early detection of onset of damage. There are various state of the art diagnostics techniques like BIST, fuses and canaries currently in use today but they all provide very limited visibility into system reliability and remaining useful life of the system. In order to provide more insight into these aspects a different approach called Prognostics and Health Management (PHM) has been presented in this thesis. PHM resides in the pre-failure-space of the electronic-system, in which no macro-indicators such as cracks or delamination exist. The presented PHM methodologies enable the estimation of prior damage in deployed electronics by interrogation of the system state based on damage proxies. Prognostics Health Management approach presented in this thesis is used to estimate the residual life on an electronic system subjected thermo-mechanical loading. Health management and interrogation of systems state based on leading of failure has already been studied by Lall [2004, 2005, 2006, 2007, and 2008]. Data has been collected for leading of failure (Intermetallic growth in this case) for alloy system 99Sn0.3Ag0.7Cu second-level interconnects under the application of Isothermal Loading at 125?C. A non linear least square method called Levenberg- Marquardt algorithm is used for determining prior damage history. iii Further this PHM methodology is extended to cover electronics subjected multiple thermal environments. Electronic assemblies which are deployed in harsh environments may be subjected to multiple thermal environments during the use-life of the equipments. Often the equipment may not have any macro-indicators of damage such as cracks or delamination. So in order to access the damage caused to these electronics system there is need for tools and techniques to quantify damage in deployed systems. In this thesis a PHM based methodology has been presented that can be used for residual life calculation of electronics subjected to multiple thermal environments. For this study, Sn3.0Ag0.5Cu alloy packages have been subjected to multiple thermal cycling environments including -55?C to 125?C and 0? to 100?C. Assemblies investigated include area-array packages soldered on FR4 printed circuit cards. A damage-state interrogation technique is based on the Levenberg-Marquardt algorithm in conjunction with the microstructural damage evolution proxies has been used. The presented technique is applicable to electronic assemblies which have been deployed on one thermal environment, then withdrawn from service and targeted for redeployment in a different thermal environment. Different test cases have been presented to demonstrate the viability of the technique for assessment of prior damage, operational readiness and residual life for assemblies exposed to multiple thermo- mechanical environments. The correlation demonstrates that the presented leading indicator based PHM technique can be used to interrogate the system state in multiple environments and thus estimate the residual life of a component. iv Acknowledgements I would like to express my sincere thanks to my advisor, Dr. Pradeep Lall, for letting me work on this challenging project. Without his guidance, patience and constant encouragement, completion of the thesis would not have been possible. I would like to thank the Center for Advanced Vehicle and Extreme Environment Electronics (CAVE3) for financial support and assistance during the completion of this thesis. I also wish to extend my gratitude to Dr. Jeffrey Suhling and Dr. Roy Knight for serving on my thesis committee and examining my thesis. I would like to thank my friends and colleagues who were willing to help along the way including, Chandan Bhat, Madhura Hande, Rahul vaidya, Jordan Roberts and many others. I would like to express my deep gratitude and gratefulness to my father Mr.Subhash More and my mother Mrs. Leela More for their enduring love and immense moral support. Further I also wish to thank Mr. Roy Howard, Mr. Mike Palmer and Mr. John Marcell for giving technical assistance with the Scanning Electron Microscopy, reflow oven and thermal chambers. v Table of Contents Abstract ................................................................................................................................... ii Acknowledgments .................................................................................................................. iv List of Figures....................................................................................................................... viii List of Tables .......................................................................................................................... xi Chapter 1 Introduction ............................................................................................................. 1 1.1 Electronic Packaging .............................................................................................. 1 1.2 Reliability concerns in Electronics Packaging ........................................................ 2 1.3 Prognostics and Health Management in Harsh Isothermal environment................... 4 1.4 Prognostics and Health Management in Multiple environments .............................. 7 1.5 Thesis Outline......................................................................................................... 8 Chapter 2 Literature Review................................................................................................... 10 2.1 Introduction ......................................................................................................... 10 2.2 Components Packaging Drivers ............................................................................ 10 2.3 Ball Grid Arrays (BGA?s)..................................................................................... 12 2.4 Reliability of Solder Joints.................................................................................... 15 2.5 Prognostics and Health Management .................................................................... 17 Chapter 3 Reliability of Second Level Interconnect................................................................ 21 3.1 Effect of Thermal cycling on solder joint reliability .............................................. 24 3.1.a Cyclic behavior and Creep fatigue Interaction .................................................... 25 vi 3.1.b Microstructure and Cyclic Behavior................................................................... 34 3.2 Effect of Thermal aging on solder joint reliability................................................. 36 Chapter 4 Prognostics Health Management of lead-Free Based Solder Electronics in Single Thermal Environment ......................................................................................................... 38 4.1 Introduction ......................................................................................................... 39 4.2 Test Vehicle and Methodology ............................................................................. 43 4.2.a Test Vehicle....................................................................................................... 43 4.2.b Methodology...................................................................................................... 44 4.3 Intermetallic Growth as Leading Indicator of Failure ............................................ 46 4.4 Interrogation of System state................................................................................. 48 4.4.a Levenberg-Marquardt Algorithm........................................................................ 48 4.5 Prognostication of Leading-Indicator .................................................................... 51 4.5.a Intermetallic Compound Growth........................................................................ 51 4.6 Case Study: Model Validation of Isothermal Loads............................................... 53 4.7 Implementation of PHM techniques...................................................................... 60 4.8 Summary and Conclusions.................................................................................... 60 Chapter 5 Prognostication of Latent Damage and Residual Life in lead-Free Electronics Subjected to Multiple Thermal Environments...................................................................... 62 5.1 Introduction ......................................................................................................... 63 5.2. Test Vehicle......................................................................................................... 64 5.3 Approach of Prognosticating Damage in Multiple Thermo-Mechanical Environments .......................................................................................................... 66 5.4 Micro-structural Evolution of damage................................................................... 73 5.5 Levenberg-Marquardt Algorithm .......................................................................... 75 vii 5.6 Case-Study: Prognostication of Damage in Multiple Thermo-Mechanical Environments .......................................................................................................... 78 5.6.a Prognostication of Prior Damage Thermal Environment-1, TC-1 ....................... 78 5.6.b Calculation of Differential Damage (NB-NA) and Operational Readiness in TC-2.................................................................................................................... 85 5.6.c Assessment of Prior Accrued Damage and Residual life after Withdrawal from TC-1 and Redeployment in TC-2..................................................................... 89 5.7 Residual Life in Multiple Environments................................................................ 94 5.8 Summary and Conclusion ..................................................................................... 95 Chapter 6 Summary and Conclusions ..................................................................................... 96 6.1 PHM in Single Isothermal Aging Environment ..................................................... 96 6.2 PHM in Multiple Thermal Environments .............................................................. 97 Bibliography .......................................................................................................................... 99 Appendix .............................................................................................................................112 viii List of Figures Figure 1.1 Various levels in electronic packaging..................................................................... 3 Figure 2.1 Components packaging requirements for different types of systems ...................... 11 Figure 2.2 Plastic Ball Grid Array packages ........................................................................... 13 Figure 2.3 Over molded Plastic Ball Grid Array Package ...................................................... 13 Figure 2.4 Typical dimension of Over-Molded Plastic Ball Grid Array ................................. 14 Figure 3.1 A severe temperature cycle and schematic of deformations in selected BGA joints at the cyclic extremes................................................................................................. 30 Figure 3.2 Hysteresis loop for a thermal cycling profile ......................................................... 31 Figure 3.3 Schematic representation of hysteresis loop showing the factors governing the Shape of the loop................................................................................................................. 32 Figure 4.1 Test Vehicle .......................................................................................................... 44 Figure 4.2 Methodology used for the Study............................................................................ 45 Figure 4.3 IMC measurement at board side copper pad .......................................................... 47 Figure 4.4 Back-scattered SEM images of IMC Growth versus Thermal Aging for Sn0.3Ag0.7Cu (Magnification 1000x)................................................................................. 54 Figure 4.5 IMC Growth, at various levels of time for CABGA 100 with Sn0.3Ag0.7Cu alloy.................................................................................................................................... 55 Figure 4.6 Global Minima for IMC based History Calculation for 100 I/O CABGA, SAC0307 Solder Alloy Interconnects for first experimental data point t= 667hrs ................ 56 Figure 4.7 Global Minima for IMC based History Calculation for 100 I/O CABGA, SAC0307 Solder Alloy Interconnects for second experimental data point t = 1333hrs ......... 57 ix Figure 4.8 Prognostication of Initial Intermetallic thickness from algorithm vs. Initial Intermetallic thickness from experimental values SAC0307 alloy........................................ 59 Figure 5.1 Test Vehicle 256 PBGA and 100 CABGA............................................................. 64 Figure 5.2 Printed Circuit Board Assembly Construction in the Test Assemblies.................... 65 Figure 5.3 Life Vs Damage Curve for Multiple Thermal Environments.................................. 68 Figure 5.4 Problem Definition for Prognostication and Decision Flow for Electronic Assembly Subjected to Multiple Operational Environments ................................................ 69 Figure 5.5 Prognostication approach to calculate NA in TC-1 environment............................. 71 Figure 5.6 Micrograph from 256 I/O PBGA showing Tin and Ag3Sn Phases.......................... 74 Figure 5.7 Microstructure mapping using Image Analysis ...................................................... 74 Figure 5.8 SEM backscattered images of phase growth versus thermal cycling (-55?C to 125?C, 96.5Sn3.0Ag0.5Cu solder, 100 I/O CABGA, magnification 750x)........................... 79 Figure 5.9 SEM backscattered images of phase growth versus thermal cycling (-55?C to 125?C, 96.5Sn3.0Ag0.5Cu solder, 256 I/O PBGA, magnification 750x) .............................. 80 Figure 5.10 Phase growth Vs Number of cycles for 96.5Sn3.0Ag0.5Cu solder, 100 CABGA, subjected to TC-1 (-55?C to 125?C)...................................................................... 81 Figure 5.11 Phase growth Vs Number of cycles for 96.5Sn3.0Ag0.5Cu solder, 256 PBGA, subjected to TC-1 (-55?C to 125?C)......................................................................... 82 Figure 5.12 3D Plot of Error Vs No of Thermal Cycles (N) for 100 CABGA SAC305 solder interconnects for 500 Cycles TC-1 (LM Algorithm).................................................. 83 Figure 5.13 3D Plot of Error Vs No of Thermal Cycles (N) for 256 PBGA SAC305 solder interconnects for 500 Cycles TC-1 (LM Algorithm).................................................. 84 Figure 5.14 Phase growth Vs Number of cycles for SAC 305 solder, 100 CABGA, subjected to TC-2 (0?C to 100?C) ........................................................................................ 86 Figure 5.15 Phase growth Vs Number of cycles for SAC 305 solder, 256 PBGA, subjected to TC-2 (0?C to 100?C) ........................................................................................ 86 x Figure 5.16 Differential Damage for assemblies subjected to Multiple Environments. 500 Cycles TC-1 equivalence with 662 cycles of TC-2, SAC305 solder, 100 CABGA, Magnification 750x. Prognosticated Value is 695................................................................ 87 Figure 5.17 Differential Damage for assemblies subjected to Multiple Environments. 500 Cycles TC-1 equivalence with 708 cycles of TC-2, SAC305 solder, 256 PBGA, Magnification 750x. Prognosticated Value is 675................................................................ 88 Figure 5.18 SEM Back-scattered Images of Phase Growth vs Multiple Environments (250 Cycles TC-1 + x-Cycles TC-2, SAC305 , 256 CABGA, Magnification 750x) ..................... 90 Figure 5.19 SEM Back-scattered Images of Phase Growth versus Multiple Environments (500 Cycles TC-1 + x-Cycles TC-2, SAC305 solder, 256 PBGA, Magnification 750x). .............. 91 Figure 5.20 SEM Back-scattered Images of Phase Growth versus Multiple Environments (750 Cycles TC-1 + x-Cycles TC-2, SAC305 solder, 256 PBGA, Magnification 750x). .............. 91 Figure 5.21 Prognostication for assemblies subjected to Multiple Environments. 500 Cycles TC-1 + 250 Cycles TC-2, SAC305 solder, 256 PBGA, Magnification 750x............. 92 Figure 5.22 Prognostication for assemblies subjected to Multiple Environments. 750 Cycles TC-1 + 250 Cycles TC-2, SAC305 solder, 256 PBGA, Magnification 750x............. 93 Figure 5.23 Weibull plot for 100CABGA packages subjected to TC-2, 0?C to 100?C............. 94 xi List of Tables Table 4.1 Test Vehicle ........................................................................................................... 43 Table 4.2 Variable Range for IMC growth for SAC0307........................................................ 52 Table 4.3 Comparison of computed values of ?t? from prognostication model and experimental results ............................................................................................................ 58 Table 4.4 Comparison of computed values of ?y0? from prognostication model and experimental results ............................................................................................................ 58 Table 5.1 Package Architecture details for test vehicle .......................................................... 65 Table 5.2 Details of board assembly ...................................................................................... 65 Table 5.3 Comparison of experimental and prognosticated values of N and g0, for 100 CABGA and 256 PBGA with SAC305 interconnects ......................................................... 84 Table 5.4 Comparison of experimental and prognosticated values of differential damage for 100 CABGA and 256 PBGA with SAC305 interconnects ................................................... 89 Table 5.5 Comparison of experimental and prognosticated values of differential damage for 100 CABGA and 256 PBGA with SAC305 interconnects .................................................. 93 1 Chapter 1 Introduction 1.1 Electronics packaging The presented work in this thesis is carried out in the field of Electronics packaging. First of all what does the term Electronic Packaging means, Electronic packaging is an art (based science) of establishing interconnections between various levels of electronic devices, components, modules, and the system [Prasad 2004]. Electronic packaging is widely used in various applications like cellular phones, computers, vehicles, avionics and space applications etc. Study of packaging may include heavy, bulky components like power supply transformers, filter capacitors, cathode-ray-display tubes and flat-panel displays etc but in this thesis electronics packaging term is used to imply packaging of microelectronics (Semiconductor chips). Electronic packaging can be further stated as a process of interconnecting electronic and electromechanical components, devices, and modules between the various layers of the electronic system. The chip is the purpose of a microelectronic package. The main functions of electronic package is to provide connections for signal leading from chip, provide connections for electrical current to power the circuit chip, provide a means for removing heat generated from chip, provide a structure to support and protect the chip, Provide a wiring structure for signal and power connections within a system and for input/output includes Signal Distribution, power distribution, hear dissipation and protection (Mechanical, Chemical, Electromagnetic). 2 There are different levels in electronics packaging (microelectronics packaging) and the hierarchal structure is as shown below in Figure 1.1. The chip fabricated from the silicon wafer is referred as the zeroth level of electronic packaging. The first level is packaging of the chip or the silicon die. This involves the encapsulation and interconnection at the chip level. Usually ceramic and plastic (epoxy) mold is used for encapsulation of the chip. The technologies used for the interconnection at this level include wire bonding, tape automated bonding and flip-chip solder bumps. The second level of packaging comprises assembly of the first level packaged components on the printed circuit board (PCB). The technologies used for this purpose are plated through hole (PTH) and surface mount technology (SMT). The third level of packaging consists of mounting and connecting of the various PCBs as in case of a mother board assembly. Finally, the fourth level of packaging consists of the system level packaging and shielding of the whole system with an appropriate form of an outer shell. The current work is focused on second level of packaging. 1.2 Reliability concerns in Electronics packaging There is a constant drive to make electronic packages smaller, cheaper, faster, with increased power density, larger semiconductor die and more I/O?s . This has resulted in series of mechanical challenges due to extreme environments, which are mentioned below. 1. Package materials can be exposed to high temperature changes due to operation of high power density devices or extreme ambient environments. 2. Thermally induced stresses often occur due to large mismatches in the coefficients of thermal expansion of the various materials in the package 3 3. Stresses can also occur due to mechanical loading caused by the rest of the product containing the package or due to vibration. Electronics are nowadays used in various appliances which are in daily use by human beings from cellular phones, MP3 players, hard drives, laptops, electronics control unit of cars etc. Some of them are used in very critical operations like implantable biological systems, avionics and space applications. Failure of such electronic system in critical application can lead to catastrophic consequences. Therefore reliability testing of electronics is important criterion for any electronic system before it is deployed in field. In this thesis reliability issues concerning harsh thermo-Mechanical environment has been studied. Figure 1.1- Various levels in electronic packaging [Prasad 2004] 4 Electronic packages are subjected to thermo-mechanical loading during usage and due to surrounding environments. An electronic package like BGA is essentially an assembly of different materials sets (die, BT substrate, molding compound, etc) attached together using various processes. Each material set has unique properties like Coefficient of Thermal Expansion (CTE), Young?s Modulus (E), poisons ratio (?), etc. When a device is exposed to cyclic changes in temperatures during its actual use, it induces thermal expansion mismatches between the substrate and the board. This creates cyclic shearing loads on the solder interconnects (BGA joints), which eventually leads to their fatigue failure. There are various types of failures through out the package such as Solder joint fracture, die fracture, severing of interconnections, wire bond failure, delamination of material interfaces , encapsulant cracking etc. Solder Joint failure has emerged to be one of the predominant failure mode; therefore in this thesis thermo- mechanical reliability of solder joint has been studied. 1.3 Prognostics and Health Management in Harsh Isothermal environment Wear and degradation in electronics is very difficult to detect and inspect compared to most other mechanical systems and structures due to complex and tiny structure. Built- In-Self Test (BIST) circuit, which includes onboard hardware and software diagnostic, has been used for error detection and fault location [Drees 2004]. BIST controllers are typically used for reactive failure detection, to output failure data that can be correlated to show exactly when the failure occurred. This data can then be interpreted by diagnostic software to analyze the cause of failure. BIST helps in minimizing the interaction with external automated test equipment (ATE) as well as provides the advantage of a more robust ?at-speed? test of the circuitry; however, the current form gives little insight about the system level reliability or the remaining useful life of the system. Several studies conducted [Allen 2003, Drees 2004, Gao 2002, Rosenthal 1990] have 5 shown that BIST can be prone to false alarms and can result in unnecessary costly replacement, re-qualification, delayed shipping, and loss of system availability. Fuses and Canaries have been used to provide advance warning of failure in electronics due to specific wear out failure mechanism [Vichare 2006]. Fuses within circuits and thermostats, can be used to sense the abnormal conditions like voltage transients, critical temperature limit and to make adjustment to restore normal condition [Ramakrishnan 2000]. Canary devices like pre-calibrated cells which are located with the actual circuitry on the same chip experience similar stresses as the actual component, this leads to same damage mechanism. The failure of the canary devices can be used to estimate the time to failure of actual product [Mishra 2002]. Similarly canary components created on printed circuit board is been used for prognostication by failing before the actual component [Anderson 2004]. However, replacement of fuses and canaries impacts the maintenance, repair and part replacement making it difficult to integrate these systems with host system. In addition, fuses provide limited insight into the remaining use life prior to fuse-failure. PHM approach presented in this thesis is different from state-of-art diagnostics and resides in the pre-failure-space of the electronic-system, in which no macro-indicators such as cracks or delamination exist. The presented PHM methodologies enable the estimation of prior damage in deployed electronics by interrogation of the system state. Previously, the PHM of mechanical structures has been done by dynamic analysis based on natural frequencies, mode shapes, damping factors, and static analysis based on deformation or changes in structure orientation due to load or unexpected damage, using innovative signal processing, new sensors, and control theory [Kok 2005]. Health Monitoring (HM) refers to the broad concept of assessing the ongoing, in-service performance of a system using a variety of measurement techniques. HM application areas include fatigue crack damage in mechanical 6 structures such as those in aircraft [Munns 2000], surface ships [Baldwin 2002], civil infrastructure [Chang 2003], railway structures [Barke 2005] and power plants [Jarrell 2002]. Health Monitoring is aimed at the immediate detection and diagnosis of off-normal system operation, and to take real-time corrective actions to avert the possibility of a system failure. Further prognostics refer to interrogation of material state of a system based on computation of certain proxies, stressors, and to predict the Residual Life (RL) of the system for the intended environment. An electronic component operating in a harsh environment is subjected to both temperature variations as well aging for a finite duration during use-life. Therefore, a time- temperature history of the electronic system ambient would be extremely helpful in using life prediction models and computing life. Continuous capture of time-temperature history would put immense demands on existing system function. In this thesis, a mathematical approach has been presented to calculate the prior damage in electronics subjected isothermal loads. This methodology obviates the need to capture the prior stress history and helps in accurate prediction of remaining useful life. Previously, [Lall 2004a-d, 2005a-b, 2006a-f] have developed leading indicators of failure. In this methodology, proxies like the phase growth rate of solder interconnects, growth of intermetallics compound between solder and copper pad, normal stress at chip interface, and interfacial shear stresses, have been experimentally identified as indicators to failure. In this thesis, Mathematical relationships have been developed for computation of residual life based in terms of these damage proxies. This methodology eliminates the need for knowledge of prior stress histories and enables interrogation of system state using the identified damage pre-cursors. This approach of computing residual life for various package elements, to 7 prognosticate electronic systems can be implemented prior to appearance of any macro- indicators of damage. 1.4 Prognostics and Health Management in Multiple environments The PHM approach mentioned above is extended from single environment to multiple environments condition. Some of the critical applications were ultra high reliability is required such as airborne, space electronics systems the cost of failure in terms of potential risk to human life is unacceptable. Airborne electronic systems may be deployed for very long use-life in operation. Current health management techniques in EPS (electrical power systems) and Avionic systems provide very-limited or no-visibility into health of power electronics, and packaging to predict impending failures. [McCann 2005, Marko 1996, Schauz 1996, Shiroishi 1997]. Health monitoring systems have the potential to enhance the safe-use service life of long-life systems without compromising operational readiness. Deployed electronic systems often may be subjected to multiple thermal environments. Thermal environments may change due to operational environments or change in usage profiles. Decision-support for re-deployment requires system data on the operational readiness of electronic systems based on accrued damage and residual life in intended environment. Current state of art error detection and correction techniques like BIST, Fuses and canaries lack the capability for assessment of prior damage and provide limited insight into estimation of remaining useful life. Future improvements in reduction of system downtime require emphasis on early detection of degradation mechanisms [Jarell 2002]. Lall [2004a-d, 2005a-b, 2006a-f, 2007a-e, 2008a-f] have developed leading indicators of failure for prognostication of electronic systems under thermo-mechanical, shock-impact and vibration stresses. Proxies such as phase growth rate in solder interconnects have been identified 8 as leading indicators of failure. In this thesis, the PHM approach has been developed for interrogation of damage state for electronic systems subjected to multiple thermal environments. The approach enables assessment of accrued damage and the residual life assessment in the intended environment. The presented methodology is different from the state-of-art diagnostics and resides in the pre-failure-space of the electronic-system, in which no macro-indicators such as cracks or delamination exist. The methodology eliminates the need to capture the prior stress history for prognostication of system state. Relationships for computation of residual life have been developed based on damage proxies. 1.5 Thesis Outline In this thesis, Chapter 2, which is the literature survey, discusses solder joint reliability as a predominant mode of failure. The drivers for the development of various components are discussed in this chapter. This study is concentrated on Ball Grid Arrays therefore various aspects of ball grid arrays are also specified in this section. Different reliability problems associated with packaging have been explained. Further a literature review referring to the previous work in this area has also been included in this section. Prognostics and Health Management approach for single isothermal condition and multiple thermal environments scenarios have been briefly introduced in this section. Chapter 3, talks in details about the various reliability concerns in secondary level interconnect. The Effect of thermal cycling, power cycling and vibration loading on reliability of these secondary level interconnect have been explained. Effects of accelerated thermal cycling on solder joint reliability have been mentioned in details in this section. The impact of plastic and creep strains on solder joints reliability has 9 also been briefly stated. Further this section also talks about the effect of thermal aging on solder joint reliability. Prognostication approach based on leading indicator of failure for isothermal loading condition has been discussed in Chapter 4. This chapter also includes details of the test vehicle used for this study and methodology used to investigate the prior damage history using leading indicators of failure. Interrogation of system state based on Intermetallic thickness growth and a non linear least square method is used for residual life calculation of lead free interconnect. Prognostics approach developed for multiple thermal environments has been explained in Chapter 5. This chapter includes details of the test vehicle used for this study and methodology used to investigate the prior damage history using. Solder micro-structural coarsening effect on solder interconnect damage and also methodology to quantify the coarsening effect when it has been subjected thermal cycling has been discussed. Interrogation of system state based on phase growth coarsening and Levenberg Marquardt?s Algorithm are explained in this section. This coarsening data obtained in the neighborhood of prognostication time is used to fit the equation using non-linear least square method in order to investigate the prior damage and subsequently find out the residual life left for future usage. The result obtained using this algorithm has been correlated to experimental data to validate the methodology for SAC305 alloy components. Finally, Chapter 6 includes the conclusion of the presented methodologies. 10 Chapter 2 Literature Review 2.1 Introduction Reliability concerns are utmost important in very critical applications like avionics, space and implantable biological devices etc. Out of the various failure modes in packaging, solder joint failure has proved to be one of the predominant failure mechanism in electronics. In this study Lead free electronics have been studied for single and multiple thermal loading environments. Substantial amount of literature exist for life prediction of lead free electronics subjected to single thermal environment condition but there is no insight into life prediction of these electronics which are subjected to multiple thermal environments scenario. The following study uses Prognostics and health management approach for interrogation to present system state and then predicting remaining useful life left in the system before any macro-indicators like crack and delamination exists. 2.2 Components Packaging Drivers Among the two board technologies, Through Hole (TH) and Surface mount technology (SMT), The Surface mount technology has made it possible to produce more reliable assemblies at reduced weight, volume and cost. Continued emphasis on faster, smaller, and lighter electronics systems is making component, board, and system packaging more complex. With the rapid introduction of the increasingly faster microprocessor needed for more user 11 friendly software, the complexity of computer system is also increasing. The driving forces for components packaging in computer systems are thermal and electrical performances, real estate constraint and cost. The component packaging requirements varies for different types of systems. This is summarized in Figure 2.1 below [Prasad 2004]. Figure 2.1: Components packaging requirements for different types of systems For example, high?end microprocessors run at higher frequency and require thermally and electrically enhanced packages. Examples of thermal enhancements are heat slugs, heat High Electrical & Thermal performance High performance and lower cost packages SMT technology?.cheaper assembly cost to OEM ? Cheap ! Cheap ! package ? Thin and small outline packages for notebook and chipset applications Package requirements ? Narrow pad pitches ? Decoupling capacitor ? Options:PGA,BGA.C4 High End Performance driven Mid ?Range Cost/performance driven Entry level Cost driven 1).Thermally enhanced plastic packages 2).Options: SMT(CPGA, PQFP,QFP, PPGA,BGA) 1). Low cost plastic 2). Options: QFP?s, TSOP. TAB, modeled 12 spreaders, heat sink, and fin-fan etc. Examples of electrical enhancements are multilayer packages and in-package capacitance. Generally hermetic multilayer ceramic packages are for high-end applications such as high wattage microprocessors. For mid-range systems, performance is important, but so is cost. Thermally enhanced, multilayer packages (plastics PGA or QFP, BGA) may be appropriate for this application. And for low-end entry level and portable systems, cost and form factors are critical and generally surface mount packages such as QFP and TSOP are used [Prasad 2004]. All above mentioned drivers led to the development of PGA, Fine pitch and BGA packages. This thesis is focused on BGA therefore we will concentrate our attention on BGA only. The most important reason for potential proliferation of BGA is the problems associated with the alternative of peripheral fine pitch and ultra fine pitch TAB packages. There were several advantages of BGA versus fine pitch SMT such as smaller size leading to reduced costs, higher I/O for a given footprint (higher interconnect density) and reduced weight. Some of the other advantages include better electrical performance and easy to extend to multichip module. There are also some manufacturing advantages like reduced coplanarity problems (no leads), reduced placement problems (self-centering), reduced paste printing problems (bridging), reduced handling problems (no lead bending) and overall better assembly yield. 2.3 Ball Grid Arrays (BGA) There are various types of BGA, but the main categories are ceramic and plastic. The ceramic BGA are called CBGA and CCGA (ceramic column grid arrays), and the plastic BGA are referred to as PBGA. There is another category of BGA known as tape BGA (TBGA). The 13 current study is done with PBGA as test vehicle. Figure 2.2 below shows some of PBGA packages. Figure 2.2: Plastic Ball Grid Array packages [Prasad 2004] Figure 2.3: Over molded Plastic Ball Grid Array Package [Prasad 2004] 14 Figure 2.3 shows cross-sectioned PBGA package revealing the inner structure of the package. The plastic ball grid array shown in Figure 2.3 is made of high temperature PCB laminate. It is also known as OMPAC (Over molded plastic pad array) by Motorola. The inner connections are made either with wire bond or by the flip chip interconnection. The resins used in PBGA have a Tg (glass transition temperature) necessary for high temperature stability. Therefore a resin called BT (bismaleimide triazene) is the most commonly used resin for PBGA. Driclad, another resin material developed by IBM, is also used for PBGA. These materials have a CTE very similar to that of commonly used FR-4 laminate (16-20 ppm) and hence do not pose any solder joint reliability concerns. The PCB layer in the package can be two-layer to multiplayer depending upon package complexity. Figure 2.4 shows the typical dimension of PBGA packaged. The lead coplanarity allowed by JEDEC standards is 0.006inch for smaller BGA and 0.008inch for larger BGA(1.27mm to 1.5mm pitches) because the larger PBGA packages are more susceptible to warpage than the smaller packages. In general PBGA are low cost and low profile packages [Prasad 2004]. Figure 2.4: Typical dimension of Over-Molded Plastic Ball Grid Array [Prasad 2004] 15 2.4 Reliability of Solder Joints There are several types of failure mode in electronics packaging, among which solder joint fatigue has emerged to be a predominant one as mentioned in earlier section. Reliability of electronic packaging is classified into two categories namely thermal reliability and impact/shock reliability. Thermo-mechanical reliability is the process of estimating useful life of electronics subjected to thermal cycling or thermal aging. Reliability studies consist of life predictions of electronics in computers which may undergo thermal cycling during working and shut down modes or in under-the-hood applications of automobiles. Impact reliability deals with the consequences of electronic packaging subjected to drop and shock or vibrations. Mechanical reliability is important in the case of hand-held devices such as cell phones, PDAs and laptops as these devices have high chances of being subjected to drop or in the case of electronics in power tools which are subjected to large vibrations. This study is focused on reliability of electronic packaging when subjected to thermo-mechanical loading. Maintaining solder joint reliability is the key challenge in the transition from lead to lead free. Several researcher have studied the effect of body size, die size, substrate thickness, stiffness of die adhesive, printed wiring board thickness, type of pad and type of substrate on reliability of PBGA packages. Investigators like [Grossmann 2002] demonstrated that Sn-Ag and Sn-Ag-Cu alloys in general exhibit greater resistance to creep as compared to PbSn alloys and hence creep is 10-100 times slower. [Vandevelde 2004] showed due to lower creep strain rate the stresses become higher in Sn-Ag-Cu compared to Sn-Pb. [Huang 2002] studies have shown that the steady-state creep rate are controlled by dislocation-pipe diffusion in the Tin matrix for Sn-Ag-Cu Alloy and aging affect the secondary creep rate. Sn-Ag-Cu shows much lower absolute creep rates than the Pb-Sn eutectic. The large difference in creep resistance was 16 likely because of finely dispersed IMC precipitate in Sn matrix. Solder Joint with higher level of copper has higher shear strength after cycling [Cookson 2007]. Further high peak temperatures are usually used in reflowing lead-free solder joints due to the high SAC melting temperature in order to obtain a homogenous microstructure. Due to higher reflow temperatures there are various assembly challenges and reliability concerns. Hua, et al. [Hua 2001, 2005] have concluded that reliability and process risks are high for backward solder joints formed with a reflow profile with peak temperature less than 217 ?C. Low reflow peak temperature resulted in inhomogeneous microstructures and partially collapsed Sn-Ag-Cu solder balls. The same phenomenon was also observed by [Zbrzezny 2006]. Theuss and coworkers [Theuss 2003] further stated that a peak temperature of at least 235 ?C is needed to obtain acceptable reliability of backward compatible solder joints. On the contrary [Nandagopal 2005, 2006] found that backward solder joints with fully mixed microstructure could be achieved with a peak reflow temperature of about 210 ?C with 20-30 second dwell times, for certain paste to ball weight ratios. Nguyen, et al. [Nguyen 2007] found that complete mixing of SnPb solder with SnAgCu depends on the volume of the SnPb solder paste relative to that of the SnAgCu ball, and the soldering temperature. They concluded that proper mixing can result for reflow temperatures below 217 ?C if the right amount of SnPb solder paste is used. Finally, Sun and coworkers [Sun 2006], reported good reliability and relatively homogenous microstructure with reflow peak temperatures between 183-220 ?C. By using various alloying elements with Sn-Ag desired properties for different applications can be achieved. [Anderson 2001] reported that by addition of Co into Sn-Ag-Cu could improve its microstructure refinement and its ability to maintain the shear strength after aging. Without question, alloying will be the most simple and effective way to tailor the Sn-Ag 17 derived solders with the desirable properties for different applications. [Tsai 2003] reported the addition of Ni has the effect of substantially increasing the amount of intermetallic compound at the interface. 2.5 Prognostics and Health Management The ability to predict failures in systems and their sub-components has great potential to mitigate the risks of unanticipated failures and reduce the support costs. Prognostic methods can facilitate assessment of system status including early fault identification, damage initiation, damage accrual and estimation of remaining life of the product. Health monitoring of electronics is very relevant to high reliability applications. Application of prognostic and health management (PHM) to electronic systems is still relatively new in comparison with application of condition based maintenance to mechanical systems [Saxena 2008]. In case of mission critical applications like space explorations the reliability of the spacecraft is extremely important as they are away from the earth for considerably long periods of time. Effective on-board prognostic systems not only increase safety by detecting problems before they become serious and prevent major failures but also help schedule efficient maintenance [Schwabacher 2005]. Most of the avionics are intended for flight safety and thus the reliability associated with it can not be compromised at any point of time. Routine maintenance of such high reliability equipments requires advance planning and high expertise. On board diagnostic systems are intended to identify and localize component failures but it is well known that electronic parts can fail in number of different modes at different times resulting in ambiguous diagnosis. There is a growing need to develop prognostic techniques for such high reliability applications which can provide early device degradation warning for maintenance with considerable reduction in variability. Some of the 18 damage indicators that have been incorporated in the development of the prognostic techniques for avionics include power dissipation, output degradation and aging of semiconductors [Hecht 2006]. Switch mode power supplies (SMPS) commonly used aboard aircraft for various electrical power requirements are susceptible to malfunction due to component failures. PHM systems for fault detection and characterization such as BEAM have also been proposed for spacecrafts which involves system characterization using all available observation followed by training of the characterization with respect to normal phase operation [Park 2002]. The use of multiple sources of information for the interrogation of system state and fault detection in aircrafts has been proposed in which predictions from various subsystems is used for fault diagnosis [Oza 2002]. Field data from aircraft has been evaluated for the continuous health assessment of avionics and a prognostic software has been developed that involves mining of data from multiple sources, trending and ranking of anomalous indicators, development of on- board built-in-test (BIT) data and automated advanced reasoning for reduced ambiguity [Dussault 2006]. PHM for electronics has wide applicability spanning a number of different areas. Electronics used in critical applications like space, military and avionics require multiple deployments with sequential thermal stresses. Ultra high reliability is needed to ensure predictable operation when needed and avoid any catastrophic damage during the service life. Previously, Lall [2004a-d, 2005a-b, 2006a-f, 2007a-e] has developed leading indicators based prognostic and health management methodologies for residual life computation of electronics subjected to single thermal cycling and isothermal aging environments. Examples of damage pre-cursors include micro-structural evolution of second level solder interconnects, inter-metallic compound growth, stress and stress gradients. Researchers have reported the detrimental effect of thermal aging on the mechanical behavior of leadfree solders used in second-level 19 interconnects of component level packaging. It has been shown that the degradation of the mechanical and creep properties of the solders during aging is caused due to the micro-structural evolution. The aging effects are significant even at room temperature [Zhang 2009a]. This PHM methodology from earlier study has been used for residual life calculation of Sn0.3Ag0.7Cu solder alloys system which has been subjected to isothermal aging at 125?C. Reliability of the electronic power modules used in vehicles has always been a concern as it consists of numerous electronic components which undergo thermal stresses and fatigue due to power dissipation during usage. The nature of the gradual degradation of these power modules has enabled the development of prognostic systems for the same. Some of the signatures of impending failures including increase in forward on-voltage, leakage current and thermal impedance have been used as the damage proxies for the on-board prognostic system [Xiong 2008]. A typical electronic system consists of large number of semiconductor devices. Although it is sometimes possible to identify the principal failure mechanisms like dielectric breakdown in individual semiconductor devices this information however can not always aid in developing prognostic model for the entire system. Deployed electronic systems often may be subjected to multiple thermal environments. Thermal environments may change due to operational environments or change in usage profiles. Therefore a methodology has been developed for interrogation of damage state for SAC305 alloy system subjected to two different thermal cycling environments (TC-1: -55?C to 125?C and TC-2: 0?C to 100?C). Multiple environment approach enables assessment of accrued damage and the residual life assessment in the intended environment. There is need for tools and techniques which will enable the spot-assessment of the system?s health and provide method for estimation of remaining useful life. Prognostication of 20 sequential thermo-mechanical damage under single and multiple thermal cycling, based on damage pre-cursors is currently beyond the state of art. For multiple thermal environment scenarios, data on damage pre-cursors has been collected and analyzed for both cycling environments in order to develop a technique that can map life consumed in one cycle onto another cycle, this was necessary for calculation of differential damage during which no damage was incurred in the system. PHM methodology in conjunction with microstructural coarsening as a damage proxy is used for this study. Condition monitoring cells have been used for various conditions like calculation of differential damage, operational readiness and residual life computation in multiple environments. Results of interrogation of system state have been compared with a second set of experimental-matrix to validate the proposed methodology. 21 Chapter 3 Reliability of Second Level Solder Interconnect An electronic package is designed to protect an Integrated Circuit (IC) from electrical, mechanical, chemical, and thermal harm while providing interconnections to other devices. This function becomes increasingly difficult as ICs become in-Law [Moore 1965, Tummala 1998], which in one interpretation states that the transistor density on an IC will double every 18 months [Brown 1998]. As an example, in 1971 Intel?s 4004 chip had 2,250 transistors while in 2003 the Intel Itanium 2 Processor had 410 million transistors. The increase in transistor density relates to an increase in the number of interconnections coming from the chip to the substrate or printed wiring board (PWB). The International Technology Roadmap for Semiconductors [ITRS 2007] Edition calls for a maximum interconnect count of 600-2140 interconnects in 2007 to increase to 720-3367 interconnects by 2012 for cost performance packages. Electronic packaging technology has to evolve as the complexity of the IC grows and requires greater demands for electrical, mechanical, chemical, and thermal performance of the package [Perkins 2009]. The focus of this thesis is on the solder joint reliability of area array packages. Solder joint reliability at both the first level (chip to substrate) and second level (substrate to PWB) of packaging is a driving concern for area array packages. For plastic packages, the first level packaging is of interest as the Coefficient of Thermal Expansion (CTE) mismatch between the chip and substrate is high, while that of the substrate to PWB is low. This work will focus on 22 Plastic ball grid area array packages where the second level of packaging is of greater concern due to the high CTE mismatch between the substrate and printed wiring board (PWB). Area array electronic packages are increasing in substrate size, having greater interconnect density, and becoming more complex in geometry and material properties. These factors make it increasingly difficult to develop predictive equations for solder joint reliability. A typical approach to assessing solder joint fatigue reliability involves using analytical equations and numerical finite element models (FEM) for initial design, and experiments to confirm the failure modes and reliability of the electronic package. Electronic packages may be subjected to a variety of harmful conditions/ environments. 1. Thermal Cycling 2. Thermal Aging 3. Power Cycling 4. Vibration Loading 5. Mechanical Shock In this thesis, the focus is on thermal aging and thermal cycling. Thermal cycling refers to situations where the environment surrounding the electronic package undergoes cyclic thermal excursions. Often, an accelerated thermal cycle (ATC) test is performed to assess reliability. The ATC consists of a dwell at a high temperature, a ramp to a low temperature, a dwell at the low temperature, a ramp to the high temperature, and the cycle is then repeated. The electronic package experiences an isothermal temperature as it comes to equilibrium with the environment during the high and low dwells. The CTE mismatch between the substrate and PWB causes the solder joints to deform and fatigue over many cycles. Two common thermal cycling environments are the heating and cooling that occurs during a typical day during the morning 23 and evening hours, and the heating and cooling of an automobile engine compartment upon a person?s commute to and from their place of work. Power cycling (PC) refers to situations where the heat source is the electronic package itself or a component of the package. For example, every electronic package has a chip that is powered and thus dissipates heat through joule heating. The chip acts as a heat source and temperature gradients develop in the package causing expansion of the substrate and PWB. The [ITRS 2007] roadmap shows chip power consumption for high performance chips increasing from 0.33 W/mm2 in 2007 to 0.51 W/mm2 in 2012, while the chip size increases from 662mm2 to 750mm2. This translates into a significant 1.75x increase of power consumption from 218 Watts in 2007 to 313 Watts in 2012. At the same time, the [ITRS 2007] shows the maximum junction temperature for high performance chips dropping from 95?C to 90?C. The need for determining reliability under power cycling is critical, along with the need for better thermal management solutions. Further impact reliability or vibration deals with the consequences of electronic packaging subjected to drop and shock or vibrations. Mechanical reliability is important in the case of hand-held devices such as cell phones, PDAs and laptops as these devices have high chances of being subjected to drop or in the case of electronics in power tools which are subjected to large vibrations [Perkins 2009]. In this thesis, reliability of lead free solder joints has been evaluated in terms of remaining useful life left in the electronic package after it has been subjected to thermo-mechanical loading. For this purpose, a mathematical approach for interrogation of system state under cyclic thermo-mechanical stresses has been developed for lead free solder alloy system. In series of challenges faced by packaging industry related to reliability the most recent one is the transition form leaded to lead free alloys in solder interconnects. In past most of the 24 electronic applications had leaded alloys and there is substantial amount of data available about their reliability issues. The low-cycle fatigue failure of lead tin eutectic solder joints due to the CTE mismatch is fairly well understood in literature. But on July 1st, 2006 the European Union waste electrical and electronic equipment directive (WEEE) and Restriction of hazardous substances directive (RoHS) came into effect prohibiting the intentional addition of lead to most consumer electronics produced in the EU. This started the transition from leaded to lead-free alloys but very little was known about the reliability issues of various lead free alloys (especially Sn-Ag-Cu alloys). Most lead free replacement alloys place higher demands on package material sets due to the required higher reflow temperatures. This condition results in different material sets, assembly processes, and pre-conditioning requirements for packages. Providing a package that can meet these stringent reflow and pre-conditioning requirements while still maintaining acceptable package level reliability is not enough, as the impact to board level reliability is also a primary concern. Lead was a major constituent of solder that was used extensively within electrical and electronic equipment. So there were few alternatives to replace Sn-Pb solder by some Lead free solder. Now each material has its own degree of compatibility with Sn-Pb solder in terms of manufacturability, joint reliability and cost. Each alternative required in depth investigation into its joint integrity. In this study both thermal aging and thermal cycling aspects of thermo-mechanical reliability are studied. 3.1 Effect of Thermal cycling on solder joint reliability Thermal cycling as mentioned before refers to a situations where the environment surrounding the electronic package undergoes cyclic thermal excursions. Often, an accelerated thermal cycle (ATC) test is performed to assess reliability. The ATC consists of a dwell at a high temperature, a ramp to a low temperature, a dwell at the low temperature, a ramp to the high 25 temperature, and the cycle is then repeated. The electronic package experiences an isothermal temperature as it comes to equilibrium with the environment during the high and low dwells. The CTE mismatch between the substrate and PWB causes the solder joints to deform and fatigue over many cycles. Solder joints are known as one of the weakest elements of microelectronics assemblies. The integrity of solder joints in most microelectronics assemblies is of concern in systems where reliability is of great importance since the stresses experienced by the joints during service can lead to premature failure. This is mainly because the solder joints often constraint materials of different coefficient of thermal expansion (CTE) that imposes cyclic strain (fatigue) through the joints when thermal fluctuations are encountered. In addition, the high homologous temperature at which solder operates at constant stress, makes creep predominant in the solder joints. Due to viscoplastic nature of plastic, large creep and plastic deformations accumulate in a solder joint during thermal cycling, which eventually lead to thermal fatigue failures [Hwang 1996, Lau 1996]. Therefore, such fatigue creep interaction effect in microelectronic packages must be considered when evaluating the reliability of solder. The reliability assessment of solder joints under creep-fatigue effect can be carried out by thermal cycling (TC) test. Thermal cycling imposes cyclic strains over the solder joints of electronic components. 3.1.a Cyclic Behavior and Creep Fatigue Interaction The strains experienced by a solder joint are dominated by plastic yield strain above the yield point and time-dependent creep-strain components and can be quite large depending upon the difference in coefficient of thermal expansion (CTE) between the substrate and device, component size, the temperature excursion from equilibrium and other factors. The creep properties and microstructure of solder play an important role since the homologous temperature 26 of solder in electronics applications can easily exceed 0.75, and be as high as 0.9 under the hood of a high-powered automobile. Generally, metallurgical processes involving diffusion occur at significant rates in metals at 0.5 Tm, where Tm is the melting point of the alloy [Martin and Doherty 1980]. Thus, solders are used in a high-temperature regime in which the microstructure is unstable and creep and stress relaxation occurs rapidly. These factors combine to make fatigue-life predictions for solders difficult. Fatigue results from cyclic loads that are induced in solder joints due to differential expansion of the package, or in the case of DCA the die, and substrate materials. Cyclic loads occur during cyclic temperature changes. These changes are produced by environmental exposure and system operation. For example, a television may be turned off and on 4 times per day. With each on time of the duty cycle, the temperatures of the components rise to their equilibrium temperature, according to the thermal design. When turned off, they cool down. This is repeated each time the product is operated and the temperature range may be typically from 20?C to 60?C. With each cycle, fatigue damage may be induced in the solder joints of surface- mounted components housed within the product. Environmental temperature change can also be significant. With the combined effects of duty cycle, severe cyclic loading conditions are imposed upon the joints. Under the hood of an automobile, for example, the cyclic range may be from ?40 to +125?C [IPC-9701]. In addition, testing is often conducted under very severe conditions, such as ?55 to +125?C, to reduce test time. A schematic of a thermal cycle and a corresponding schematic of the deformations in a selected BGA joints is shown in Figure 3.1 along with a failed BGA solder joint from a test under similar conditions [Evans 2007] The cyclic behavior of solder during a thermal cycle is a complex interaction between creep and low cycle fatigue. The effect of creep behavior manifests itself during the hold time 27 occurring after the application of thermally induced loads. Stress relaxation occurs during the hold phase of the cycle producing corresponding strains. This process maximizes the total plastic strain energy delivered to the solder over the cyclic regimen and greatly complicates fatigue-life predictions, particularly for severe conditions. Let us examine the cyclic behavior of a solder alloy during thermal cycling over conditions such as those shown in Figure 3.1. If the coefficient of expansion of the substrate is different from that of the component, the joints will suffer deformation as the assembly is heated from equilibrium. Then, as the assembly is cooled, the deformation is reversed. Stress relaxation, particularly at the higher temperature, will result in a maximization of the plastic strain energy accumulated by the joint. As a result, fatigue damage is maximized at each applied cycle. During the cycle, the solder will cyclically strain harden for the first few cycles [Wild 1974, Becker 1983]. Cycling continues and the capability to support loads drops with crack initiation and propagation. The cyclic effects on the alloy are best described by the stress-strain hysteresis loop. Let us examine the hysteresis loop in relation to a thermal cycle we have just shown in Figure 3.1. Initially, we increase the temperature from equilibrium to the high extreme and then hold this temperature. As we see in Figure 3.2 the stress in the joint increases according to the monotonic behavior of the alloy, at first near elastically then with increased yielding as the yield strength of the solder decreases with increasing temperature. Then, as the temperature extreme is reached, stress relaxation occurs and plastic strains increase until we reach the maximum strain range at the end of the hold time. We now ramp down to the low temperature and stress increases in the opposite direction, reaching a maximum at the low extreme of the cycle. At the colder temperature, much less creep occurs than at the hold time at the upper limit. We now ramp back up to the upper extreme. After 3-4 cycles the loop stabilizes in shape. However, as cracks initiate 28 and begin to propagate through the joint, the loop will compress as the load required to produce the same strain decreases. In some cases, we may see the loop shifting right with each cycle. This is called creep ratcheting and may be encountered over extreme cycles or in leaded structures with high lead stiffness [Evans 2007] As we see Figure 3.3, the shape of the loop depends upon the monotonic, creep and stress-relaxation behavior of the alloy and the cyclic conditions. The total work done during the cycle is the area of the hysteresis loop, which as we discuss later, is a measure of damage per cycle. The shape is controlled by a number of interrelated factors. These factors include the temperature cycle extremes, strain rates or temperature ramp rates, the solder properties and in part the structural stiffness of the surrounding structures that make up the lead, component and printed wiring board. The maximum stresses reached will depend upon the interaction of temperature and strain rates on the monotonic properties of the joint. Rapid changes or high strain rates will favor higher stresses, while higher temperatures will favor lower stresses. The maximum strain obtained will depend upon the interaction of the temperature extremes, hold time and creep properties of the solder. Higher temperatures and longer hold times will favor higher creep rates. This in turn will tend toward greater strain ranges. Greater structural stiffness of leads, PWBs and components will favor higher stresses and greater strains as with the temperature changes. The conventional fatigue model, which forms the basis of fatigue-life prediction, combines Basquin?s equation for elastic-strain-based high-cycle fatigue with the plastic-strain- driven low-cycle fatigue described by the Coffin-Manson [Fuchs and Stephens 1980] equation. Experimental work, primarily by [Wild 1974, 1975], showed that the fatigue life in soldered surface-mounted structures is dominated by plastic shear strains. Engelmaier and others proposed 29 that the fatigue life of solder joints can be modeled using only the low-cycle fatigue portion of the classic model. This is shown in Equation 3.1 for shear-dominated loading [Engelmaier 1984, 1989, 1990]. c ff N )(2 '?? =? (3.1) In this case the shear strain range p?? , is expressed as a function of the ductility coefficient, f? and Nf the cyclic life. The fatigue ductility coefficient is related to the true strain at fracture although they may not be equal for any given alloy. p?? can be predicted from strain estimates specific to the cyclic conditions or from a strain analysis using finite elements or analytical approaches. Engelmaier further expressed the fatigue ductility exponent, c, as a function of temperature and dwell time to account for fatigue-creep interactions, as based on data accumulated by [Wild 1974, 1975]. This accounts for the degree to which the creep/stress relaxation process is complete during cycling. For most operational cycles the creep/stress relaxation process is essentially complete, whereas in accelerated temperature cycling this process is substantially incomplete. 30 Figure 3.1: A severe temperature cycle and schematic of deformations in selected BGA joints at the cyclic extremes. The PWB is shown crosshatched. Under the conditions shown the coefficient of thermal expansion of the PWB is greater than the BGA package. The inset shows a failed joint [NASA 1968] 31 Figure 3.2: Hysteresis loop initiated for a thermal cycling profile, with a cold minimum temperature, at which creep strain is small, during the low-temperature hold time [NASA 1968]. 32 Figure 3.3: Schematic representation of hysteresis loop showing the factors governing the shape of the loop [Engelmaier 1984]. While Equation 3.1 provides an adequate estimate of the inelastic strain range, described by the cyclic hysteresis loop for leadless surface-mount solder joints, it is a simplification. This is similar to the Coffin-Manson equation being a simplification of the more complete Morrow equation. In further work, Engelmaier uses a more complex form of Equation 3.1 for the more 33 complex analysis of leaded surface-mount solder joints [Engelmaier 1984, 1989, 1990]. Direct consideration of the strain energy density, extracted from estimates of the hysteresis loop, provides for directly accounting for the monotonic behavior and the effects of creep and stress relaxation at a given cyclic condition. Cyclic life is then estimated from Equation 3.2, kc f WN 1 0 ?? ? ?? ?= ? (3.2) Here, failure conditions must be defined and then the coefficient 0? and exponent k can be determined for a specific alloy from test data and hysteresis loop estimates. In the development of his variation of the Coffin-Manson equation from Wild?s data, Engelmaier noted a change in the trend in cyclic behavior within the range of 0? to -20?C for near-eutectic SnPb solders. Other investigators have noted the same transition [Solomon 1986, Vaynman 1990]. This transition can be explained in part by the reduction in the dominance of creep strains as expected at lower temperatures. In addition, the mechanism of creep deformation may change within this range, from domination of grain or interphase-boundary sliding to matrix creep. Also, there is a significant increase in the ability of the solder to accommodate stress build up due to increased strength. These changes in solder properties essentially create a fatigue-behavior envelope from approximately 0?C to 125?C, which can be referred to as the Engelmaier-Wild envelope. We expect similar behavior in many other alloys with the extent of the behavioral change to be dependent upon the monotonic and creep properties of the alloy. Within the envelope range in temperature, simple models, properly applied, may provide adequate predictions of fatigue life. However, outside of this range, more complex fatigue models using strain energy density extracted from hysteresis behavior may be better for fatigue predictions. 34 3.1.b Microstructure and Cyclic Behavior Microstructural texture plays an important role in the fatigue behavior of solders. This is due to the dominance of creep behavior, operating temperatures and the importance of ductility to the short life. In general, microstructure in metals will affect creep resistance, depending upon the creep mechanism. For instance, larger grain sizes, or a coarser fully developed microstructure, will tend to be more resistant when grain-boundary sliding dominates the total creep strain [Kennedy 1974, Wen 1992]. In eutectic SnPb solder, the effect of the size of the lead-rich phase on the kinetics of creep crack growth was demonstrated by [Wong 1988]. They showed the relationship of the lead-phase size to the propagation of creep cavitation cracks through a complex model that included the grain diameter of the lead-rich phase. These microvoids (cavitations) at grain-boundary intersections form relatively early in the life of solder joints. These microvoids grow into microcracks, which grow and coalesce to ultimate formation of a macrocrack, and solder-joint failure. [Tribula and Morris 1989] also related creep resistance to microstructure. Their experiments indicated that microstructural uniformity affected the resistance to creep crack development and growth. Observations of various alloys under creep loading revealed that additions of cadmium (Cd) or indium (In) at 2% levels improved creep resistance due to improved microstructural uniformity. A uniform microstructure tends to distribute the load evenly over the specimen leading to a resistance to strain-induced grain growth and crack initiation. This may also account for the improved creep resistance observed in 62Sn-36Pb-2Ag by [Wild 1974, 1975] and similar effects were noted by [McCormack and Jin 1994] in ternary alloys of SnZnIn with additions of 0.1% Ag and in SnAgZn with additions of 0.5% Cu. It has also been shown that fine-grained solder joints exhibit fatigue lives larger by a factor of two to three than coarse-grained solder joints in accelerated testing. Unfortunately, 35 during most of the life of a solder joint it exhibits a coarse grain structure, because the solder grain structure is inherently unstable. Thus, IPC-SM-785 and IPC-9701 strongly suggest initial grain coarsening prior to accelerated temperature cycling to reduce artificially long fatigue-life indications. The relationship of microstructure to fatigue resistance is less clear. However, as stated, the failure mechanics of solder in electronic system environments involves a complex interaction of creep and cyclic fatigue. Given this fact, some inferences can be drawn about the relationship of fatigue to microstructure. The total strain occurring in a cyclic regimen may be partitioned as shown in Equation 3.3 ?T = ?e+?p+?c (3.3) The extent to which each component dominates the total strain, hence, the fatigue life, will be largely dependent on the environment and loading conditions of the joint. Soldered assemblies operated in environments with temperatures and hold times that allow the creep strain component (?c) to largely dominate the hysteresis loop, will be affected by the same microstructural factors affecting creep resistance. At temperatures below about 0?C or at short hold times, creep strains will play a much smaller role and microstructural properties affecting ductility will play a larger role, as elastic-plastic behavior dominates the hysteresis. It is worth noting that these effects are offsetting. Ductility is adversely affected by increasing coarseness or grain size, while creep resistance is improved [Kennedy 1974, Wen 1992]. This underscores the need for utilizing accelerated test conditions that are representative of actual use environments, as well as the need for developing the microstructure through artificially aging prior to initiating fatigue tests [Evans 1990]. It also shows the need to critically evaluate solder alloying effects in an appropriate cyclic regime. 36 3.2 Effect of thermal aging on solder joint reliability The microstructure, mechanical response, and failure behavior of lead free solder joints in electronic assemblies are constantly evolving when exposed to isothermal aging and/or thermal cycling environments [Xiao 2004a and 2004b, Ding 2004 and 2007, Pang 2004, Darveaux 2005, Dutta 2005, Medvedev 1956, Lampe 1976, Miyazawa 1999 and 2001, Chilton 1989, Gagliano 1999, Tsui 2002, Lee 2002, Hasegawa 2001, Li 2002, Chou 2002, Law 2004, Chiu 2004, Ma 2006 and 2007 and 2008, and Zhang 2008 and 2009]. The observed material behavior variation during thermal aging/cycling is universally detrimental to reliability and includes reductions in stiffness, yield stress, ultimate strength, and strain to failure, as well as highly accelerated creep. Such aging effects are greatly exacerbated at higher temperatures typical of thermal cycling qualification tests. However, significant changes occur even with aging at room temperature [Xiao 2004a and 2004b, Pang 2004, Darveaux 2005, Medvedev 1956, Lampe 1976, Miyazawa 1999 and 2001, Chilton 1989, Gagliano 1999, Coyle 2000, Tsui 2002, Lee 2002, Chiu 2004]. As early as 1956, Medvedev [1956] observed a 30% loss of tensile strength for bulk solder Sn/Pb solder stored for 450 days at room temperature. In addition, he reported 4-23% loss of tensile strength for solder joints subjected to room temperature storage for 280-435 days. In 1976, Lampe [1976] found losses in shear strength and hardness of up to 20% in Sn-Pb and Sn- Pb-Sb solder alloys stored for 30 days at room temperature. Miyazawa [1999, 2001] measured significant hardness losses and microstructural coarsening for Sn-Pb, Sn-Ag, and Sn-Zn eutectic solders stored at 25?C for 1000 hours, while Chilton [1989] observed a 10-15% decrease in fatigue life of single SMD joints after room temperature aging. Several studies [Gagliano 1999, Coyle 2000, Tsui 2002, Lee 2002] have also documented the degradation of Sn-Pb and SAC solder ball shear strength (10-35%) in area array packages subjected to room temperature aging. 37 The effects of room temperature aging on the mechanical properties and creep behavior of SAC alloys have been extensively discussed by Ma [2006, 2007, 2008, 2009] and Zhang [2008, 2009] have further showed the effects of aging on mechanical behavior of lead free solders by performing creep tests on four different SAC (SAC105, SAC205, SAC305, SAC405) alloys that were aged for various durations (0-6 months) at different temperatures (25oC, 50oC, 75oC, 100oC and 125oC). Analogous tests were performed with Sn-Pb solders for comparison purposes. The results indicated a significant increase in creep rates of lead free solders, and the effects of aging were more pronounced at aging temperatures above 50oC. The recorded data also demonstrated that the creep rates of lead free solders experience a ?cross over point? where lead free solder begins to creep at higher rates than standard 63Sn-37Pb solder for the same stress level. The cross over points was observed for all the SAC alloys and for all aging temperatures except room temperature (25oC). The packages in this study were subjected to thermal aging condition at 125?C up to 3333 hrs. 38 Chapter 4 Prognostics Health Management of Lead Free Based Solder Electronics in Single Thermal Environment In this section, a mathematical approach for interrogation of system state under iso- thermal loading has been developed for SAC0307 lead-free solder alloy systems. Data has been collected for leading indicators of failure for SAC0307 alloy system under the application of isothermal aging environment. Methodology presented resides in the pre-failure space of the system in which no macro-indicators such as cracks or de-lamination exist. Systems subjected to thermo-mechanical damage have been interrogated for system state and the computed damage state correlated with known imposed damage. The approach involves the use of condition monitoring devices which can be interrogated for damage proxies at finite time-intervals. Interrogation techniques are based on non-linear least squares methods. Various techniques including the Levenberg-Marquardt Algorithm have been investigated. The system?s residual life is computed based on residual life computation algorithms. Detection of system-state significantly prior to catastrophic failure can significantly impact the reliability and availability of electronic systems. Requirements for system availability for ultrahigh reliability electronic systems are driving the need for advanced heath monitoring techniques for early detection of onset of damage. Traditional health monitoring methodologies have relied on reactive methods of failure detection often providing little on no insight into the remaining useful life of the system. 39 4.1 Introduction There is a growing need to develop and demonstrate technologies that can monitor and predict the remaining service life of key elements including electronics in implantable biological applications [Stanton 2002], automotive applications [Bodensohn 2005], defense [Greitzer 1999], and civil infrastructure applications [Bond 1999]. Pacemakers and implantable cardioverter-defibrillators (ICDs) are among the most critical life-support and complex medical devices in use today. However, several recent high-profile device malfunctions have called into question their safety and reliability. Several database registries including the United Kingdom, Danish and Bilitch Registries have monitored pacemaker and ICD safety performance. In total, hundreds of device malfunctions affecting dozens of pacemaker and ICD models have been reported. A study of pacemaker and ICD advisories, a surrogate marker of device reliability, demonstrated that the number and rate of pacemakers and ICDs affected by advisory has increased since 1995 [Maisel 2001, 2002, Song 1994, Stanton 2002]. In case of mechanical systems, like propulsion systems, compressors, gears, etc damage progresses mainly due to wear (prolonged usage), or imbalance condition in one of the rotating elements, or from misalignment of the shafts of the rotating components which leads to changes in the vibration signature of the equipment. By comparing the vibration signals from the defective equipment with those from sound equipment, the performance degradation can be characterized [Dyne 1992]. Maintenance has evolved over the years from corrective maintenance to performing time-based preventive maintenance. Future improvements in reduction of system downtime require emphasis on early detection of degradation mechanisms. Incentive for development of prognostics and health management methodologies has been provided by need for reduction in operation and maintenance process costs [Jarrell 2002]. New advances in sensor 40 technology and failure analysis have catalyzed a broadening of application scope for prognostication systems to include large electromechanical systems such as aircraft, helicopters, ships, power plants, and many industrial operations. Current PHM application areas include, fatigue crack damage in mechanical structures such as those in aircraft [Munns 2000], surface ships [Baldwin 2002], civil infrastructure [Chang 2003], railway structures [Barke 2005] and power plants [Jarrell 2002]. The concept of prognostication of aircraft hydraulic system using signature analysis of measurable condition parameters such as port timing, internal leakage has been demonstrated by [Smeulers 2002]. Wayside detection involving fault identification using interrogating sensors placed along the sides of railway tracks has been used in the railway industry for gathering information about vehicle performance. Information on the vehicle condition and performance over an extended period of time is recorded in an online database, which is interrogated for critical performance parameters to provide information on condition of in-service railway vehicles [Barke 2005]. A model-based method has been used for the on-line identification of cracks in a rotor of aircraft engines which start and stop quite frequently and run at high speeds [Sekhar 2003]. Detection of surface corrosion has been used to reduce the maintenance required, and trigger preventive repair for increased aircraft availability and significantly reduced cost of ownership. Fluorescent fiber optic sensors that detect aluminum coating from the early stages of the corrosion process have been used for providing early warning of corrosion in susceptible areas of an aging aircraft [Maalej 2004]. Crack modeling approach in beam has been used to demonstrate the structural HM using low frequency vibration; simple models of crack flexibility based on beam elements are adequate [Friswell 2002]. Optical fiber based sensor system has been used on concrete structure to evaluate its performance for health 41 monitoring [Fernando 2003]. Monitoring bridge performance has been done to answer questions on the performance of existing bridges, refine techniques needed to evaluate different bridge components, and develop approaches that can be used to provide a continuous picture of a bridge's structural integrity using structural health monitoring [DeWolf 2002]. These techniques help in detection of damage of bridges or building to avoid the economic and social effect of aging and deterioration [Chang 2003]. In other applications, signal feature analysis is used to detect abnormalities related to impending failure indication by an inference system using an historical database [Hess 2001, 2002]. In electronics assemblies, the built-in-self test (BIST) circuit involving error detection and correction circuits are used to give electronic assemblies the ability to test and diagnose themselves with minimal interaction from external test equipment [Chandramouli 1996, Drees 2004, Hassan 1992, Williams 1983, Zorian 1994]. The results obtained from BIST functions can generate diagnostic information which in turn provides additional confidence in the measurement result and confirms the device availability. BIST helps in minimizing the interaction with external automated test equipment (ATE) as well as provides the advantage of a more robust ?at- speed? test of the circuitry, however, the current form of BIST gives little insight about the system level reliability or the remaining useful life of the system. Several studies conducted [Allen 2003, Drees 2004, Gao 2002, Rosenthal 1990] have shown that BIST can be prone to false alarms and can result in unnecessary costly replacement, re-qualification, delayed shipping, and loss of system availability. Fuses and Canaries may be mounted on a part to provide advance warning of failure due to specific wear out failure mechanism. Advanced warning is used to provide a maintenance-window for correction action, after an initial failure or malfunction, to prevent additional or secondary failures [Mishra 2002, Anderson 2004]. 42 However, past efforts have provided limited insight into methods for estimation of remaining useful life. Lall [2004b, 2005, 2006a,b, 2007a,b] have previously developed leading indicators of failure. Proxies like the intermetallic growth of solder interconnects have been experimentally identified as leading indicators to failure. In this thesis, the PHM approach presented is different from state-of-art diagnostics and resides in the pre-failure-space of the electronic-system, in which no macro-indicators such as cracks or delamination exist. The presented PHM methodologies enable the estimation of prior damage in deployed electronics by interrogation of the system state. This methodology eliminates the need to capture the prior stress history and helps in accurate prediction of remaining useful life. In this part of thesis a mathematical approach has been presented to calculate the prior damage in electronics subjected to isothermal thermo-mechanical loads. This health monitoring framework will facilitate quick assessment of system state and potential for failure of critical electronic systems. 43 4.2 Test Vehicle and Methodology 4.2.a Test Vehicle In the present study, Plastic ball grid area-array packages with SAC0307 alloy solder interconnects assembled on FR4 laminates and electroless nickel immersion gold (ENIG) board finish have been studied. Table 4.1 shows package parameters for the test vehicles used in this study. Table 4.1: Test Vehicle Solder 99Sn0.3Ag0.7Cu Body Size 10mm Package Type CABGA Ball Count 100 Ball Pitch 0.8mm Die Thickness 0.26mm Die size 6.4mm BT thickness 0.26mm BT Pad type NSMD Ball Diameter 0.50mm Board Finish ENIG Test Condition Iso-thermal aging at 125?C 44 Components analyzed include plastic ball grid arrays with 100 I/O, pitch size 0.8 mm and body size of 10mm. The boards contain six trace layers to simulate the thermal mass of a true production board, though all functional traces were run on the topmost layer. All pads on the board were non-solder mask defined (NSMD). Figure 4.1 shows the test vehicle used for this study. Intermetallics data has been gathered and analyzed using image processing. Figure 4.1: Test Vehicle 4.2.b Methodology Figure 4.2 demonstrates the methodology used for this study. Design of experiment was established for the measurement of Intermetallic growth with respect to Isothermal aging for lead free solder interconnect (CABGA packages). Packages were subjected to Isothermal aging at 125?C to various intervals of time. The packages were cross-sectioned, potted, polished and sputter coated at various intervals of time. Further SEM images were taken of Intermetallic 45 growth at various intervals of time at 1000X magnification. An imaging software was used to measure the Intermetallic growth at various intervals of time. Intermetallic thickness growth was plotted vs time to develop a relationship between the two. Further prognostication based on intermetallic growth as leading indicator of failure was done to estimate the prior accrued damage in the system. Figure 4.2: Methodology used for the Study Develop relationships between leading indicator and underlying damage. Isothermal Aging Test at (125?C) for different durations DOE for IMC growth measurement Time Evolution of Leading Indicator of failure. Prognostication of prior damage in the system based on intermetallic growth 46 4.3 Intermetallic Growth as leading indicator of failure In this portion of the study, the growth of the intermetallic thickness during thermal aging as leading indicator of failure has been explored. The present test vehicle has been used to investigate the correlation of interfacial intermetallic thickness growth versus thermal aging. From past studies it has be known that interfacial intermetallic layers are formed between solder and copper, and some precipitates appear near the interface of the intermetallic compound (IMCs) / solder. The compositions of the IMC layer are identified as Cu6Sn5 for the layer near the Solder Interconnect, and Cu3Sn, for the layer near the Copper Pad. With the increasing aging time, the IMC layers thicken, and the local irregularities appear to gradually smooth out. In order to investigate the correlation of interfacial Intermetallic thickness growth versus thermal aging, the component has been cross sectioned at various interval of thermal aging. The aged components were sliced periodically to measure the Intermetallic thickness in SEM using 1000x magnification. Colloidal silica solution has been applied for the detailed intermetallic compound composition observation and detection. The mean thickness of Intermetallic layers were measured using commercial image processing software on SEM images, as a shown in Figure 4.3. Analysis of Intermatallic Thickness growth at various intervals of time; indicates a square root dependence of Intermetallic thickness on aging time Lall [2004b, 2005, 2006a,b, 2007a,b]. 2/1 0)( Ktyty += (4.1) Where y (t) is Intermetallic growth thickness during aging time interval t, y0 is the initial thickness of Intermetallic compounds, k is the coefficient standing for the square root of the diffusivity at aging temperature. The exponent value, n = ? has been used in Equation (4.1) above, which reveals a diffusion-controlled mechanism during aging. 47 Figure 4.3: IMC measurement at board side copper pad. The IMC growth data in this study indicates that growth rate stays fairly uniform during the thermal aging. It is observed that for Sn-Ag solder systems, the Intermetallic compound thickens roughly as 2/1t in a linear manner, where t is the aging time as expected for diffusion- controlled growth. From past studies [Lall 2005] have found that IMC growth rate of SnPb solder is at least 1.5 times higher than the 95.5Sn4Ag0.5Cu solder. The IMC thickness in the lead free solder is much thicker than the SnPb solder at unaged stage but the growth rate is higher in SnPb solder than 95.5Sn4Ag0.5Cu. A correlation between IMC growth rate and time can be used as a proxy parameter and evaluation of time at temperature for a deployed part. 48 4.4 Interrogation of System State In this section, a methodology for determining prior damage by interrogating the damage proxies of test structures has been presented. A set of electronic assemblies consisting of SAC0307 alloys system has been subjected to isothermal aging at 125?C. The thermal environment was intended to simulate a field application environment. The parts are withdrawn from the application environment for redeployment in a new field environment. The damage proxies have been interrogated to determine the extent of damage inflicted and also remaining useful life of that assembly if it is to be re-deployed. Following sections will explain the prediction of stress history using IMC growth in thermal aging environment. Here combination of Levenberg Marquardt algorithm along with intermetallic growth is used for calculation of unknown life consumed due to thermo-mechanical loading. 4.4.a Levenberg-Marquardt Algorithm The relationship between the phase growth parameter and time is nonlinear because it contains terms with fourth power. Inverse solution for interrogation of system-state is challenging for damage evolution in such systems. Levenberg-Marquardt (LM) algorithm is an iterative technique that computes the minimum of a non-linear function in multi-dimensional variable space [Madsen 2004, Lourakis 2005, Nielsen 1999]. It has been used successfully for computation of nonlinear least-square solutions. The Levenberg-Marquardt method with a combination of steepest descent using line-search and the Gauss-Newton method has been used for solution of the problem. Let ? be an assumed functional relation between a measurement vector referred to as prior-damage and the damage parameter vector, p, referred to as predictor variables. Mathematically, the function, f, which maps a parameter vector p ? Rm to an estimated 49 measurement vector is represented as, x=?(p) x ? Rn. The measurement vector is the current values of the leading-indicator of failure and the parameter vector includes the prior system state, and accumulated damage and the damage evolution parameters. An initial parameter estimate p0 and a measured vector x are provided and it is desired to find the parameter vector p, that best satisfies the functional relation ? i.e. minimizes the squared distance or squared-error, ?T? with ? = x - f(p) . Assume that g(p) = ?T? is the squared error. The basis of the LM algorithm is a linear approximation to g in the neighborhood of p. For a small ?p, a Taylor series expansion leads to the approximation, ppJpgppg ?? )()()( +?+ (4.2) Where, J = Jacobian matrix ??(p)/?p. For each step, the value of ?p that minimizes the quantity ?= x ? Jf(p), has been computed. Then the minimizer parameter vector, p, for the error function has been represented as, )()(21))((21)( 1 2 pgpgpgpF T m i i == ? = )()()( pgpJpF T= (4.3) )()()()()()( " 1 " xgxgxgpJpJpF iii m i T = ?+= Where F(p) represents the objective function for the squared error term ?T? , J(p) is the Jacobian, and F?(p) is the gradient, and F?(p) is the Hessian. An initial parameter estimate p0 and a response-vector ?x? are provided and it is desired to find the vector p+, that best satisfies the functional relation x=f(p), while minimizing the squared distance ?T? . The steepest gradient descent method has been used to impose the descending condition, i.e.,F(Pk+1)0 ensures that coefficient matrix is positive definite, and this ensures that h is a descent direction. When the value of ? is very small, then the step size for LM and Gauss-Newton are identical. Algorithm has been modified to take the 51 equations of phase growth and inter-metallic growth under both isothermal aging and cycling loads to calculate the unknowns. 4.5 Prognostication of Leading-Indicator Levenberg-Marquardt Algorithm has been used to interrogate the system state in terms of damage proxies in this study. The LM algorithm has been modified to take the equations for leading indicators of failure (inter-metallic growth) under iso-thermal aging loads. The methodology is as follows: 4.5.a Intermetallic Compound Growth The following Intermetallic Compound growth equation has been used for the development of the prior stress history is as follows: ( ) 5.00 )t(kyty += (4.7) In order to interrogate the system state using IMC as a damage proxy, three condition monitoring devices have been withdrawn at discrete time intervals, leading to the following equations for the evolution of IMC thickness. ( ) 5.0101 )tt(kyty ?++= (4.8) ( ) 5.0202 )tt(kyty ?++= (4.9) ( ) 5.0303 )tt(kyty ?++= (4.10) The unknowns in this case being y0, k and t. In order to explore the whole design space, acceptable range for each variable, for each alloy was developed. Table 4.2 shows the range for each variable for SAC0307. 52 Table 4.2: Variable Range for IMC growth for SAC0307 Alloy System Initial IMC ?y0? (in ?m) Constant ?k? Time ?t? (in hrs) SAC 0307 2.20 ? 3.70 0.016 ? 0.029 200 - 1600 The form of equation used in LM for IMC growth is, ( ) 2/10 ttky)t(y ?++= (4.11) The Jacobian with respect to each unknown was also provided as follows: 1yy 0 =?? (4.12) ( ) 2/1ttky ?+=?? (4.13) ( ) 2/1tt k 2 1 t y ?+=? ? (4.14) Initial guess values for variables y0, k, t were varied one at a time, while keeping the other three variables constant and were provided as input to the Levenberg-Marquardt algorithm. The output from the algorithm, y0, k, t and minimization error was computed for each iteration. The row corresponding to the least minimization error was isolated, and the variables in that row were selected as the final values for y0, k, t. 53 4.6 Case Study: Model Validation under Isothermal loads In this portion of the study, the damage proxy, growth of the intermetallic thickness during thermal aging as leading indicator of failure, has been measured. The cycled components have been cross sectioned at various interval of thermal aging. Figure 4.4 shows SEM backscattered images exhibiting examples of IMC growth with aging time for 100 I/O, BGA solder ball with Sn0.3Ag0.7Cu alloy respectively. The cycled components have been cross sectioned at various interval of thermal aging. Figure 4.5 shows the IMC growth versus thermal aging time for solder alloys Sn0.3Ag0.7Cu. In order to calculate the damage and remaining useful life under isothermal load the IMC thickness data were taken for different packages for four different time intervals in the time-neighborhood of prognostication of the electronic package, at different aging times. The measured IMC thickness values were given as input to the Levenberg-Marquardt Algorithm. For the problem being analyzed, it was found that the LM- solution will tend to converge to local minima, because it does not explore the whole design space. In order to circumvent the problem, several initial guess values have been supplied within the trust-region. The solution has been identified as the one with minimum error. 54 Figure 4.4: Back-scattered SEM images of IMC Growth versus Thermal Aging for Sn0.3Ag0.7Cu (Magnification 1000x) 55 Time, hr^0.5 0 10 20 30 40 50 60 70 IM C Th ick ne ss (y- y 0) (in ????m ) 0 2 4 6 8 SAC 0307 (y - y 0 ) = k(t)0.5 k = 0.1275 Figure 4.5: IMC Growth, at various levels of time for CABGA 100 with Sn0.3Ag0.7Cu alloy. In the case of isothermal aging, the values of y0, k, and t have been computed. The computed values of y0, k, and t have been compared with the experimentally measured values for the same package. Figure 4.6 and Figure 4.7 show the results from prognosticate of thermal aging based on IMC Growth. Prognostication is done for two experimental data points t= 667 hours and t = 1333 hours. From the prognostication of first experimental data point the error comes to be minimum in the neighborhood of 690 hours, indicating that prior deployed-life, t = 690 hours is the solution for the 100 I/O BGA with Sn0.3Ag0.7Cu solder alloy interconnects. Further the prognostication of second experimental data points shows error to be minimum in the neighborhood of 1250 hours, indicating that prior deployed-life, t = 1250 hours is the solution. 56 Both the values correlate well with the actual value of 667 hours and 1333 hours from experimental data. Table 4.2 shows the t values and their correlation of computed values with experimental values for Sn0.3Ag0.7Cu alloy system. Table 4.2 shows the y0 values and their correlation of computed values with experimental values for Sn0.3Ag0.7Cu alloy system. The predicted evolution of IMC thickness and aging time has been plotted along with the measured evolution in Figure 4.8. The experimental data and the model predictions show good correlation. Figure 4.6: Global Minima for IMC based History Calculation for 100 I/O CABGA, Sn0.3Ag0.7Cu Solder Alloy Interconnects for first experimental data point t= 667 hours. 57 Figure 4.7: Global Minima for IMC based History Calculation for 100 I/O CABGA, Sn0.3Ag0.7Cu Solder Alloy Interconnects for second experimental data point t = 1333 hours. 58 Table 4.2: Comparison of computed values of ?t? from prognostication model and experimental results Aging Time ?t? in hours Solder Expt Data LM Algorithm % Error SAC0307 667 690 3.45 SAC0307 1333 1250 6.23 Table 3.4: Comparison of computed values of ?y0? from prognostication model and experimental results Initial Intermetallic thickness ?y0? in ?m Solder Expt Data LM Algorithm % Error SAC0307 3.4563 3.6873 6.68 SAC0307 3.4563 3.4085 1.38 59 IMC Thickness Vs Time for SAC 0307 Time (hours) 0 500 1000 1500 2000 2500 3000 3500 IM C Th ick ne ss (m icr on s) 0 2 4 6 8 10 12 Experimental Algorithm Figure 4.8 Prognostication of Initial Intermetallic thickness from algorithm (based on y0 and k) vs. Initial Intermetallic thickness from experimental values 99Sn0.3Ag0.7Cu alloy. 60 4.7 Implementation of PHM Technique The PHM technique presented in the study may be implemented using condition monitoring devices, which can be cross-sectioned to interrogate the system state and determine the failure progression of the assembly. Consider an electronic assembly which has been deployed in the field application. The assembly needs to be redeployed in the same environment. The condition monitoring devices in the system will then be withdrawn at periodic intervals in the deployed environment. The condition monitoring devices will be cross-sectioned and their intermetallic growth data will be extracted. This data will be analyzed using Levenberg?s-Marquardt Algorithm and methodologies discussed earlier, to find out the initial intermetallic thickness (y0) and the prior time of deployment (t) for which the component has been deployed. The rate of change of intermetallic growth, (dy/dt), will be computed using the computed values of damage proxies or leading indicators-of-failure. The prior time of deployment (t) in prior environment would be calculated using this methodology. 4.8 Summary and Conclusions A methodology has been presented to calculate the prior damage in electronics subjected to isothermal thermo-mechanical loads. The time duration for which the component has been deployed and initial intermetallic thickness is been estimated using Levenberg-Marquardt Algorithm with Trust Regions. Methodology has been demonstrated using intermetallic thickness as the leading-indicators of failure. The presented approach uses non-linear least- squares based method of estimating prior stress history, and residual life, by interrogating system-state prior to redeployment. The prior stress histories have been calculated for isothermal loads. Computed results have been correlated with the experimental data for various aging time 61 intervals. Model predictions of residual life correlate well with experimental data. The correlations indicate that the leading indicators based PHM technique can be used to interrogate the system state and thus estimate the Residual-Life of a component. The presented approach of computing residual life can be implemented prior to appearance of any macro-indicators of damage like crack. Methodology presented using condition monitoring components to find out the residual life is promising because these components experience the same environment as actual component. 62 Chapter 5 Prognostication of Latent Damage and Residual Life in Lead-Free Electronics Subjected to Multiple Thermal-Environments Electronic deployed in harsh environments may be subjected to multiple thermal environments during the use-life of the equipment. Often the equipment may not have any macro-indicators of damage such as cracks or delamination. Quantification of thermal environments during use-life is often not feasible because of the data-capture and storage requirements, and the overhead on core-system functionality. There is need for tools and techniques to quantify damage in deployed systems in absence of macro-indicators of damage without knowledge of prior stress history. Applications for the presented PHM framework include, consumer applications such as automotive safety systems including front and rear impact protection system, chassis-control systems, x-by-wire systems; and defense applications such as avionics systems, naval electronic warfare systems. Previously, Lall [2004a-d, 2005a-b, 2006a-f, 2007a-e] has developed methodologies for health management and interrogation of system state of electronic systems based on leading indicators of failure. In addition, Lall [2008a-f] has developed methodologies for interrogation of system state for single thermal cycling and isothermal aging environments. Examples damage pre-cursors include micro-structural evolution of damage, intermetallics, stress and stress gradients. In this part of study, Sn3.0Ag0.5Cu alloy packages have been 63 subjected to multiple thermal cycling environments including -55?C to 125?C and 0?C to 100?C. Packages investigated include chip-scale packages assembled to cu-core and no-core printed circuit board assemblies. The methodology involves the use of condition monitoring devices, which have been interrogated for latent damage and residual life at periodic intervals of multiple thermal cycling environments. Data on damage pre-cursors has been collected. Interrogation technique has been developed based on non-linear least-squares methods. Various techniques including the Levenberg-Marquardt Algorithm have been investigated. Results of interrogation of system state have been compared with a second set of experimental-matrix to validate the proposed methodology. 5.1 Introduction Lall [2004a-d, 2005a-b, 2006a-f, 2007a-e, 2008a-f] have developed leading indicators of failure for prognostication of electronic systems under thermo-mechanical, shock-impact and vibration stresses. Proxies such as phase growth rate in solder interconnects have been identified as leading indicators of failure. The authors have previously presented a methodology for interrogation of system-damage state for single thermal cycling and isothermal aging environments [Lall 2007c, 2008c, d]. In this part of study, the PHM approach has been developed for interrogation of damage state for electronic systems subjected to multiple thermal environments. The approach enables assessment of accrued damage and the residual life assessment in the intended environment. 100 CABGA and 256 PBGA packages with SAC305 solder alloy system are used for this study. The packages were subjected to two different thermal cycles, Thermal cycle 1: -55?C to 125?C and Thermal cycle 2: 0?C to 100?C. The presented methodology is different from the state-of-art diagnostics and resides in the pre-failure-space of the electronic-system, in which no macro-indicators such as cracks or delamination exist. The 64 methodology eliminates the need to capture the prior stress history for prognostication of system state. Relationships for computation of residual life have been developed based on damage proxies. The approach involves the use of condition monitoring devices which can be interrogated for damage proxies at finite time-intervals. Interrogation techniques are based on non-linear least-squares methods. Various techniques including the Levenberg-Marquardt Algorithm have been investigated. The system?s residual life is computed based on residual-life computation algorithms. 5.2 Test Vehicle In the present study, ball grid area-array packages with Sn3Ag0.5Cu alloy solder interconnects assembled on FR4 laminates and ENIG board finish have been studied. The assemblies have been subjected to dual thermo-mechanical loads. Two packages studied include the 256 I/O, 17x17 mm, 1 mm pitch plastic ball grid array and the 100 I/O, 12 x 12 mm, 0.8 mm pitch packages (Figure 5.1). The package to chip ratio is nearly 2.14 for both packages. The chip size is 7.94 x 7.94 mm for the 256 I/O package and 5.58 x 5.58 mm for the 100 I/O package (Table 5.1). 256 PBGA 100 CABGA Figure 5.1: Test Vehicle 256 PBGA and 100 CABGA 65 Figure 5.2: Printed Circuit Board Assembly Construction in the Test Assemblies. Table 5.1: Package Architecture Details for Test Vehicle. Solder Sn3Ag0.5Cu Sn3Ag0.5Cu Package Size (mm) 17 x 17 12 x 12 Package Type PBGA CABGA I/O Count 256 100 I/O Pitch (mm) 1 0.8 Ball Diameter (mm) 0.5 0.5 Die Size (mm) 7.94 5.58 P/D ratio 2.14 2.15 Board Finish ENIG ENIG Substrate Pad Type NSMD NSMD Table 5.2: Details of Board Assembly. Parameter Value (mm) Top Layer (FR-4) Thickness 1.397 Bottom Layer (FR-4) Thickness 1.397 Total PCB Thickness 3.937 66 The assemblies have been subjected to relatively harsh thermal cycle (TC-1) temperature ranging from -55?C to 125?C, 2.5 hours/cycle followed by a milder thermal cycle (TC-2) temperature from 0?C to 100?C, 16 minutes Dwell and 8 minutes ramp. Data on micro-structural evolution of damage has been collected by withdrawing samples periodically. Figure 5.2 shows the printed circuit board assembly which have been used for this experiment; all boards were No- Core assembly with Non Solder Mask Defined (NSMD) pads. Table 5.2 shows parameter relevant to the board. The printed circuit board contains six trace layers to simulate the thermal mass of a true production board, though all functional traces have been run on the topmost layer. All the assemblies were daisy-chained and continuously monitored for failure detection during cycling. 5.3 Approach for Prognosticating Damage in Multiple Thermo-Mechanical Environments The test vehicle was subjected to two-sequential thermal environments. First environment (TC-1) is a -55?C to 125?C thermal cycle, 2.5 hours per cycle and the second environment is a 0?C to 100?C thermal cycle with 16 minutes dwell time and 8 minutes ramp time. Previously, it has been shown that the rate of change in phase growth parameter [d(lnS)/d(lnN)] is valid damage proxy for prognostication of thermo-mechanical damage in solder interconnects and assessment of residual life Lall [2004a-d, 2005a-b, 2006a-f, 2007a-e, 2008a-f]. The damage proxy [d(lnS)/d(lnN)] is related to the microstructural evolution of damage by the following equation: bNaggS )(4 0 4 =?= (5.1) NaggS lnln)ln(ln 404 +=?= bNd Sd =)(ln )(ln (5.2) 67 Where, g is the average grain size at time of prognostication, g0 is the average grain size of solder after reflow, N is the number of thermal cycles, S is the phase growth parameter, parameters a and b are the coefficient and exponent respectively. The log-plot of the equation provides a straight line relationship between the phase growth parameter and the number of cycles. It is anticipated that the higher temperature cycle magnitude will result in more accrued thermo- mechanical damage and a higher slope of the phase growth parameter versus number of thermal cycle curve. A combined plot for TC-1 and TC-2 in terms of damage accrual proxy and life in terms of number of cycles is shown in Figure 5.3. TC-2 has a smaller temperature range compared with TC-1 and thus a lower slope of accrued damage proxy versus cyclic life plot. A schematic of the anticipated accrued damage versus cyclic life plots are shown in Figure 5.3. Temperature excursions during operation of a circuit are due to both power-cycling and variations in ambient conditions resulting in thermo-mechanical cyclic stresses and strains induced primarily by thermal expansion mismatch between the package and the board assembly. Previous researchers have studied the micro structural evolution of ternary SnAgCu alloys at elevated temperatures using bulk real solder joints with different designs, geometry and process conditions. The SnAgCu microstructure comprises Ag3Sn and Cu6Sn5 dispersed within the tin matrix. The relatively low percentage of alloying elements, 1-4% for Ag and 0.5% for Cu results in phases which comprise a small percentage of the total volume within the solder joint. The microstructural evolution of SnAgCu alloys over time has been found to effect the thermo- mechanical properties and damage behavior [Ye 2000, Allen 2004a,b, Kang 2004, Xiao 2004, Henderson 2004, Kang 2005, Korhonen 2007, Jung 2001]. 68 Figure 5.3: Life Vs Damage Curve for Multiple Thermal Environments. Micro-structural coarsening during thermo-mechanical deformation is attributed to the generation of excess vacancies caused by the combined effect of local hydrostatic state of stress, and the instantaneous inelastic strain rate [Dutta 2003a, 2003b, 2004; Jung 2001]. Evolution of solder microstructure in 63Sn37Pb and lead-free chip resistor solder joints due to thermal fatigue have been studied previously by previous researchers [Sayama, et al. 1999, 2003] and thermal fatigue correlated with occurrence of microstructural coarsening in the fatigue damaged region in of 63Sn37Pb solder interconnects [Frear 1990, Morris 1991]. Correlation of grain coarsening with thermal fatigue has also been established for high-lead solders [Bangs 1978, Wolverton 1987, Tribula 1989]. Previously the authors have investigated the grain-size evolution and derivatives of phase growth rate as prognostics parameters on a wide range of leaded and Sn4Ag0.5Cu devices in underhood applications Lall [2004a-d, 2005a-b, 2006a-f, 2007a-e, 2008a-f]. 69 The problem definition consists of an electronic assembly which has been subjected to X cycles of the field environment (TC-1) and followed by Y cycles of field environment (TC-2). In operational deployed equipment, the number of cycles may be calculated from the time in operation and the duty cycle of the exposure in terms of number of cycles per day. The electronic assembly will thus be exposed to (X+Y) cycles of sequential application of TC-1 followed by TC-2 (Figure 5.4). While the field environment may consist of multiple such environments, in this study electronic assemblies exposed to only two environments have been prognosticated in order to create a framework for multi-environment prognostication. Figure 5.4: Problem Definition for Prognostication, Interrogation of System State and Decision Flow for Electronic Assembly Subjected to Multiple Operational Environments. 70 Prior Damage in TC-1 Consider an assembly, which has been subjected to NA cycles in environment TC-1 with the corresponding phase growth SA. The assembly is then withdrawn from service and assessed for operational readiness in a new environment TC-2. Assessment will include withdrawal of samples from the prognostication sensor cells and interrogation of damage state based on micro- structural evolution of damage. The prior accrued damage sustained by the system in TC-1 has been prognosticated by withdrawing 4-samples in the prognostication time neighborhood. Figure 5.5 shows the prognostication approach for single environment. b AAA NaggS )( 4 0 4 =?= (5.3) bANANA NNaggS )(404 ?+=?= ?+?+ b ANANA NNaggS )2( 4 0 4 22 ?+=?= ?+?+ (5.4) bANANA NNaggS )3(404 33 ?+=?= ?+?+ The equations are solved using the LMF Algorithm. Solution is identified as the dataset with the minimum error in the solution space. In this case, prognostication yields values of g0, a, b, NA. In order to distinguish them from the experimentally observed values, the subscript ?P? has been appended at the each of each parameter. The parameters are thus, g0P, aP, bP, NAP. The prognosticated value of prior damage in TC-1 is denoted by NAP. The prognosticated value of sustained damage, NAP, should be in the neighborhood of the actual sustained damage NA within the margin of error. 71 Figure 5.5: Prognostication approach to calculate NA in TC-1 environment. Operational Readiness for TC-2 In order to assess the operational readiness of the electronic assembly in TC-2, the prognostic sensor cells are subjected to a small period of exposure of TC-2. Samples from the prognostic sensor cells are then withdrawn for computation of residual life. Note that the micro- structural evolution of damage from S0 to SA is path independent, i.e. the phase coarsening from S0 to SA may be achieved in environment TC-1 in period NA or in environment TC-2 in a period NB (i.e., gA = gB; and SA = SB). The differential damage is computed by exposing the samples to incremental damage in the new environment TC-2. The initial phase size, g0P, is expected to be identical regardless of the thermal environment, to which the assemblies have been exposed. b BBB NaggS )( 4 0 4 =?= (5.5) bBNBNB NNaggS )(404 ?+=?= ?+?+ b BNBNB NNaggS )2( 4 0 4 22 ?+=?= ?+?+ (5.6) 72 b BNBNB NNaggS )3( 4 0 4 33 ?+=?= ?+?+ Where, ?N is finite number of cycles (e.g. 250 cycles) in thermal-cycling environment. Four samples are withdrawn in the prognostication time neighborhood. The differential damage is then computed using the equation: ?D= NBP-NAP (5.7) The equivalent damage sustained by the assembly, in TC-2 could be derived from the prognosticated prior-damage in TC-1, using the equation: NBP = NAP + ?D (5.8) The differential damage will be known from the microstructural evolution of the solder interconnects for the alloy system of interest. Assessment of Residual life in TC-2 In order to assess the residual life of the electronic-assembly in TC-2 after it has been deployed for a period of time (Point-C, Figure 5.3), the prognostication cells will be used to estimate accrued damage. The prior accrued damage sustained by the system in TC-1 and TC-2 has been prognosticated by withdrawing 4-samples in the prognostication time neighborhood. b CCC NaggS )( 4 0 4 =?= (5.9) bCNCNC NNaggS )(404 ?+=?= ?+?+ b CNCNC NNaggS )2( 4 0 4 22 ?+=?= ?+?+ (5.10) bCNCNC NNaggS )3(404 33 ?+=?= ?+?+ 73 Where, ?N is finite number of cycles (e.g. 250 cycles) in thermal-cycling environment. The prior damage will be assessed using the following equation: NC-NB=NCP-?D-NAP (5.11) The prognostication value of prior damage NCP assumes that the electronic assembly has been in the second environment TC-2 for the complete time of operation. Differential damage and the prior damage accrued in first environment have been subtracted to account for the sequential thermal exposures. The method for interrogation of system state and prognostication of damage is described in the next section. 5.4 Micro-structural Evolution of Damage Samples were cross-sectioned at various level of thermal cycling. The cross-sections were studied by scanning electron microscopy (SEM) using a JEOL JSM 840 instrument operated at an accelerating voltage of 20 kV. All samples were imaged as polished. The quantitative measure of Ag3Sn particle size was established from a 100 ?m x 75 ?m rectangular region selected from a backscattered SEM image of a highest strain corner solder ball. The typical SEM pictures before and after the mapping of phase size using image analysis is shown in Figure 5.6 and Figure 5.7. The average phase size, g, in the selected region is measured using Image Analysis Software. The phase growth parameter, S, can be expressed as 4 0 4 ggS ?= (5.12) Where, g0 is the average phase size of solder after reflow at zero thermal cycles. The average phase growth parameter S, changes with the time in thermal cycle environment. Most of the SnAgCu solder is comprised of Sn-phases, so that the growth rate of tin and Ag3Sn intermetallic crystals are significant. Since Ag atoms have a higher diffusion rate in the molten solder, they 74 can diffuse out of the way and thus allow the Sn dendrites to grow. Particles of Ag3Sn grow either to spheres or to needles shape. Since tin cannot anticipate the shape of the Ag3Sn intermetallic particles, they have to grow ahead of the tin phase [Stromswold, 1993]. Figure 5.6: Micrograph from 256 I/O PBGA showing Tin and Ag3Sn Phases. Figure 5.7: Microstructure mapping using Image Analysis. 75 The fundamental reason for selection of Microstructure growth and its derivatives is that, super plastic alloys are usually made of fine grain structure. Therefore a considerable growth of the matrix grains and the second phase particles frequently occur during high temperature deformation. Quantitative metrics of changes in microstructure have been identified and relationships developed to represent damage progression. The phase growth parameter has been defined as the relative change from phase-state after reflow, instead of the absolute value of phase state and is used as a damage precursor to compute residual life [Lall 2004a, 2005a, 2006c,d, 2007c,e, 2008c,d]. The relation between phase growth parameter and time for polycrystalline material is given by [Callister 1985]. Ktgg =? 404 (5.13) where g is the average grain size at time t, g0 is the average grain size of solder after reflow, K and n (varies from 2 to 5) are time independent constants. Various ?n? values represent different rate-controlling mechanisms for Phase Coarsening. 5.5 Levenberg-Marquardt Algorithm The relationship between the phase growth parameter and time is nonlinear because it contains terms with fourth power. Inverse solution for interrogation of system-state is challenging for damage evolution in such systems. Levenberg-Marquardt (LM) algorithm is an iterative technique that computes the minimum of a non-linear function in multi-dimensional variable space [Madsen 2004, Lourakis 2005, Nielsen 1999]. It has been used successfully for computation of nonlinear least-square solutions. The Levenberg-Marquardt method with a combination of steepest descent using line-search and the Gauss-Newton method has been used for solution of the problem. Let ? be an assumed functional relation between a measurement 76 vector referred to as prior-damage and the damage parameter vector, p, referred to as predictor variables. Mathematically, the function, f, which maps a parameter vector p ? Rm to an estimated measurement vector is represented as, x=?(p) x ? Rn. The measurement vector is the current values of the leading-indicator of failure and the parameter vector includes the prior system state, and accumulated damage and the damage evolution parameters. An initial parameter estimate p0 and a measured vector x are provided and it is desired to find the parameter vector p, that best satisfies the functional relation ? i.e. minimizes the squared distance or squared-error, ?T? with ? = x ? f(p) . Assume that g(p) = ?T? in the squared error. The basis of the LM algorithm is a linear approximation to g in the neighborhood of p. For a small ?p, a Taylor series expansion leads to the approximation, G(p+?p) ? g(p) + J(p) ?p (5.14) Where, J = Jacobian matrix ??(p)/?p. For each step, the value of ?p that minimizes the quantity ?= x ? Jf(p), has been computed. Then the minimizer parameter vector, p, for the error function has been represented as, )()(21))((21)( 1 2 pgpgpgpF T m i i == ? = )()()( pgpJpF T= (5.15) )()()()()()( " 1 " xgxgxgpJpJpF iii m i T = ?+= Where F(p) represents the objective function for the squared error term ?T? , J(p) is the Jacobian, and F?(p) is the gradient, and F?(p) is the Hessian. An initial parameter estimate p0 and a response-vector ?x? are provided and it is desired to find the vector p+, that best satisfies the functional relation x=f(p), while minimizing the squared distance ?T? . The steepest gradient descent method has been used to impose the descending condition, i.e.,F(Pk+1)0 ensures that coefficient matrix is positive definite, and this ensures that h is a descent direction. When the value of ? is very small, then the step size for LM and Gauss-Newton are identical. Algorithm has been modified to take the equations of phase growth and inter-metallic growth under both isothermal aging and cycling loads to calculate the unknowns. 5.6 Case-Study: Prognostication of Damage in Multiple Thermo-Mechanical Environments 5.6.a Step-1: Prognostication of Prior Damage Thermal Environment-1, TC-1 Data-Set 1a: An assembly with 100 I/O CABGA and 256 I/O PBGA packages was subjected to thermal conditions TC-1 and TC-2 for known periods of time. In this case, samples have been withdrawn after 250 cycle increments. The withdrawn samples have been cross- sectioned and the grain structure studied in an SEM. The image analysis software has been used to measure the average phase size of the Ag3Sn and Cu6Sn5 phases. Figure 5.8 and Figure 5.9 shows the phase structure of the solder at various intervals of time for 100 CABGA and 256 PBGA packages. Cross-sections show noticeable phase coarsening with increased thermal cycling. The plot of phase growth (S) versus number of cycles (N) in TC-1 environment is shown in Figure 5.10 and Figure 5.11 for 100 CABGA and 256 PBGA respectively. The data-set 1a will not be needed or exist in the operational assemblies. However, in the present case, the dataset has been gathered for validation of the presented approach. 79 Figure 5.8: SEM backscattered images of phase growth versus thermal cycling (-55?C to 125?C, 96.5Sn3.0Ag0.5Cu solder, 100 I/O CABGA, magnification 750x). 80 Figure 5.9: SEM backscattered images of phase growth versus thermal cycling (-55?C to 125?C, 96.5Sn3.0Ag0.5Cu solder, 256 I/O PBGA, magnification 750x). 81 Figure 5.10: Phase growth Vs Number of cycles for 96.5Sn3.0Ag0.5Cu solder, 100 CABGA, subjected to TC-1 (-55?C to 125?C). No of Thermal Cycles (N) 100 1000 10000 Ph ase G ro wt h P ar am ete r ' S' (in ????m 4 ) 1 10 100 TC-1 S=a(N)b a=0.0004 b=1.5014 82 Figure 5.11: Phase growth Vs Number of cycles for 96.5Sn3.0Ag0.5Cu solder, 256 PBGA, subjected to TC-1 (-55?C to 125?C). Data-Set 1b: A second set of test assemblies consisting of the 100 I/O CABGA and 256 I/O packages was subjected to thermal condition TC-1 for a known but undisclosed period of 500 cycles. This is equivalent to an electronic assembly that has been previously deployed and then withdrawn from service and assessed for prior damage. The prior damage sustained in the assemblies has been prognosticated based on micro-structural evolution of damage using measurements of phase growth. In order to prognosticate damage, the packages have been subjected to a small additional number of cycles in TC-1. No of Thermal Cycles (N) 100 1000 10000 Ph ase G ro wt h P ar am ete r ' S' (in ????m 4 ) 1 10 100 TC-1 S=a(N)b a=0.0001 b=1.5427 83 Prognostication will generally involve withdrawal of samples from condition monitoring cells towards the end of the deployment of the electronic assembly in the operating environment TC-1. In this case, samples have been withdrawn after 250 cycle increments. The withdrawn samples have been cross-sectioned and the grain structure studied in an SEM. The samples were prognosticated using the Levenberg-Marquardt Algorithm. Figure 5.12 and Figure 5.13 show the estimation of prior damage based on the LMF algorithm. The prognosticated damage at 500 cycles for the 100 I/O and 256 I/O parts is 450 cycles and 675 cycles respectively. Table 2 shows the comparison of g0 and N values obtained from LM algorithm and experimental results. From Table 5.3 we can say that values obtained from experiment and Algorithm shows good co- relation. Figure 5.12: 3D Plot of Error Vs No of Thermal Cycles (N) for 100 CABGA 96.5Sn3.0Ag0.5Cu solder interconnects for 500 Cycles TC-1 (LM Algorithm). N=430 g0=1.2616 84 Figure 5.13: 3D Plot of Error Vs No of Thermal Cycles (N) for 256 PBGA 96.5Sn3.0Ag0.5Cu solder interconnects for 500 Cycles TC-1 (LM Algorithm). Table 5.3: Comparison of experimental and prognosticated values of N and g0, for 100 I/O CABGA and 256 I/O PBGA with SAC305 interconnects. Cycle ?N? Initial Grain Size ?g0? Cycle Count Exp Data LM Algo % Error Exp Data LM Algo % Error 100 I/O CABGA 500 430 -14 1.258 1.076 -14.5 256 I/O PBGA 500 591 18.2 1.065 1.262 18.5 g0=1.19 N=591 85 5.6.b Step-2: Calculation of Differential Damage (NB-NA) and Operational Readiness in TC-2 In this step the differential damage has been computed in two electronic test-assemblies 100 CABGA and 256 PBGA packages, which have been exposed to 500 cycles of TC-1 (-55?C to 125?C). The test assemblies would have achieved the same phase growth in a longer period of time if exposed to cycle TC-2 (0?C to 100?C). A second set of assemblies was used for prognosticating operational readiness for environment TC-2. Samples from the condition monitoring cells of the electronic assemblies were exposed to a second environment TC-2 and withdrawn in the prognostication neighborhood. In this case, samples have been withdrawn after 250 cycle increments in TC-2. The withdrawn samples have been cross-sectioned and the grain structure studied in an SEM. The plot of phase growth (S) versus number of cycles (N) in TC-2 environment is shown in Figure 5.14 and Figure 5.15 for 100 CABGA and 256 PBGA respectively. The samples were prognosticated using the Levenberg-Marquardt Algorithm. Figure 5.16 and Figure 5.17 show the equivalence of prior damage based on the LM algorithm. It is shown that 500 Cycles TC-1 equivalences with 662 cycles of TC-2, for the 100 I/O CABGA with SAC305 interconnect. The prognosticated value is 695 cycles. In addition, 500 Cycles TC-1 equivalences with 708 cycles of TC-2, for the 256 I/O PBGA with SAC305 interconnects. Prognosticated Value is 675. Table 5.4 shows the comparison of the experimental and prognosticated values of differential damage between TC-1 and TC-2 for the 100 I/O CABGA and the 256 I/O PBGA. The experimental values of differential damage have been calculated based on the validation data-set by equivalency of the phase size corresponding to the multiple environments with that of the single environment. The prognosticated values of differential damage have been calculated based on the difference between the prognosticated of the packages in TC-2 and the life in TC1. 86 Figure 5.14: Phase growth Vs Number of cycles for 96.5Sn3.0Ag0.5Cu solder, 100 CABGA, subjected to TC-2 (0?C to 100?C). Figure 5.15: Phase growth Vs Number of cycles for 96.5Sn3.0Ag0.5Cu solder, 256 PBGA, subjected to TC-2 (0?C to 100?C). 87 Figure 5.16: Differential Damage for assemblies subjected to Multiple Environments. 500 Cycles TC-1 equivalence with 662 cycles of TC-2, SAC305 solder, 100 CABGA, Magnification 750x. Prognosticated Value is 695. 88 Figure 5.17: Differential Damage for assemblies subjected to Multiple Environments. 500 Cycles TC-1 equivalence with 708 cycles of TC-2, SAC305 solder, 256 PBGA, Magnification 750x. Prognosticated Value is 675. 89 Table 5.4: Comparison of experimental and prognosticated values of differential damage for 100 I/O CABGA, and 256 I/O PBGA with SAC305 interconnects. Cycles 100 I/O CABGA 256 I/O PBGA a (TC-2) 6.90E-03 1.03E-03 b (TC-2) 0.9757 1.1462 g0 1.258 1.065 gB 1.591 1.386 Cycles of TC-1 500 500 Cycles of TC-2 662 708 Experimental data ?De(NB-NA) 162 208 Cycles of TC-2 695 675 Prognostication ?Dp(NB-NA) 195 175 5.6.c Step-3: Assessment of Prior Accrued Damage and Residual life after Withdrawal from TC-1 and Redeployment in TC-2 Since the test method is destructive, the samples withdrawn for condition monitoring for Step-1 and Step-2, were discarded after the microstructural data had been gathered from the assemblies. In operational equipment, the prior damage in the withdrawn electronic assemblies will be documented and the assemblies will then be stored till such a time as deployment in a second operational environment is required. In this case, the second operational environment is TC-2. Three sets of assemblies have been exposed to three different sequences of multiple cyclic thermo-mechanical environments including 250 cycles of TC-1 followed by x-cycles of TC-2 (Figure 5.18), 500 cycles of TC-1 followed by x-cycles of TC-2 (Figure 5.19), and 750 cycles of TC-1 followed by x-cycles of TC-2 (Figure 5.20). The present dataset will be used for validation of the presented approach. Test assemblies have been previously exposed to a prognosticated number of cycles in TC-1 (500 cycles) and then redeployed in TC-2 for an unknown number of 90 cycles have been prognosticated. The parts were withdrawn at an interval of 250 cycles to measure the phase growth in TC-2. The withdrawn samples have been cross-sectioned and the grain structure studied in an SEM. The samples were prognosticated using the Levenberg- Marquardt Algorithm. Figure 5.21 and Figure 5.22 shows the prognosticated values of the 256 I/O PBGA for test assemblies that have been exposed to (500 cycles TC1 + 250 cycles TC2) and (750 cycles TC1 + 250 cycles TC2). Table5.5 shows the experimental and prognosticated values of the residual damage in environment TC2 for test assemblies exposed to multiple environments. The experimental values are based on the validation dataset, and the prognosticated values are based on the equation: NC- NB=NCP-?D-NAP. The values show good correlation indicating the potential of the procedure for estimation of prior damage in presence of exposure to multiple thermal environments. Figure 5.18: SEM Back-scattered Images of Phase Growth versus Multiple Environments (250 Cycles TC-1 + x-Cycles TC-2, SAC305 solder, 256 CABGA, Magnification 750x) 91 Figure 5.19: SEM Back-scattered Images of Phase Growth versus Multiple Environments (500 Cycles TC-1 + x-Cycles TC-2, SAC305 solder, 256 PBGA, Magnification 750x). Figure 5.20: SEM Back-scattered Images of Phase Growth versus Multiple Environments (750 Cycles TC-1 + x-Cycles TC-2, SAC305 solder, 256 PBGA, Magnification 750x). 92 Figure 5.21: Prognostication for assemblies subjected to Multiple Environments. 500 Cycles TC- 1 + 250 Cycles TC-2, SAC305 solder, 256 PBGA, Magnification 750x. 93 Figure 5.22: Prognostication for assemblies subjected to Multiple Environments. 750 Cycles TC- 1 + 250 Cycles TC-2, SAC305 solder, 256 PBGA, Magnification 750x. Table 5.5: Comparison of experimental and prognosticated values of differential damage for the 100 I/O CABGA, and 256 I/O PBGA with SAC305 interconnects. Cycle Count NCP ?DP (N BP-NAP) NAP Experiment N C-NB Prognostication NCP-NBP = NCP-?DP-NAP 256 I/O BGA 500 TC1 +250 TC2 976 175 430 250 371 256 I/O BGA 750 TC1 + 250 TC2 1425 495 710 250 220 94 5.7 Residual Life in Multiple Environments The residual life of the assemblies subjected to multiple thermal environments has been be computed based on the following equation, RUL= N1%-N. Where, N1% is the time to one- percent failure of the population, N is the prognosticated prior damage in the test assemblies. The N1% may be procured by accelerated testing of the part and correlation with the field conditions. In the present case, the test assemblies were subjected to TC-1 and TC-2. The N1% value for 100CABGA packages subjected to TC-2 (0?C to 100?C) was calculated to be 4866 cycles (Figure 5.23). The RUL can be calculated as RUL = [N1% - NBP] where NBP is the prognosticated life for point-B. NBP was prognosticated to be 695 cycles respectively. Thus the residual life is RL = [4668 ? 695] = 3973 cycles. Figure 5.23: Weibull plot for 100CABGA packages subjected to thermal cycle 0?C to 100?C. 95 5.8 Summary and Conclusions A methodology has been presented to prognosticate the accrued prior damage and assess residual life in electronics subjected to multiple thermal environments. The presented approach uses the Levenberg-Marquardt Algorithm in conjunction with microstructural evolution of damage based leading indicator for estimating prior stress history. The viability of the approach has been demonstrated for test assemblies withdrawn from one thermo-mechanical environment TC1 (-55?C to 125?C) and redeployed in second thermo-mechanical environment TC2 (0?C to 100C?C). The prognostication has been demonstrated at three stages of the life cycle including, prognostication of prior stress history after withdrawal from the first environment TC1, assessment of operational readiness for redeployment in environment TC2, and the assessment of prior damage and residual life after finite time of deployment of in TC2. Model predictions of total consumed life in multiple environments correlate well with the experimental data. The correlation demonstrates that the presented leading indicator based PHM technique can be used to interrogate the system state in multiple environments and thus estimate the residual life of a component. The presented approach of computing residual life can be implemented prior to appearance of any macro-indicators of damage like crack. Methodology presented using condition monitoring components to find out the residual life is promising because these components experience the same environment as actual component. 96 Chapter 6 Summary and Conclusions 6.1 PHM in Single Environment A damage pre cursors based methodology for prognostication-of-electronics including assessment of residual-life, has been developed and demonstrated under single stresses of steady- state temperature. The damage pre-cursors enable assessment of system damage-state significantly prior to appearance of any macroindicators of damage. Interfacial Intermetallic layers growth rate have been identified as valid proxies for determination of residual life in electronic structures. Mathematical relationships have been developed between Intermetallic growth for interrogation of residual life and damage state. A methodology has been presented to calculate the prior damage in electronics subjected to isothermal thermo-mechanical loads. Components analyzed include plastic ball-grid arrays with lead-free solder alloys SAC 0307. Packages have been subjected to known levels of thermo-mechanical loads, withdrawn at discrete time intervals and have been cross-sectioned, polished and viewed under a Scanning Electron Microscope. The evolution of damage has been characterized using leading indicators of failure like Inter-metallic coarsening. A separate test matrix has been used to interrogate the system state and validate the proposed methodology. The time duration for which the component has been deployed and initial grain size is been estimated using Levenberg-Marquardt Algorithm with trust regions. The presented approach uses non-linear least-squares based method of estimating prior stress history, and residual life, by interrogating system-state prior to redeployment. The prior stress histories have been calculated for isothermal loading condition. 97 Computed results have been correlated with the experimental data for various aging times. A framework for implementation of the prognostication approach has been discussed including, sacrificial devices, which can be examined to determine the damage state of the assembly from time to time. The correlations indicate that the leading indicators based PHM technique can be used to interrogate the system state and thus estimate the Residual-Life of a component. The presented approach of computing residual life can be implemented prior to appearance of any macro-indicators of damage like crack. Methodology presented using condition monitoring components to find out the residual life is promising because these components experience the same environment as actual component. 6.2 PHM in Multiple Environments A methodology has been developed to prognosticate the accrued prior damage and assess residual life in electronics subjected to multiple thermal environments. It is shown that microstructural evolution can be used for residual life calculation in multiple environments scenarios. The viability of the approach has been demonstrated for test assemblies withdrawn from one thermo-mechanical environment TC1 (-55?C to 125?C) and redeployed in second thermo-mechanical environment TC2 (0?C to 100C?C). Model predictions of total consumed life in multiple environments correlate well with the experimental data. The correlation demonstrates that the presented leading indicator based PHM technique can be used to interrogate the system state in multiple environments and thus estimate the residual life of a component. The presented approach of computing residual life can be implemented prior to appearance of any macro- indicators of damage like crack or delamination. Methodology presented using condition monitoring components to find out the residual life is promising because these components 98 experience the same environment as actual component. The presented approach is developed for two thermal cycles but can be extended to multiple (n) thermo-mechanical loading condition. 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Damping Parameter in LM Algorithm N1% Number of cycles necessary to cause 1% of the parts N Number of thermal cycle g Grain size at time t g0 Initial grain size y Intermetallic Thickness at time t y0 Initial Intermetallic Thickness K Time-independent constants n Time-independent constants t Time S Phase Growth Parameter dS/dN Rate of Change of Phase Growth Parameter CTE Coefficient of Thermal Expansion ? 113 BT Bismaleimide Triazine PCB Printed Circuit Board PWB Printed Wiring Board PBGA Plastic Ball Grid Array ENIG Electroless Nickel Immersion Gold CBGA Ceramic Ball Grid Array CCGA Ceramic Column Grid Array OMPAC Over molded plastic pad array SMT Surface Mount Technology PTH Plated Through Hole PHM Prognostics Health Management BIST Built In Self Test LM Levenberg Marquardt Algorithm RL Residual Life SEM Scanning Electron Microscope HM Health Monitoring RUL Remaining Useful Life NSMD Non-Solder Mask Defined