Viability of server module thermal management using enhanced heat sinks and low global warming potential dielectric uids by Bharath Ramakrishnan A thesis submitted to the Graduate Faculty of Auburn University in partial ful llment of the requirements for the Degree of Master of Science Auburn, Alabama August 02, 2014 Keywords: Novec Fluids, Immersion Cooling, High performance computing, Enhanced Heat sinks Copyright 2014 by Bharath Ramakrishnan Approved by Sushil H. Bhavnani, Chair, Professor of Mechanical Engineering Roy W. Knight, Assistant Professor of Mechanical Engineering Daniel Harris, Associate Professor of Mechanical Engineering Abstract Immersion cooling is making a resurgence for use in server applications driven by an increase in chip densities and the need for reduction in overall data center power usage. This thesis focuses on pool boiling characteristics from an array of heaters which simulate electronic chips on a vertically-oriented printed circuit board. A pool boiling study was con- ducted on an array of four bare die using two di erent dielectric uids; namely Novec-649 and HFE-7100, both with low global warming potential (GWP). Tests were conducted at two die spacings; 25 mm and 10 mm under two di erent pool conditions: saturated and 15 C subcooled representing a start-up transient. Data were collected for increasing and decreas- ing heat ux cycles. The ux dissipated was found to be 14.6 W=cm2 and 14.2 W=cm2 with Novec-649 and HFE-7100 respectively for the test board with 10 mm die spacings under subcooled conditions. These values are recorded at self-imposed maximum surface temper- atures that ensured operation well below the critical heat ux. These ux values are quite high especially since they are attained without the need to modify the surface or add heat sinks. In an e ort to increase thermal performance, tests were also conducted on dies spaced 25 mm apart augmented with two di erent enhanced heat sinks featuring microporous and micro nned surfaces. Enhanced heat sinks performed better than bare die and the ux dissipated was found to be 18.87 W=cm2 and 18.31 W=cm2 using Novec-649 and HFE-7100 respectively under subcooled conditions. Additionally, these values were achieved at surface temperatures 15 C lower than the surface temperatures recorded by the bare die for the same heat ux. Additionally, a batch of Novec-649 was intentionally contaminated using high levels of dioctyl phthalates to address the e ect of contamination. The superheat re- quired to dissipate 10 W=cm2 with contaminated uid was found to be 10 C greater than ii with clean uid. High speed images were obtained to provide a better understanding of nucleation characteristics. iii Acknowledgments The author would like to thank his committee, chaired by Dr. Sushil H. Bhavnani and comprising Dr. Roy W. Knight and Dr. Daniel K. Harris, for their constant guidance and support throughout his graduate coursework and research. The author gratefully thank Dr. Wayne Johnson for providing an opportunity to conduct this research. Many thanks are extended to Mr. Charles Ellis, Dr. Michael Hamilton and Mr. Mike Palmer for fabricating the test boards needed to conduct this research. The author sincerely thanks his advisor Dr. Sushil H. Bhavnani for giving him a great opportunity to work under his leadership. The author sincerely appreciates the help rendered by his colleagues Naveenan Thiagarajan, Aravind Sridhar, Joshua Gess and John Maddox and thanks them for their valuable inputs throughout his research and coursework. Many thanks are extended towards Tyler Dreher, Thomas Sherer and Christopher Maurice for their timely contribution during research. Much gratitude is extended towards the author?s friends, family, and roommates for their constant encouragement and support. Finally, the author would like to thank his parents Ramakrishnan and Sakunthala as well as his brother Navin, to whom he is dedicating this work, for their constant love and con dence in him throughout his career. iv Table of Contents Abstract . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ii Acknowledgments . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . iv List of Figures . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . viii List of Tables . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . xiv 1 INTRODUCTION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 2 LITERATURE REVIEW . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 2.1 Immersion Cooling . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 2.2 Dielectric Fluids . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 2.3 Enhanced Heat Transfer Surfaces . . . . . . . . . . . . . . . . . . . . . . . . 9 2.4 E ect of neighboring heat sources . . . . . . . . . . . . . . . . . . . . . . . . 16 2.5 E ect of uid Contamination . . . . . . . . . . . . . . . . . . . . . . . . . . 17 2.6 Objective of this Study . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 3 EXPERIMENTAL FACILITY, TEST BOARDS AND EXPERIMENTAL PRO- CEDURE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 3.1 Test Board Layout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 3.2 Experimental Setup . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 3.2.1 Schematic Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 3.2.2 Test Tank Design and Construction . . . . . . . . . . . . . . . . . . . 23 3.2.3 Leak Testing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 3.3 Electrical Connections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 3.3.1 Hermetically sealed connectors and wiring layout . . . . . . . . . . . 27 3.4 Di erent test surfaces . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28 3.5 Auxillary devices used in the experimental facility . . . . . . . . . . . . . . 30 v 3.5.1 Power Supply . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30 3.5.2 High Speed Camera . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31 3.5.3 Chiller Unit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31 3.6 Contaminated Fluid Tests . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32 3.7 Calibration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32 3.8 Experimental Procedure . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33 4 RESULTS AND DISCUSSION . . . . . . . . . . . . . . . . . . . . . . . . . . . 35 4.1 Typical pool boiling curve . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35 4.2 Test Sequence for Bare Silicon Die . . . . . . . . . . . . . . . . . . . . . . . . 37 4.2.1 Single die heating using Novec-649 . . . . . . . . . . . . . . . . . . . 38 4.2.2 Single die heating with activated neighboring die using Novec-649 . . 41 4.2.3 Four die heating using Novec-649 . . . . . . . . . . . . . . . . . . . . 46 4.2.4 Single die heating using HFE-7100 . . . . . . . . . . . . . . . . . . . 50 4.2.5 Single die heating with activated neighboring die using HFE-7100 . . 51 4.2.6 Four die heating using HFE-7100 . . . . . . . . . . . . . . . . . . . . 52 4.2.7 Comparison of four die heating scenario between Novec-649 and HFE- 7100 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 53 4.3 Enhanced heat sinks . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 55 4.3.1 Microporous heat sinks . . . . . . . . . . . . . . . . . . . . . . . . . . 56 4.3.2 Micro nned heat sinks . . . . . . . . . . . . . . . . . . . . . . . . . . 60 4.4 Contaminated Fluid Tests . . . . . . . . . . . . . . . . . . . . . . . . . . . . 63 5 CONCLUSION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 69 References . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 75 Appendices . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 76 A CALIBRATION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 77 B LABVIEW-VIRTUAL INSTRUMENTS(VI) . . . . . . . . . . . . . . . . . . . . 82 C SINTERED MICROPOROUS SURFACES . . . . . . . . . . . . . . . . . . . . . 85 vi D DATA REDUCTION PROCEDURE . . . . . . . . . . . . . . . . . . . . . . . . 87 E MATLAB program for data reduction . . . . . . . . . . . . . . . . . . . . . . . 89 F UNCERTAINTY ANALYSIS . . . . . . . . . . . . . . . . . . . . . . . . . . . . 92 vii List of Figures 1.1 A typical pool boiling curve. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 2.1 E ect of emery paper roughening for acetone boiling on copper . . . . . . . . . 11 2.2 Contact angle measurements of water on smooth copper, SiO2 and TiO2 surfaces 12 2.3 Boiling curve for smooth copper, SiO2 and TiO2 surfaces using FC-72 . . . . . 13 2.4 Heat Transfer coe cients for both plain and enhanced surface in R134a and FC-72 14 2.5 Pool boiling curve showing the e ect of alumina particle layering thickness . . . 15 2.6 3 x 3 array of heaters showing the in uence of bubble generation . . . . . . . . 17 2.7 Performance characteristics of the central test heater with 75% of the incipient heat ux from the heater below the test heater when the cavities were initially active . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 2.8 Performance characteristics of the test die with natural convection plumes gen- erating at 0.3 W=cm2 from the die below the test die . . . . . . . . . . . . . . . 18 3.1 Schematic of test board showing four 25 mm x 25 mm die each comprised of 16 thermal test cells. The temperature sensing diode locations are marked in red . 21 3.2 Circuit diagram of an unpopulated test board showing the diodes and power connections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 3.3 Layout of a single thermal test cell . . . . . . . . . . . . . . . . . . . . . . . . . 22 viii 3.4 Experimental setup showing the various components involved . . . . . . . . . . 23 3.5 Tank designed using SolidWorks (isometric view of assembled tank) . . . . . . . 24 3.6 Various components used in the test tank . . . . . . . . . . . . . . . . . . . . . 25 3.7 View of internal tank showing the position of the condensers and connectors with respect to the test board . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 3.8 Aluminum tank leak tested using air at 10 psi/g . . . . . . . . . . . . . . . . . . 26 3.9 Circuit diagram showing the diodes being excited by a source meter and voltage measured using a DAQ device . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27 3.10 Hermetically sealed connectors . . . . . . . . . . . . . . . . . . . . . . . . . . . 27 3.11 Circuit boards with four bare die shown at two spacings; 25 mm and 10 mm. . . 29 3.12 Image showing the four test boards having di erent die spacings augmented with enhanced heat sinks. From left to right, 1: Board with 25 mm die spacing with microporous heat sinks, 2: Board with 25 mm die spacing with pin- n heat sinks, 3: Board with 10 mm die spacing with microporous heat sinks, 4: Board with 10 mm die spacing with pin- n heat sinks . . . . . . . . . . . . . . . . . . . . . 29 3.13 Detailed view of the 30 x 30, 400-micron square n array on the micro nned surface 30 3.14 Scanning electron micrograph of the microporous surface showing 10 to 50-micron pore size . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31 3.15 Contaminated uid testing being conducted under a fume hood. The uid con- tainment tank is seen in the background in the middle of the image. . . . . . . . 32 3.16 Contaminated uid testing being conducted under a fume hood. The uid con- tainment tank is seen in the background in the middle of the image. . . . . . . . 33 ix 4.1 A typical pool boiling curve obtained for the case of single die heating using Novec-649 at saturation temperature. . . . . . . . . . . . . . . . . . . . . . . . . 36 4.2 Repeatability test for the case of single die heating using Novec-649 in a saturated pool. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38 4.3 Performance characteristics when top left die alone on test board with die spaced 25 mm apart was powered up in Novec-649. . . . . . . . . . . . . . . . . . . . . 40 4.4 High-speed images showing bubble characteristics at progressively higher heat uxes on the bare die at 25 mm die spacing board using Novec 649 under saturated pool conditions. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40 4.5 High-speed images showing bubble characteristics at progressively higher heat uxes on the bare die at 25 mm die spacing board using Novec 649 under 15 C subcooled pool conditions. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41 4.6 Performance characteristics when top left die alone on test board with die spaced 10 mm apart was powered up in Novec-649. . . . . . . . . . . . . . . . . . . . . 42 4.7 High-speed images showing bubble characteristics at progressively higher heat uxes on the bare die at 10 mm die spacing board using Novec 649 under 15 C subcooled pool conditions. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42 4.8 Boiling curves for a single die with the in uence of natural convection plumes from neighboring die under saturated conditions (pool temperature of 49 C) . . 43 4.9 Boiling curves for a single die with the in uence of vapor bubbles from neighbor- ing die under saturated conditions (pool temperature of 49 C) . . . . . . . . . . 44 4.10 Boiling curves for a single die with the in uence of natural convection plumes from neighboring die under subcooled conditions (pool temperature of 34 C) . . 45 x 4.11 Boiling curves for a single die with the in uence of vapor bubbles from neighbor- ing die under subcooled conditions (pool temperature of 34 C) . . . . . . . . . . 45 4.12 High-speed images showing bubble characteristics on the primary die with and without neighboring die heating at a constant heat ux on the bare die at 25 mm die spacing board using Novec-649 under 15 C subcooled pool conditions. All three images are recorded at a heat ux of 7.2 W=cm2 . . . . . . . . . . . . . . 46 4.13 Performance characteristics of top left die when all four dies were powered up in Novec-649 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 48 4.14 Plot comparing the single die heating and four die heating in Novec-649 under saturated pool conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 48 4.15 Performance characteristics with top left die alone powered on test board with two di erent die spacings; 25 mm and 10 mm apart was powered up in HFE-7100. 50 4.16 Boiling curves for a single die with the in uence of natural convection plumes and later vapor bubbles from neighboring die under saturated conditions (pool temperature of 61 C) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 51 4.17 Boiling curves for a single die with the in uence of natural convection plumes and later vapor bubbles from neighboring die under 15 C subcooled conditions using HFE-7100 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 52 4.18 Performance characteristics of top left die when all four dies were powered up in HFE-7100 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 53 4.19 Comparison between saturated HFE-7100 and Novec-649 in virgin uid for the board with four active bare die spaced 25 mm apart. . . . . . . . . . . . . . . . 54 xi 4.20 Comparison between saturated HFE-7100 and Novec-649 in virgin uid for the board with four active bare die spaced 10 mm apart. . . . . . . . . . . . . . . . 54 4.21 Performance comparison of the board with 25 mm and 10 mm die spacing with microporous heat sinks using Novec-649 under saturated pool conditions . . . . 57 4.22 Performance comparison of the board with 25 mm and 10 mm die spacing with microporous heat sinks using Novec-649 under subcooled pool conditions . . . . 58 4.23 Performance comparison of the board with 25 mm and 10 mm die spacing with microporous heat sinks using HFE-7100 under saturated pool conditions . . . . 58 4.24 Performance comparison of the board with 25 mm and 10 mm die spacing with microporous heat sinks using HFE-7100 under subcooled pool conditions . . . . 59 4.25 Performance comparison between bare die and microporous heat sinks at 25 mm die spacing in Novec-649 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 61 4.26 Performance comparison between bare die and microporous heat sinks at 25 mm die spacing in HFE-7100 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 61 4.27 Performance comparison between bare die, microporous and micro nned heat sinks at 25 mm die spacing in Novec-649 . . . . . . . . . . . . . . . . . . . . . . 63 4.28 Performance comparison between bare die, microporous and micro nned heat sinks at 25 mm die spacing in HFE-7100 . . . . . . . . . . . . . . . . . . . . . . 64 4.29 High-speed images showing bubble characteristics at progressively higher heat uxes on an isolated micro nned die at 25 mm die spacing board using HFE- 7100 under saturated pool conditions. . . . . . . . . . . . . . . . . . . . . . . . 65 xii 4.30 High-speed images showing bubble characteristics at progressively higher heat uxes on an isolated micro nned die at 25 mm die spacing board using HFE- 7100 under 15 C subcooled pool conditions. . . . . . . . . . . . . . . . . . . . . 66 4.31 Performance comparison between pristine uid and contaminated uid before and after limited activated charcoal clean-up. The surface tested was microporous heat-sinked die spaced 25 mm apart in Novec-649 under saturated conditions . . 68 5.1 High speed image to study the bubble nucleation characteristics on a test board oriented horizontally . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 71 A.1 A set of curves for test board with bare silicon die spaced 10mm apart (top left die) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 78 A.2 A set of curves for test board with bare silicon die spaced 10mm apart (bottom left die) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 79 A.3 A set of curves for test board with bare silicon die spaced 10mm apart (top right die) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 80 A.4 A set of curves for test board with bare silicon die spaced 10mm apart (bottom right die) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 81 B.1 Sample block diagram programmed for calibrating the diodes . . . . . . . . . . 83 B.2 Front panel displaying the temperature indicators in C and a chart for monitor- ing the surface temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 84 xiii List of Tables 2.1 Classi cation of enhancement techniques . . . . . . . . . . . . . . . . . . . . . . 10 3.1 Color scheme for the connectors . . . . . . . . . . . . . . . . . . . . . . . . . . . 28 4.1 Variables tested in the experiment . . . . . . . . . . . . . . . . . . . . . . . . . 35 4.2 Properties of dielectric uids Novec-649 and HFE-7100 . . . . . . . . . . . . . . 49 4.3 Highest power recorded for bare silicon die test board with die spaced 25 mm apart using dielectric uids Novec-649 and HFE-7100 . . . . . . . . . . . . . . . 55 4.4 Highest power recorded for bare silicon die test board with die spaced 10 mm apart using dielectric uids Novec-649 and HFE-7100 . . . . . . . . . . . . . . . 55 4.5 Highest power and surface temperature values recorded for the case of four die heating with die spaced 25 mm apart using bare silicon die and die augmented with microporous heat sink using Novec-649 . . . . . . . . . . . . . . . . . . . . 60 4.6 Highest power and surface temperature values recorded for the case of four die heating with die spaced 25 mm apart using bare silicon die and die augmented with microporous heat sink using HFE-7100 . . . . . . . . . . . . . . . . . . . . 60 B.1 DAS modules used in the experimental facility . . . . . . . . . . . . . . . . . . . 82 D.1 Raw data generated by LabVIEW . . . . . . . . . . . . . . . . . . . . . . . . . 88 D.2 Processed data using MATLAB . . . . . . . . . . . . . . . . . . . . . . . . . . . 88 xiv Chapter 1 INTRODUCTION Processing speeds for modern day computers are rising exponentially and are in uencing human life in various ways. Rising clock rates are the driving force in technological, nancial and social change from the late 1980s. Why are processing speeds so important? Here is one such scenario. Speed is especially important for a kind of trading called "high frequency trading" where thousands of shares of stock or securities are sold by computers in a second or less. Seventy percent of daily trades are estimated to be this kind of high frequency trade. Companies around the world have invested thousands of dollars to make faster computers that can shave o tiny fractions of processing time to give them an edge in the global market. Some of the fastest trading companies in the world claim that their computers can calculate a trade within 500 microseconds, a thousand times faster than the human eye can blink. Speed can be the key when playing the nancial markets. The faster a company can react to a changing market, the better position they are in to take advantage of opportunities that might come up. Advances in microelectronic processing led to miniaturization of components. According to Moores law, the number of transistors on integrated circuits doubles approximately every 18 months. This has resulted in an increase in CPU transistor density, causing rising heat uxes. Why should this matter for a thermal engineer in the electronics eld? What if thousands of data storage components with a working power range of 20 W and maximum case temperature of 70 C are closely packed together like in data centers? The advancements in microelectronics packaging and fabrication have led to the evolution of cooling techniques to meet the resultant high heat ux densities. Thus, how fast a computer can process information depends directly on how e ciently the processors can be cooled. 1 Thermal systems with air as the coolant are reliable, cheap and easy to maintain. As electronic components get smaller, air is no longer an e ective coolant because of low thermal conductivity and thermal capacitance. Liquid cooling provides a means by which the thermal resistance can be reduced signi cantly. Liquid cooling can be classi ed as indirect liquid cooling, and direct liquid cooling. Using microchannels is a method of indirect liquid cooling. Microchannels can be machined onto the chip itself or machined onto a substrate and then attached to a chip or an array of chips. Although there are advantages with microchannels, factors like clogging and formation of local hot spots have not yet been resolved. Two phase boiling in microchannels is another indirect liquid cooling method. The ow inside the microchannels is highly unpredictable and can produce large voids and multiple ow regimes inside tubes. Analytical models for two phase microchannel cooling are still in their infancy. Direct liquid cooling is otherwise known as immersion cooling. Water is the best avail- able coolant because of its superior thermal properties. When it comes to immersion cooling of electronics, however the uid has to be dielectric. Fluorochemical vapor, silicone oil, transformer oil and uorochemical liquids are the most common uids used in immersion cooling. Immersion cooling can be realized in two di erent ways, namely, pool boiling or ow boiling. Flow boiling involves a closed liquid loop. Pool boiling involves the immersion of electronic components in a dielectric uid with low saturation temperature. In a two-phase electronic cooling system, electronic components dissipate heat to the dielectric uid and vapor bubbles generated from the component surface rise above the uid level. The vapor bubbles are condensed back down using a heat exchanger. Pool Boiling Curve Boiling at the surface of a component immersed in an extensive pool of motionless liquid is generally referred to as pool boiling. The boiling curve is a plot of heat ux versus wall superheat, T, de ned as T = Twall Tsat (1.1) 2 where Twall is the surface temperature of the wall and Tsat is the saturation temperature of the liquid. The various factors which can e ect the nature of the boiling process are the level of heat ux, the thermophysical properties of the liquid and vapor, the surface material and nish, and the physical size of component surface. The classical pool boiling curve was developed in the early investigations of pool boiling conducted by Nukiyama [1] and Drew and Mueller [2]. The pool boiling curves (from Carey [3]) as shown in Figure 1.1 can be attained for an independently controlled surface temperature or for an increasing controlled heat ux. Figure 1.1: A typical pool boiling curve (from Carey [3]) The regimes of pool boiling encountered for a horizontal at surface as the heat ux is increased are indicated schematically. At very low wall superheat levels, no nucleation sites may be active and heat may be transferred from the surface to the ambient liquid by natural convection alone up to point A. The heat transfer follows Newton?s law of cooling and can be expressed as q" = h T (1.2) 3 where h is the heat transfer coe cient.The heat transfer coe cient h associated with natural convection is relatively low. Eventually, when T becomes large enough to initiate nucleation at some of the cavities, the onset of nucleate boiling (ONB) condition occurs at point A. One di erence between the temperature-controlled and heat- ux-controlled boundary condition is that, at the onset condition, the system temperature jumps horizontally to the nucleate boiling curve for the heat ux controlled case. This is termed as incipience overshoot. The maximum heat ux that can be dissipated in the fully nucleate boiling regime is called as critical heat ux (CHF). When the heat ux is increased beyond the critical heat ux, the surface temperature jumps to a much higher temperature on the lm boiling regime to deliver the increased heat ux. As a result, the curve jumps from point C to point E before further heat can be accommodated. The rise in temperature associated with the jump from nucleate to lm boiling at the critical heat ux is very often large enough to melt component materials and burn out the component. As a result, the critical heat ux is often referred to as burnout heat ux. For any surface at very high heat ux, already in the lm boiling regime, if the heat ux is slowly reduced, the system generally tracks down the lm boiling curve to point D as in Figure 1.1 which corresponds to minimum heat ux that can sustain stable lm boiling. This point is referred to as Leidenfrost point. For further reduction in heat ux, system then typically follows the nucleate boiling curve and the natural convection curve. Recent commercial e orts like CarnotJET [4], Tuma [5] and Facebook [6] have rea rmed the bene ts of cooling server modules using immersion cooling. The primary drivers are increase in chip densities and the need for reduction in overall data center power usage. The current work was conducted using two di erent dielectric uids; namely Novec-649 and HFE-7100, both with low global warming potential (GWP) in addition to being ozone- friendly. Novec-649 and HFE-7100 both have a global warming potential value of one. Pool boiling characteristics from an array of four die on a vertically-oriented printed circuit board were studied. Tests were conducted at two die spacings; 25 mm and 10 mm under two pool 4 conditions; saturated and 15 C subcooled representing a start-up transient. High speed images were obtained to provide a better understanding of nucleation characteristics. Data were collected for increasing and decreasing heat ux cycles. Improvement in heat dissipation capacity due to the addition of two di erent types of heat sinks, a microporous surface, and a micro nned surface, were also studied. Finally, the e ect of intentionally contaminating dielectric uid with excessively high levels (an order of magnitude higher than would be anticipated in a worst-case scenario) was also studied. 5 Chapter 2 LITERATURE REVIEW This chapter focuses primarily on the liquid cooling of microelectronics, especially im- mersion cooling. This chapter also reviews the use of dielectric uids in immersion cooling. Work done by various researchers on heat transfer enhancement using microporous coating on the heater surface is reviewed. The e ects of neighboring heating sources on the primary heating component are reviewed. The e ect of uid contamination after prolonged exposure of hardware to coolant is discussed at the end of this chapter. 2.1 Immersion Cooling Air cooling of data centers is ine cient due to the large number of processors in a single blade or cabinet. Traditional air cooling is not as e cient as liquid cooling because of its low heat carrying capacity. Even though it is not immediately apparent, every data center is indirectly liquid cooled today. Most data centers bring liquid into Computer Room Air Handlers (CRAH) or Computer Room Air Conditioning (CRAC) units to cool the air in the data center. CRAH units bring chilled water in to cool the air. The refrigerant comes into CRAC units as a liquid. There are signi cant drawbacks with CRAC and CRAH units. The rst is that to produce air cold enough to cool servers, the liquid coolant coming to the data center (facilities liquid) must be refrigerated to a temperature colder than ambient (outdoor) air and chilling is expensive. The second is CRAC and CRAH units produce cold air at the periphery of the data center and considerable e ort is needed to move it to the racks. Third, considerable e ort is needed move it through the servers via server fans. Obvious gains in cooling e cacy can be made if the liquid coolant is brought into closer proximity to the heat generating components, thereby eliminating intermediate thermal resistances. 6 In a single phase liquid system like a mineral oil or deionized water based system, the working uid never boils or freezes and always remain in a single liquid phase. Cool uid is pumped past the heat source, where thermal energy is transferred to the uid by conduction which raises the temperature of the uid. The heated uid is then pumped to a heat exchanger where it is cooled and pumped back to the heat source. The associated infrastructure costs with single phase liquid cooling is comparatively high. In two-phase cooling the working uid boils and thus exists in both a liquid and vapor phase. Energy is transferred from the heat source into the working uid will cause a portion of it to boil o into a vapor. The gas rises above the uid pool where it contacts a condenser which is cooler than the saturation temperature. This causes the uid to condense back into a liquid and fall back into the pool. By adopting two-phase immersion cooling, much of the hardware infrastructure costs associated with the above mentioned traditional air cooling or single phase liquid cooling can be reduced. The additional bene ts of liquid immersion cooling, include reducing noise and preventing contamination of servers with dust. Major industrial giants like Facebook [6] have already tried removing heat generated from their datacenters using immersion cooling. A liquid cooling system, CarnotJET [4] from Green Revolution cooling (GRC) provides the option of cooling servers by immersing them in mineral oil. CarnotJet uses GreenDEF, a high-performance blend of white mineral oil with orders of magnitude higher heat capacity by volume than air. It is reported that by using CarnotJetTM, there is a 95% reduction in cooling power used and 10-25% reduction in the server power utilized. Intel embraces this idea of cooling servers by dunking them in mineral oil. Tuma [5] reported that open bath immersion (OBI) cooling technology will have a signi cant e ect on both nancial and environmental costs in all stages of server life cycle. In OBI cooling (OBI are sometimes more correctly called semi open bath) the tank containing the heat source, working uid and condenser is not a pressure vessel. The pressure inside the tank/container will be maintained roughly the same pressure as the outside air. This makes the tank easier and 7 cheaper to construct and the system is never pressurized to dangerous pressures. In an open bath system, equilibrium is achieved by having a heat exchanger capable of su cient heat transfer to condense the vapor at the same rate it is being produced by boiling from the component surface. The volume of vapor remains relatively constant and prevents a rise in pressure. The social networking company Facebook [6] has also tested immersion cooling by submerging their newly designed server in a bath of mineral oil. It was reported that, they were able to run servers at temperatures above 110 F successfully. Iceotope [7] and Hardcore [8] have tried immersion cooling technology and improved results were reported. 2.2 Dielectric Fluids For cooling electronic components, the liquid has to be thermally, but not electrically conductive. For this reason, the liquid has to be dielectric. Water is the best available heat transfer uid naturally because of its very high thermal conductivity and high latent heat of vaporization but does not possess good dielectric properties. Mineral oils, silicone oil, transformer oils and other specialty coolants like 3M Fluorinert are used as liquid coolants. Dielectric uids such as FC-72, Novec-649 and HFE-7100 developed by 3M are inert and possess a low boiling point and are compatible with chips associated with a microelectronic device. Microelectronic devices are readily exposed to these dielectric uids without damage and boiling occurs at higher power levels. This phase-change cooling is highly desirable from the standpoint of electronics because of minimal rise in the device surface temperature even for large changes in power. Global warming potential (GWP) is a measure of how much a given mass of greenhouse gas is estimated to contribute to global warming. It is a relative scale which compares the gas in question to that of the same mass of carbon dioxide (whose GWP is by convention equal to 1). GWP is sometimes also referred to as Greenhouse Gas Potential (GGP). With the growing concerns over adverse e ects on the climate, there is a need to replace uids having high global warming potential (HFCs and PFCs) with uids having low GWP (HFEs and 8 Novec). Forrest et al. [9] studied the pool boiling characteristics of dielectric uid FK-649 (Novec-649) having a low global warming potential (GWP). GWP of FK-649 is one. It was reported that the two-phase performance of FK-649 (Novec-649) was similar to uorocarbons (FC-72). Dielectric uids are chemically compatible with most heat spreader materials. Despite the above mentioned advantages, a challenge with these liquids is the excursion in surface temperature prior to initiating nucleate boiling. This challenge can be met using properly designed heat sinks. 2.3 Enhanced Heat Transfer Surfaces The e cient transfer of heat usually involves either decreasing the size of heat exchange equipment or reducing the temperature di erence across which the heat is transferred. This applies to the entire range of heat ux from nuclear technologies to microelectronic devices. Though dielectric uids such as Novec-649 and FC-72 allow direct immersion of electronics, there is a problem of boiling curve hysteresis due to the extreme wettability of these uids. There is also a need to elevate the critical heat ux (CHF) associated with these uids. Critical heat ux describes the thermal limit of a phenomenon where there is sudden decrease in the e ciency of heat transfer, thus causing localized overheating of the heating surface. CHF is otherwise known as burnout heat ux or peak nucleate heat ux. Bergles [10] studied several heat transfer enhancement techniques which can elevate the CHF with reduced wall superheat. The enhancement techniques were classi ed as passive and active techniques with the former requiring no direct application of external power and the latter requiring external power. The enhancement techniques are listed in Table 2.1. Two or more of the tabulated techniques can be used simultaneously to achieve larger heat transfer enhancement than by utilizing one technique alone. This is termed compound enhancement. 9 Table 2.1: Classi cation of enhancement techniques Passive Techniques Active Techniques Treated Surfaces Mechanical Aids Rough Surfaces Surface Vibration Extended Surfaces Fluid Vibration Displaced Enhancement devices Electrostatic elds Swirl Flow devices Suction or Injection Coiled Tubes Additives for uids Surface-tension devices Magnetic elds Early Studies on Pool Boiling Heat Transfer Enhancement The most signi cant advances in enhanced heat transfer have been made in special surface geometries that promote high performance nucleate boiling. These special geometries result in increased heat transfer coe cients. Improving the surface roughness can enhance the nucleate boiling performance. Research on improving the surface roughness has been conducted for more than 70 years. Although the concept of heat transfer enhancement using surface roughness was well understood, it was commercially unusable mostly because of the aging factor (as reported in Jakob [11]), which resulted in an e ective short term heat transfer improvement. Cost associated with creating the desired surface roughness was considered high. In the 1930s, Jakob [11] and Fritz investigated the e ect of surface nish on nucleate boiling performance using water. Water was boiled from both a sandblasted surface and a surface having a square grid of machined grooves. It was reported that the sandblasted surface yielded about 15% improvement but the performance decayed within a day. The grooved surface yielded results three times better than a smooth surface, but the performance deteriorated after several days. Around 1960, fundamental advances were made in understanding the character of nucle- ation sites and the shape necessary for the formation of stable vapor traps. In 1960, Kurihara 10 and Myers [12] used copper surfaces roughened using di erent grades of emery paper to boil water and several organic uids. Figure 2.1 shows the results obtained using acetone for di erent roughness levels on a copper surface. The results demonstrated that the boiling performance improved as the site density of stable nucleation sites increased. This led to research towards making arti cially formed sites that functioned as stable vapor traps and allowed incipience to occur at lower wall superheat than for naturally occurring nucleation sites. Figure 2.1: E ect of emery paper roughening for acetone boiling on copper (from Kurihara and Myers [12]) El-Genk [13] investigated the use of immersion cooling for high power computer chips. The nucleate boiling performance was investigated using the dielectric uids FC-72 and HFE- 7100 on 10x10 mm porous graphite surfaces. It was reported that there was an increase in the nucleate boiling heat transfer coe cient and a rise in the critical heat ux. There was a reduction in the surface temperature excursion before boiling incipience using a porous graphite surface compared to a planar surface. The improved performance was because the large pores in the porous graphite surface could be partially ooded with liquid, allowing 11 nucleation of vapor bubbles on the interior surfaces, thus increasing the e ective area for heat transfer. Wu et al. [14] studied nucleate boiling heat transfer enhancement using water and FC- 72 on titanium oxide and silicon oxide surfaces. The performance of the coated surfaces was compared with a smooth copper surface. Tests were conducted on a heater with 1 cm2 surface area with 1 m thick TiO2 coating. Many documented results have reported that the boiling enhancement due to TiO2 coating is mainly because of its high a nity to water as shown in Figure 2.2. The contact angle of water on TiO2 is very small and is the reason for its high wettability. Tests were also conducted on a heater with non-hydrophilic SiO2 coating with similar surface topology obtained with TiO2 coating. Figure 2.2: Contact angle measurements of water on smooth copper, SiO2 and TiO2 surfaces (from Wu et al. [14]) Using water, de nite improvement in the CHF by 10.7% and 50.4% was reported for SiO2 and TiO2 coated surface respectively when compared to a smooth copper surface. The test conducted on the surface coated with SiO2 was to emphasize the fact that the boiling performance improvement was not due to the surface roughness but due to the hydrophilic nature of TiO2. Similar tests were repeated with FC-72 and an improvement in performance was reported even though FC-72 is a highly wetting uid. There was an improvement of CHF by 18.8% and 38.2% for SiO2 and TiO2 coated surfaces, respectively when compared to a smooth copper surface as shown in Figure 2.3. The TiO2 surface allowed for more liquid- solid interaction thereby reducing the dry patches caused by the growing bubbles. Improved liquid-solid interaction enhances the nucleate boiling and CHF. 12 Figure 2.3: Boiling curve for smooth copper, SiO2 and TiO2 surfaces using FC-72 (from Wu et al. [14]) Furberg and Palm [15] used dendritic and microporous copper structures to enhance the pool boiling heat transfer coe cient using R134a. The surface structure was fabricated with an electrodeposition method where metallic copper nano-particles were dendritically connected into an ordered micro-porous structure using hydrogen bubble evolution as a dynamic masking template followed by an annealing process. This method of fabrication was adopted since it provided ample opportunity to control the size of the structure which could be varied depending upon various refrigerants. It was reported that the improvement was 10 times greater than the performance achieved with plain machined copper surface as in Figure 2.4. The drop in heat transfer coe cient for the plain surface using FC-72 for heat ux values around 10 to 15 W=cm2 was attributed to change in heat transfer mechanism from nucleate boiling to lm boiling. This transition was not observed using the enhanced surface which was attributed due to the separation of liquid and vapor ow in the structure. The thermal performance di erence between R134a and FC-72 is due to the di erences in their thermophysical properties. The e ects of pressure and subcooling for pool boiling heat transfer performance was experimentally investigated by Arik et al. [16]. Pool boiling experiments were conducted 13 Figure 2.4: Heat Transfer coe cients for both plain and enhanced surface in R134a and FC-72 (from Furberg and Palm [15]) using FC-72 for bare silicon chip sized heaters and on heaters coated with microporous layers. A maximum CHF value of 47 W=cm2 on diamond base microporous coated silicon heaters at 3 atm and nearly 50 C subcooling (saturation temperature for FC-72 at 3 atm is 93 C) was reported. The reported value is approximately 60% higher than the value attained with an untreated surface. El-Genk and Ali [17] studied the saturation boiling of PF-6050 dielectric uid for di erent copper microporous surface coating thicknesses ranging from 95-220 m. The microstructure on 10 mm 10 mm and 1.38 to 1.6 mm thick Cu substrates was obtained by a two-stage electrochemical deposition method at low current density for several minutes. The CHF values obtained using the coated surface were reported to be 40-70% higher than the values obtained using plain surfaces. A maximum CHF value of 27.8 W=cm2 was reported for the surface with 171 m thick microporous layer at wall superheat of only 2 C. These results are very promising for potential applications of cooling high power chips and CPUs, since the junction temperature was maintained relatively low (less than 60 C). You et al. [18] studied the e ects of microstructure using a particle layering technique. A 0.1 m thin lm of alumina was sputtered on a 10 mm 10 mm 0:15 mm thick platinum heater. Two di erent heater con gurations layered with 0.3 m size alumina particles (heater #1) and 0.3-3 m size alumina particles (heater #2) respectively were tested. The boiling curve for a heat ux controlled environment for all three surfaces (untreated surface, heater #1 and heater #2) is shown in Figure 2.5. It was reported that the particle layering technique 14 increased the CHF by 39% and 36%, and decreased the wall superheat by 37% and 46% for heater #1 and heater #2, respectively. A painting technique proposed by O?connor and You [19] was adopted to develop the microporous coating on the heating surface. It was found that the painted surface produced much smaller bubbles as compared to the smooth aluminum surface. This resulted in low superheats for the painted surface as compared to the smooth surface. Chang and You [20] continued the work by using diamond particles as microporous coating with particles sizes of 2 m 1, 10 m 2, 20 m 3, 45 m 5, 70 m 10 bonded to a 10mm x 10mm copper surface. Tests were run on these surfaces and on a plain copper surface. A signi cant reduction in incipient superheat on the microporous coatings as compared to the bare copper surface was reported. Figure 2.5: Pool boiling curve showing the e ect of alumina particle layering thickness (from You et al. [18]) Pool boiling experiments using water were conducted by Kwark et al. [21] on coated and uncoated surfaces. They reported that the heater surface coated with nanosized Al2O3 particles (average size: 75 to 210 nm) produced a signi cant amount of CHF enhancement with no degradation in nucleate boiling heat transfer. It was postulated that the better wettability of the nanocoating, especially its ability to continuously rewet the base of the growing bubbles, was the main cause of enhancement. Tang et al. [22] investigated the pool boiling enhancement by a novel metallic (copper) nanoporous surface using saturated deionized water. A hot-dip galvanizing/dealloying (HDGD) method was adopted to form the 15 nanoporous structure over copper test section. Nanoporous structure of size 50 to 200 nm approximately was formed using this method. A signi cant reduction of 63.3% in the wall superheat and 172.7% improvement in heat transfer coe cient was reported. It was also remarked that the high thermal conductivity of the nanoporous structure would enhance the boiling performance at higher heat uxes. From the above literature review it is clear that heater surfaces coated with microporous layer of porous graphite or TiO2 or Al2O3 increased the number of nucleation sites which results in enhanced thermal performance. An attempt was made in this work to enhance the performance of primary die by indium attaching a heat sink sintered with microporous copper particles. 2.4 E ect of neighboring heat sources If the temperature excursion prior to boiling incipience is not controlled, the temperature increase would result in failure of the electronic component. The following papers review the work carried out by di erent researchers to account for this problem and the solutions proposed to reduce the hysteresis. The e ects of boiling due to neighboring heaters on the primary test heater was studied by You et al. [23]. A vertically oriented 3x3 array of ush mounted, 5 mm 5 mm square heaters arranged 4 mm apart on a glass substrate were immersed in a pool of FC-72 as shown in Figure 2.6. The heaters were constructed of platinum coated with alumina particles. It was found that there was a considerable reduction in the incipient superheat for a test heater with a heater boiling below it. There was not a signi cant e ect on the fully developed nucleate boiling regime of the boiling curve. Five 0:7 cm 0:7 cm heaters with a spacing of 0.7 cm were investigated by Bhavnani et al. [24]. The boiling curves in Figure 2.7 show that the temperature overshoot can be eliminated at lower wall superheats by having a gentle plume of bubbles at a heat ux as low as 20% on incipient heat ux emanating from a chip below the test chip. Bubbles emanated from the neighboring die have completely eliminated 16 the overshoot on the primary die, because the plumes of vapor bubble from the neighboring die are disrupting the boundary layer growth in the die above it thereby eliminating the temperature excursion prior to nucleate boiling. The e ect of neighboring die heating on the primary die were analyzed in the current study and test boards with two di erent die spacing; 25 mm and 10 mm were tested to address how closer the die can be spaced to each other. Sridhar et al. [25] also addressed the e ect of a neighboring heating source on the test heater. Figure 2.8 shows the in uence of natural convection plumes generating at 0.3 W=cm2 from a die below the test die. The superheat values remain the same at high heat ux values for test die with and without the in uence of neighboring die heating. The incipience overshoot value on the test die increased with the introduction of natural convection plumes from the die below it as shown by Run 1-increasing on Figure 2.8. Figure 2.6: 3 x 3 array of heaters showing the in uence of bubble generation 2.5 E ect of uid Contamination The dielectric uid would deteriorate in its physical properties after prolonged exposure to various hardware items in the pool boiling system. Not many researches have addressed this issue. Kampl [26] studied the e ect of prolonged exposure of FPGA ( eld programmable gate array) hardware. It was reported that 2 kg of o -the-shelf polyvinylchloride (PVC)-clad USB cables was used in each of 24 tanks in operation. After two years of operation the dioctyl phthalate (DOP) oil used to plasticize the insulation had been extracted. This caused the cables above the uid level to become thinner but no failures were observed. The DOP 17 Figure 2.7: Performance characteristics of the central test heater with 75% of the incipient heat ux from the heater below the test heater when the cavities were initially active (from Bhavnani et al. [24]) Figure 2.8: Performance characteristics of the test die with natural convection plumes gen- erating at 0.3 W=cm2 from the die below the test die (from Sridhar et al. [25]) 18 was absorbed using passive carbon lters. No degradation in the boiling performance was reported during the lifespan of the system. An attempt was made in this current work to quantify the performance deterioration by exposing the dielecric uids to DOP. Activated carbon lters were then added to restore the performance. 2.6 Objective of this Study The above literature review explains the advantages of liquid cooling, especially immer- sion cooling. The e ect of subcooling and pressure on pool boiling were discussed. Various heat transfer augmentation techniques on heater spreader materials were analyzed, and the e ect of a neighboring heat source on the primary heat source were discussed. In the end, the e ect of uid contamination after prolonged exposure of the systems hardware to di- electric uid was reviewed. Two low global warming potential dielectric uids, Novec-649 and HFE-7100 both having a global warming potential value of one were chosen for this current study. Tests were conducted on three di erent surfaces, namely, bare silicon die, microporous surface and micro nned surface to address how surface enhancements can im- prove the thermal performacnce. The microporous surface with features ranging from 10 to 50 microns in size was prepared using a sintered process developed by 3M corporation to enhance the performance of primary die. Tests were conducted on test boards with two di erent die spacings; 25 mm and 10 mm to address the e ect of neighboring die heating. Finally, the dielectric uid was intentionally contaminated with DOP to study the e ect of thermal performance in the presence of contaminants. A wide range of data was obtained for di erent heating scenarios useful in developing a practical two-phase immersion cooled system for data centers with reduced environmental impact. 19 Chapter 3 EXPERIMENTAL FACILITY, TEST BOARDS AND EXPERIMENTAL PROCEDURE This Chapter explains the detailed design of the experimental tank, details of the test board used for the study and information on the individual instruments or devices like Kapton heaters, data acquisition system, high speed camera and condensers used in the experiment. This chapter also discusses the calibration process involved in calibrating the temperature sensing diodes. Finally the procedure for a typical data run is described. 3.1 Test Board Layout Tests were conducted on a board with an array of four equally spaced die as shown in Figure 3.1. Each die of size 25 mm x 25 mm is comprised of a 4x4 array of thermal test cells. Each thermal cell was provided with four electrical connections, two for supplying the exci- tation current and two for measuring voltage across the circuit. A total of 24 temperature sensors were deployed on the test board. The diode locations for local temperature measure- ment are shown in Figure 3.1 (marked in red). The circuit diagram of an unpopulated test board is shown in the Figure 3.2 . A typical thermal test cell has four leads for supplying power and eight leads for temper- ature measurements as shown in Figure 3.3. Pins 1, 7, 6 and 12 are used for power supply. Each thermal test cell was incorporated with either a Wheatstone bridge type network or a ve-diode series string for local temperature measurement. Pins 2, 3, 8, 9 are used for the ve-diode series string and Pins 4, 5, 10, 11 are used for the Wheatstone bridge type network. The sensitivity of the ve-diode series string is 10 mV= C and the Wheatstone bridge network has a sensitivity of 2 mV= C. The ve-diode string scheme was used for temperature measurement in the present study due to its higher sensitivity. 20 Figure 3.1: Schematic of test board showing four 25 mm x 25 mm die each comprised of 16 thermal test cells. The temperature sensing diode locations are marked in red Figure 3.2: Circuit diagram of an unpopulated test board showing the diodes and power connections 21 Figure 3.3: Layout of a single thermal test cell 3.2 Experimental Setup This section describes the design of test tank and details the di erent components used in the experimental facility. 3.2.1 Schematic Diagram The test board was submerged in the pool of dielectric uid which was contained in an aluminum tank. Pool temperature was controlled using PID (Proportional-Integral- Derivative) controlled Kapton heaters which were a xed to the outer wall of the aluminum tank. The position of the Kapton heaters on the aluminum tank is as shown in Figure 3.4. A water-cooled degassing condenser was vented to the atmosphere to maintain the tank at atmospheric pressure conditions. Pressure has a signi cant e ect on the saturation temper- ature which in turn e ects the nucleation characteristics. Two condensers, one in the vapor space and one submerged in the pool, were used. The submerged condenser was operated during subcooled experiments at higher heat uxes. An ethylene glycol-water mixture was used in both the condensers operated by an external chiller unit. The details of chiller unit 22 are provided in the subsequent section of this chapter. Temperature readings and power supplied to the test board were measured using a data acquisition system programmed in a computer using a Labview Virtual Instrument (VI). A high-speed camera was used to capture the nucleation events. The resulting videos were used to evaluate the nucleation characteristics. The design of the test tank and the details of the components involved are discussed in the subsequent sections of this chapter. Figure 3.4: Experimental setup showing the various components involved 3.2.2 Test Tank Design and Construction Aluminum was chosen as the material to construct the test tank because aluminum is rigid and leaks can be easily xed. The design of the aluminum tank was done using the CAD software SolidWorks 2012 as shown in Figure 3.5. The outer dimensions of the tank were 250 mm x 250 mm x 300 mm (10x10x12 inch3). The tank was constructed with three viewing windows made of glass. Each window is 150 mm (6 inch) in diameter and was supported using aluminum retaining rings. EPDM O- rings were used to seal the glass windows against the wall. The lid was sealed using 1.58 mm 23 Figure 3.5: Tank designed using SolidWorks (isometric view of assembled tank) (1/16 inch) EPDM gaskets. EPDM was chosen since it is compatible with dielectric uids Novec-649 and HFE-7100. The various components in the tank are indicated as shown in Figure 3.6. The positions of the condensers with respect to the test board are as shown in Figure 3.7. The inlet and outlet of the circulation chiller were connected to a copper coil condenser immersed in the dielectric uid. The copper coil was custom fabricated using 6.35 mm (0.25 inch) OD copper tubing. The PID controller was programmed to maintain pool temperature set by a K-type thermocouple. Kapton heaters with two di erent watt densities, ve 100 cm2 heaters rated at 1.6 W=cm2 and three 50 cm2 heaters rated at 0.8 W=cm2 were a xed to the aluminum walls. A K-type thermocouple calibrated against a NIST-traceable thermistor rated at 0.01 C accuracy, was used to measure the pool temperature. The pool temperature was recorded using a DAQ module NI 9213. 24 Figure 3.6: Various components used in the test tank Figure 3.7: View of internal tank showing the position of the condensers and connectors with respect to the test board 25 3.2.3 Leak Testing Leak testing was done using air at 10 psi=g. The arrangement is as shown in Figure 3.8. Soap solution was used to detect any leaks in the welded joints, window crevices and on threaded holes prior to testing. Figure 3.8: Aluminum tank leak tested using air at 10 psi/g 3.3 Electrical Connections A relay board was incorporated to facilitate switching between temperature sensing diodes. The diodes were excited using a Keithley 2401 sourcemeter with an excitation current of 2.2 mA. A simple circuit diagram involving connections between the diodes, sourcemeter and relay board is shown in the Figure 3.9. The positive terminal of the SourceMeter was connected to the anode of the diodes using a breadboard. The cathode of each diode was connected to the each NO (Normally Open) terminal of the relay circuit board. The CM (common) terminals of the relay circuit board were connected to the negative terminal of the SourceMeter on the bread board. The other 26 Figure 3.9: Circuit diagram showing the diodes being excited by a source meter and voltage measured using a DAQ device two terminals of the diode were connected to the voltage module of the DAS (NI 9205). The measurement capability of NI 9205 is -10 to 10 V. A Visual Basic (VB) application was used to facilitate switching between the diodes. 3.3.1 Hermetically sealed connectors and wiring layout Two hermetically-sealed connectors (Douglas Electrical Connectors 24060) were used to bring the electrical leads out of the uid containment. Electrical connections were made using 28-gauge wire as shown in Figure 3.10. Figure 3.10: Hermetically sealed connectors 27 A total of 160 wiring connections were used on the PCB with each connector carrying 80 wires wires into the aluminum tank. Each test die required 40 leads with 16 leads for powering the die and 24 leads for temperature sensing diodes (12 wires for exciting the diodes using sourcemeter and 12 wires for measuring the voltage across each diode). The color scheme for the connectors is shown in Table 3.1. Table 3.1: Color scheme for the connectors Power IN Red Power OUT Black Excite 1 Yellow Excite 2 Blue Sense 1 Green Sense 2 White 3.4 Di erent test surfaces Experiments were conducted to study the pool boiling characteristics from an array of heaters which simulate electronic chips on a vertically-oriented printed circuit board. A pool boiling study was conducted on an array of four bare die spaced 25 mm and 10 mm apart as shown in Figure 3.11 using two di erent dielectric uids; namely Novec 649 and HFE 7100. Two di erent die spacings were tested to study the neighboring die e ects. In an e ort to increase thermal performance, tests were also conducted on dies spaced 25 mm and 10 mm apart augmented with two di erent enhanced heat sinks featuring micro- porous and micro nned surfaces as shown in Figure 3.12. The 25 mm x 25 mm copper heat sink had an array of 30 x 30 ns, as shown in Figure 3.13. The square pin ns were nominally 400 microns by 400 microns in size, spaced nomi- nally 400 microns apart. Each n is approximately 2 mm tall. The height of the base plate is 1 mm. The microfninned surfaces were fabricated using wire electrical discharge machining (wire EDM). The microporous surfaces were prepared using a sintering process developed by 28 Figure 3.11: Circuit boards with four bare die shown at two spacings; 25 mm and 10 mm. Figure 3.12: Image showing the four test boards having di erent die spacings augmented with enhanced heat sinks. From left to right, 1: Board with 25 mm die spacing with mi- croporous heat sinks, 2: Board with 25 mm die spacing with pin- n heat sinks, 3: Board with 10 mm die spacing with microporous heat sinks, 4: Board with 10 mm die spacing with pin- n heat sinks 29 3M Corporation. The resulting surface, as shown in the SEM image in Figure 3.14, yields a porous structure with features ranging from 10 to 50 microns in size. The microporous coating thickness is approximately 150 m. The procedure for making the microporous sur- faces are given in the appendices. The footprint of the enhanced heat sinks are same as the die. These heat sinks were chosen for evaluation because micro nned surfaces are easy to manufacture and microporous surfaces are lighter. Figure 3.13: Detailed view of the 30 x 30, 400-micron square n array on the micro nned surface 3.5 Auxillary devices used in the experimental facility This section provides the technical speci cations for the auxillary devices used in the experimental facility. 3.5.1 Power Supply A 3KW American Reliance SPS 150-20-K0E2 DC power supply was used to power the dies. The voltage supplied across the heaters was measured using a HP 34401A multimeter and the current supplied was measured using DAS module NI 9227. The measurement capability of NI 9227 is 0-5 A. 30 Figure 3.14: Scanning electron micrograph of the microporous surface showing 10 to 50- micron pore size 3.5.2 High Speed Camera A Phantom V310 high speed camera was used to the capture high speed images of the bubbles emanating from the test surface due to boiling. Three di erent objectives were used based on the size of the die being interested. The camera can operate from 200 fps to 120000 fps. 3.5.3 Chiller Unit A recirculating chiller, NESLAB ThermoFlex, purchased from Thermo Scienti c was used to provide a continuous supply of condensing uid at a constant temperature and ow rate. The chiller unit consists of an air cooled re geration system, heat exchanger, recirculating pump and a microprocessor controller. Two condensers; one on the vapor space and one submerged in the dielectric pool were employed. The temperature of the chiller outlet can be controlled to a resolution of 0.1 C. 31 3.6 Contaminated Fluid Tests Low levels of uid contamination were measured in samples extracted during various stages of testing and were analyzed by a di erent research group (Kelly [27]). These trace contaminants were most likely from sources such as the Te on wire coating and plasticizers used in gasket and O-ring material. One of the contaminants, dioctyl phthalate (DOP) was used as a proxy for all these myriad contaminants because it was easy to detect. A series of experiments were conducted using uid that was intentionally contaminated to a much greater extent, to quantify contamination e ects. The use of dicotyl phthalate at these levels required the use of a fume hood. The arrangement is shown in Figure 3.15 . Figure 3.15: Contaminated uid testing being conducted under a fume hood. The uid containment tank is seen in the background in the middle of the image. 3.7 Calibration Prior to testing, the diodes on the thermal test die were calibrated. Temperature sensors were calibrated by placing the PCB in a constant temperature calibration oven. The reference used is a NIST-traceable thermistor (0.01 C). The behavior is fairly linear over the range of test temperatures anticipated. A linear relationship was tted to the calibration data 32 and programmed into LabVIEW to permit conversion of recorded voltage to die surface temperature. A sample calibration curve for one of 24 diodes is shown in Figure 3.16. Similar calibration curves were obtained for all 24 diodes on each board tested. Figure 3.16: Contaminated uid testing being conducted under a fume hood. The uid containment tank is seen in the background in the middle of the image. 3.8 Experimental Procedure Once the temperature sensing diodes were calibrated, test boards were immersed in the dielectric pool for testing. The temperature of the pool was controlled using the PID controlled Kapton heaters. The pool temperature was maintained at either saturated or 15 C subcooled condition depending upon the paramter of study. The aluminum tank was vented to atmospheric pressure conditions by opening the degassing condenser. Chilled water was made to ow through the degassing condensers. The submerged condenser was usually operated during subcooled experiments at higher heat uxes. Prior to collecting data, the pool was allowed to degas for a su cient amount of time to eliminate non-condensables. The dies were powered up using the DC power supply. A typical data run consisted of the collection of surface temperatures as the power is increased followed by temperature 33 measurements as the power is decreased. This was done to capture and characterize the hysteresis, speci cally temperature overshoot occurring at incipience of the boiling process. Care was taken to achieve steady-state. The diode temperatures were monitored using Labview VI for every data point and su cient time was allowed for the pool temperature and die surface temperatures to stabilize before moving to the subsequent data point. This point is referred to as steady-state. The diode temperature data were recorded using the Labview program and were processed using MATLAB. The majority of the data plots presented within this work represent the thermal per- formance recorded during the decreasing portion of the experimental runs thus avoiding the potential inconsistencies and unpredictability of the temperature overshoot phenomenon. 34 Chapter 4 RESULTS AND DISCUSSION The primary independent variables were pool temperature, die spacing, heat sink sur- face, the dielectric uid, and uid condition (pristine v/s contaminated). The variables tested in the experimented are tabulated in Table 4.1. The sub-sections that follow will rst detail results for bare die. This segment will be provided in the greatest detail. The e ect of neighboring die heating on the primary test die will be discussed with aid of high speed images. The subsequent section will show results for the microporous and micro nned heat sinks. These results will be provided where the narrative di ers from the ndings for bare die. Finally a segment on the results of uid contamination is presented. Table 4.1: Variables tested in the experiment Variables Range/Description Dielectric uid Novec-649 & HFE-7100 Pool temperature Saturated & 15 C subcooled pool Die spacing 25 mm & 10 mm Surface Bare silicon, microporous & micro nned Fluid condition Virgin & contaminated 4.1 Typical pool boiling curve Data were collected for increasing and decreasing heat ux cycles. The area used in the heat ux calculation is the area of the test die. These values are recorded at self-imposed maximum surface temperatures that ensured operation well below the critical heat ux. The results presented are the wall superheat heat obtained from six sensors located on the top left die as shown in the cartoon inset in the following gures. (In all the tests performed, 35 only small di erences were observed in the surface temperatures depending on the location of temperature sensing device on the die. Since the di erences were not substantial, the values shown here are averages.) A typical pool boiling curve on log-log axes is shown in Figure 4.1. The details of the die surface, uid being tested and the pool conditions are indicated in the subsequent gures. The data show the hysteresis between increasing and decreasing heat cycles. The overshoot occur because of the shift in heat transfer mechanism from natural convection to nucleate boiling as indicated. Figure 4.1: A typical pool boiling curve obtained for the case of single die heating using Novec-649 at saturation temperature. Tsat , Tsub and Tw in the plots refer to the saturated pool temperature, subcooled pool temperature and temperature of the wall. Some plots in the subsequent sections are shown with surface temperature varying against heat ux for better understanding of how pool temperature or the choice of dielectric uid can e ect the thermal performance. The data plots presented represent the thermal performance recorded during the decreasing portion 36 of the experimental runs thus avoiding the potential inconsistencies and unpredictability of the temperature overshoot phenomenon. 4.2 Test Sequence for Bare Silicon Die A sequence of 4 tests using Novec-649 and HFE-7100 were performed as indicated below. The test sequence was: 1. Single die without any neighboring die. This was performed as the baseline study. The upper left die was used in this test. The rst test was replicated to obtain a quantitative measure or repeatability as shown in Figure 4.2. A typical data run has got both increasing and decreasing data cycles. The data for increasing run was collected by powering the primary die from zero to a maximum value of heat ux that ensured operation well below the critical heat ux. Data for decreasing run was collected by decreasing the power supplied to die from the maximum value of heat ux to zero. The uid was then allowed to cool down to room temperature before starting data run 2. From Figure 4.2 it is clear that, the data recorded for two di erent runs were in accordance with each other. The minor di erences are due to the unpredictability of the nucleation characteristics. 2. Single die in the presence of a natural convection plume emanating from the die lo- cated below it on this vertically oriented board. The natural convection plume was generated by heating the lower die to a heat ux of 0.3 W=cm2. 3. Single die in the presence of a plume of vapor bubbles emanating from the die located below it on this vertically oriented board. The plume of bubbles was generated by heating the lower die to a heat ux of 6.0 W=cm2, a condition that produces vigorous nucleation activity. Tests 2 and 3 were performed to study the e ect of neighboring heat sources. 4. All 4 die were heated together. The temperature and heat ux data were obtained for all four dies. While the tests were conducted, high speed images were obtained to have a better understanding of the bubble characteristics. 37 Figure 4.2: Repeatability test for the case of single die heating using Novec-649 in a saturated pool. Novec-649 This section details the results obtained for di erent heating scenarios as mentioned in the previous section. Experiements were conducted on two test boards with four bare silicon die spaced 25 mm apart and 10 mm apart, using Novec-649. The section starts with single die heat heating scenario with the e ect of subcooling. Also discussed is the in uence of neighboring die heating on the primary die. This section ends with the results obtained when all the four dies on the test board were powered up. 4.2.1 Single die heating using Novec-649 Figure 4.3 show the data obtained using test board with die spaced 25 mm apart. The data show the e ect of subcooling on the performance of the primary die. The heat ux values shown were recorded during the decreasing heat ux portion of the data collection cycle that typically comprises an increase in chip power followed by a decrease. The top left die as shown in the cartoon inset was powered from zero to a value of heat ux where the surface 38 temperature was well below 80 C while maintaining the pool temperature at 49 C. The experiment was repeated by subcooling the pool to 15 C. This level of subcooling was chosen to indicate a start-up transient. The pool temperature was maintained by PID controlled Kapton heaters a xed to the aluminum walls. The results obtained provide the baseline for subsequent experiments. A decrease in pool temperature improves the heat dissipation capability in the natural convection regime as indicated by the leftward shift of the data in Figure 4.3 whereas in the fully developed nucleate boiling regime, both the curves converge. The ux that can be dissipated while maintaining the die surface temperature at around 75 C has now risen to 13.3 W=cm2 under subcooled condtions compared to 10.9 W=cm2 using a saturated pool. These improvements are due to the reduction in bubble departure diameter due to the subcooled conditions that cause departing bubbles to shrink as they come in contact with cooler surrounding liquid. The highest heat ux under subcooled condition represents a heat load of 80 W for the primary die measuring 24 mm x 24 mm (surface area approximately measuring 6 cm2). High speed images as shown in Figure 4.4 and Figure 4.5 were obtained using a Phantom V310 camera. The bubble characteristics were recorded for the bare silicon die board with 25mm die spacing in Novec-649 under both saturated and 15 C subcooled pool condition. Bubbles are larger in size under saturated pool conditions and tend to coalesce even at low heat uxes, whereas bubbles are smaller in size and tend not to coalesce at low heat ux under subcooled pool conditions. Under both saturated and 15 C subcooled pool condition, observations show the expected trends of increasing nucleation site density and increasing departure diameter with increasing heat ux. At higher heat uxes, the bubbles tend to coalesce as shown in Figure 4.4 and Figure 4.5. Subcooling leads to lower bubble departure diameters. Single die heating experiments were also conducted on the test board with die spaced 10 mm apart. This is to address the issue of how close the die can be placed within each other. As expected, the data shown in Figure 4.6 are similar to the data obtained using the 39 Figure 4.3: Performance characteristics when top left die alone on test board with die spaced 25 mm apart was powered up in Novec-649. Figure 4.4: High-speed images showing bubble characteristics at progressively higher heat uxes on the bare die at 25 mm die spacing board using Novec 649 under saturated pool conditions. 40 Figure 4.5: High-speed images showing bubble characteristics at progressively higher heat uxes on the bare die at 25 mm die spacing board using Novec 649 under 15 C subcooled pool conditions. test board with die spaced 25 mm apart. The slight di erence is possibly due to the relative position of primary die from top layer of dielectric uid (or how close the primary die is to the vapor space condenser). Figure 4.7 show the bubble characteristics recorded for the bare silicon die board with 10 mm die spacing in Novec 649 under 15 C subcooled pool condition. As the heat ux increases, the bubble frequency increases with increasing bubble departure diameters. The nucleation site density was not uniform as expected because boiling depends on various factors like die surface nish and the level of heat ux tested. Sridhar [28] reported a maximum heat ux dissipated of 10 W=cm2 for a surface temperature of 82 C for single die heating using FC-72 under both saturated and 15 C subcooled conditions. 4.2.2 Single die heating with activated neighboring die using Novec-649 The next experiment was conducted by heating the primary die in the presence of a natural convection plume emanating from the die located below it on this vertically oriented board. The natural convection plume was generated by heating the lower die to a heat ux 41 Figure 4.6: Performance characteristics when top left die alone on test board with die spaced 10 mm apart was powered up in Novec-649. Figure 4.7: High-speed images showing bubble characteristics at progressively higher heat uxes on the bare die at 10 mm die spacing board using Novec 649 under 15 C subcooled pool conditions. 42 of 0.3 W=cm2. The experiment was conducted by heating the primary die in the presence of a plume of vapor bubbles emanating from the die located below it on this vertically oriented board. The plume of bubbles was generated by heating the lower die to a heat ux of 6.0 W=cm2, a condition that produces vigorous nucleation over the entire die surface. These two conditions are meant to represent neighboring heat sources at idle and active states respectively. The plots shown in Figure 4.8 and 4.9 are produced from the data recorded during the increasing run of a data cycle. This is done in order to depict overshoot characteristics under the in uence of neighboring die heating. Results in Figure 4.8 show that hysteresis e ects cease to occur when the surface is in uenced by natural convection plumes from a neighboring heat source. It can also be seen that the characteristics are not very di erent as heat ux approaches 10 W=cm2. Figure 4.9 show the elimination of overshoot in the presence of a bubble plume and the curves overlapping at the high end of the heat ux range tested. Figure 4.8: Boiling curves for a single die with the in uence of natural convection plumes from neighboring die under saturated conditions (pool temperature of 49 C) 43 Figure 4.9: Boiling curves for a single die with the in uence of vapor bubbles from neigh- boring die under saturated conditions (pool temperature of 49 C) The in uence of activated neighboring die on the primary die was tested also under subcooled pool conditions. Boiling curves shown in Figure 4.10 and 4.11 are similar to Figure 4.8 and 4.9 respectively obtained using saturated pool conditions. Under the in uence of natural convection plumes, the overshoot occured at higher heat ux and the presence of vigorous vapor bubbles enhances the performance in the natural convection regime by completely eliminating the overshoot. This phenomenon is caused by the disruption of the boundary layer on the primary die due to boiling activity from the neighboring die. It has got no negative impact on the surface temperature at higher heat ux value as shown by the convergence of curves in the fully developed nucleate boiling regime. Figure 4.12 shows the high speed image obtained at a constant heat ux of 7.2 W=cm2 for the case of single die heating with or without the in uence of neighboring die heating under subcooled pool conditions. The bubbles are smaller in size because of the subcooled pool. 44 Figure 4.10: Boiling curves for a single die with the in uence of natural convection plumes from neighboring die under subcooled conditions (pool temperature of 34 C) Figure 4.11: Boiling curves for a single die with the in uence of vapor bubbles from neigh- boring die under subcooled conditions (pool temperature of 34 C) 45 Figure 4.12: High-speed images showing bubble characteristics on the primary die with and without neighboring die heating at a constant heat ux on the bare die at 25 mm die spacing board using Novec-649 under 15 C subcooled pool conditions. All three images are recorded at a heat ux of 7.2 W=cm2 4.2.3 Four die heating using Novec-649 After studying the single die heating scenarios with and without the in uence of neigh- boring die heating, experiments were conducted in which all four die were powered up on the bare silicon die test board. Tests were conducted at two die spacings; 25 mm and 10 mm under two di erent pool conditions: saturated and 15 C subcooled. Temperature and heat ux data were obtained for all four dies. Figures 4.13 and 4.14 show the heat ux values recorded during the decreasing heat ux portion of the data collection cycle. Care was taken to achieve steady-state (Achieving the steady state was explained in chapter 3). The results presented are the average surface temperatures obtained from the six sensors located on the top left die as shown in the cartoon inset in the gures. Prior to every data run, care was taken to degas the uid pool. Figure 4.13 compares the pool boiling characteristics of the test board with 25 mm and 10 mm die spacing for two di erent pool conditions using Novec-649. From Figure 4.13, it is clear that the thermal performance under subcooled conditions, which yield smaller vapor bubbles, is virtually unchanged from that at the larger spacing. On the other hand, the 46 thermal performance of the test board with 10 mm die spacing is slightly degraded at high ux for the saturated conditions. The degradation is on the order of 4 C at the highest ux shown on the curves. At low ux values, there is actually a slight bene t by bringing the die closer, as indicated by the leftward shift of data. The data in Figure 4.13 under subcooled conditions represent a total heat dissipation of 350 W at the highest ux recorded; 14.6 W=cm2. The two competing in uences that drive this are the improved boundary layer mixing promoted by nucleating bubbles acting opposite to the increase in local boundary layer temperature brought about by larger vapor mass at higher uxes. Figure 4.14 shows a composite data set representing two spacings, two pool conditions, and two die activation scenarios. Results shown in Figure 4.14 obtained when four dies were powered up were compared with the results when the top left die was alone powered up, both in Novec-649 under saturated conditions. The results further substantiate the fact that the test board with 25 mm die spacing performs better than the test board with 10 mm die spacing. When four dies were heated up all together, the board with 25 mm die spacing behaves like an isolated die as their results matched with the results obtained from single die heating. On the other hand, the performance of the test board with 10 mm die spacing was degraded at higher heat uxes as shown in the Figure 4.14. However, neighboring die e ects, potentially from the improved mixing of the thermal boundary layer promoted by nucleating bubbles, results in an improvement of the perfor- mance of the top left die when all four die are heated versus when only that die is heated. The data in Figure 4.14 under saturated conditions represent a total heat dissipation of 290 W at the highest ux recorded; 12.3 W=cm2 for the board with 10 mm die spacing using Novec- 649. The results obtained under subcooled pool conditions show an improved performance in the natural convection regime as indicated by the leftward shift of the data as shown in Figure 4.13. Using Novec 649, under 15 C subcooled pool conditions, the spacing between 47 Figure 4.13: Performance characteristics of top left die when all four dies were powered up in Novec-649 Figure 4.14: Plot comparing the single die heating and four die heating in Novec-649 under saturated pool conditions 48 the dies did not a ect the results as opposed to the saturated pool condition where there is slight degradation in the board with 10 mm die spacing at higher heat uxes. A maximum power of 350 W was dissipated with Novec 649 at surface temperatures that ensured safe operation well below the critical heat ux for the test board with 10 mm die spacings under subcooled conditions. HFE-7100 The experiments done on the vertically oriented bare silicon die board using Novec-649 was repeated using another dielectric uid HFE-7100. Both dielectric uids Novec-649 and HFE-7100 have comparable physical properties. The saturation temperature for HFE-7100 is 61 C at one atmosphere. The thermophysical properties of Novec-649 and HFE-7100 are listed in Table4.2 One notable di erence is the latent heat of vaporization, which is 88 KJ=kg for Novec-649 and 111.6 KJ=kg for HFE-7100. This section detail the results obtained for single die heating scenario on the test board with four bare silicon die spaced 25 mm apart and 10 mm apart using HFE-7100. The e ect of subcooling the pool is also shown. This section ends with the results obtained when all the four dies on the test board were powered up. Table 4.2: Properties of dielectric uids Novec-649 and HFE-7100 Properties Novec-649 HFE-7100 Saturation temperature 49 C 61 C Density 1600 kg=m3 1500 kg=m3 Latent heat of vaporization 88 kJ=kg 111.6 kJ=kg Surface Tension 0.0108 N=m 0.0136 N=m Thermal Conductivity 0.059 W=mK 0.0698 W=mK Speci c Heat 1103 J=kgK 1173 J=kgK Global Warming Potential 1 1 49 4.2.4 Single die heating using HFE-7100 For the case of single die heating, the top left die was heated from zero to a value of heat ux corresponding to a self-imposed maximum surface temperatures that ensures operation well below the critical heat ux. Figure 4.15 represents collective data obtained at two die spacings; 25 mm and 10 mm under two di erent pool conditions: saturated and 15 C subcooled condition. Subcooling enhances the thermal performance as indicated by the leftward shift of the data in Figure 4.15 as was noted in the results section for Novec-649. Subcooling the pool reduces the surface temperature of about 6 C for the maximum heat ux dissipated using a saturated pool. The di erence in performance between the board with 25 mm and 10 mm die spacing is again de ned by the surface characteristics and also by how close the primary heated die is to the top layer of dielecric uid (or how close is the primary die to the vapor space condenser). Figure 4.15: Performance characteristics with top left die alone powered on test board with two di erent die spacings; 25 mm and 10 mm apart was powered up in HFE-7100. 50 4.2.5 Single die heating with activated neighboring die using HFE-7100 The rst obvious implication of the higher atmospheric pressure saturation temperature for HFE-7100 is the surface temperatures are shifted upwards by 12 C compared to data for Novec-649 as shown in Figure 4.16 and 4.17 . Some of the other results are in line with what has been reported earlier for Novec-649, namely; the overshoot is now at a higher heat ux in the case of single die heating under the in uence of a natural convection plume from the die below it, and is completely eliminated in the presence of a plume of nucleating bubbles from the die below it. The in uence of vigorous boiling from the die below the primary die are much greater in saturated pool conditions as shown in Figure 4.16. Under subcooled conditions, the di erent boiling curves converge around 4 W=cm2 and remain almost the same in fully developed nucleate boiling regime up to the highest heat ux data recorded as shown in Figure 4.17. Figure 4.16: Boiling curves for a single die with the in uence of natural convection plumes and later vapor bubbles from neighboring die under saturated conditions (pool temperature of 61 C) 51 Figure 4.17: Boiling curves for a single die with the in uence of natural convection plumes and later vapor bubbles from neighboring die under 15 C subcooled conditions using HFE- 7100 4.2.6 Four die heating using HFE-7100 Figure 4.18 compares the pool boiling characteristics of the test board with 25 mm and 10 mm die spacing for two di erent pool conditions using HFE 7100. The thermal performance at lower heat uxes remains the same for both the test boards with the di erent die spacing. On the other hand, at higher heat uxes, the performance of the test board with 10 mm spacing is degraded as shown in Figure 4.18. This level of degradation remained almost the same for both saturated and subcooled pool conditions. The degradation is on the order of 5 C and 4 C for the saturated pool condition and the subcooled pool condition, respectively at the highest ux shown on the curves. A total of 340 W was dissipated with all four dies powered up at the highest heat ux recorded 14.2 W=cm2. 52 Figure 4.18: Performance characteristics of top left die when all four dies were powered up in HFE-7100 4.2.7 Comparison of four die heating scenario between Novec-649 and HFE- 7100 The thermal performance of the test boards remains the same for both Novec 649 and HFE 7100 except for the di erence in surface temperatures which is due to the di erence in their saturation temperatures at atmospheric pressure. The results obtained under subcooled pool conditions show an improvement in the natural convection regime as indicated by the leftward shift of the data as shown in Figure 4.19 and 4.20. The test board with 25 mm die spacing performs better than the test board with 10 mm die spacing in both saturated and 15 C subcooled pool conditions. These di erences, however, are minor and should allow microprocessor die to be spaced within 10 mm of each other without concern, thereby reducing interconnect signal delays. Maximum heat dissipation rates of 350W and 340W were measured in Novec 649 and HFE 7100, respectively, at surface temperatures that ensured operation well below the critical 53 Figure 4.19: Comparison between saturated HFE-7100 and Novec-649 in virgin uid for the board with four active bare die spaced 25 mm apart. Figure 4.20: Comparison between saturated HFE-7100 and Novec-649 in virgin uid for the board with four active bare die spaced 10 mm apart. 54 heat ux for the test board with 10 mm die spacings under subcooled conditions. The most signi cant results obtained using test board with four bare silicon die spaced 25 mm and 10 mm apart are tabulated in Table 4.3 and 4.4 respectively. Table 4.3: Highest power recorded for bare silicon die test board with die spaced 25 mm apart using dielectric uids Novec-649 and HFE-7100 Test Pool Condition Novec-649 HFE-7100 Single Die Heating Saturated 65.4 W 60.6 W 15 C subcooled 79.8 W 80.4 W Four Die Heating Saturated 276 W 285.6 W 15 C subcooled 264 W 307.2 W Table 4.4: Highest power recorded for bare silicon die test board with die spaced 10 mm apart using dielectric uids Novec-649 and HFE-7100 Test Pool Condition Novec-649 HFE-7100 Single Die Heating Saturated 65.4 W 67.2 W 15 C subcooled 79.8 W 86.4 W Four Die Heating Saturated 295.2 W 302.4 W 15 C subcooled 350.4 W 340.8 W 4.3 Enhanced heat sinks The results for bare die provide baseline data that will be useful in an initial liquid cool- ing implementation scheme on commercial o -the-shelf (COTS) die. Incorporating enhanced surface heat sinks yields improved results. In an e ort to increase thermal performance, tests were also conducted on dies spaced 25 mm apart and 10 mm apart augmented with two dif- ferent enhanced heat sinks featuring microporous and micro nned surfaces. Test boards with dies bonded to enhanced heat sinks were shown earlier in Figure 3.12. Tests were conducted 55 under two di erent pool conditions; saturated and 15 C subcooled, using two di erent di- electric uids Novec-649 and HFE-7100. This section discusses the enhancement in heat transfer obtained by attaching enhanced heat sinks on the primary die. 4.3.1 Microporous heat sinks The microporous heat sinks had the same footprint as the die in these tests. The copper heat sinks were indium-attached to the thermal test die. As mentioned earlier, all results will be presented as average temperatures for the six diodes located on the top left die, as indicated by the cartoon insets on the plots. The e ect of die spacing were studied for four die heating scenario. For this experiment, all the four dies were powered up from zero to a maximum value of heat ux that ensured operation well below the critical heat ux. The nucleation activities from the microporous surface were monitored using a high speed camera. In Figure 4.21, note that over 13 W=cm2 is being dissipated at a superheat of less than 10 C, corresponding to a surface temperature of less than 60 C, since Novec-649 has a saturation temperature of 49 C. This is much better than the performance with bare silicon die. This excellent thermal performance is made possible because of the large number of nucleation sites present on the sintered microporous surface. Moreover, the small feature size of the nucleation sites, means vapor bubbles are departing at very low values of departure diameter. This situation, a large number of small vapor bubbles, is an extremely desirable situation, resulting in breakdown of the thermal boundary layer while still allowing for surface rewetting by cooler uid. The thermal performance under saturated pool conditions remains virtually unchanged for both the spacings. As discussed with the bare silicon die results using Novec-649, and shown in Figure 4.22, there is no appreciable di erence in the thermal performance between the die with microporous heat sinks with 25 mm and 10 mm die spacing under subcooled pool conditions, that yield even smaller vapor bubbles. Note that the variable plotted on 56 the x-axis in Figure 4.22 is the di erence between wall temperature and subcooled pool temperature, which is 34 C for all subcooled tests (15 C subcooling) in Novec-649. The results obtained under saturated pool conditions were compared with the data obtained by You et al. [18] using platinum heaters sputtered with a thin lm of alumina particles. As expected the surface treated with sintered microporous copper spheres enhanced the performance comparing to an untreated surface. Figure 4.21: Performance comparison of the board with 25 mm and 10 mm die spacing with microporous heat sinks using Novec-649 under saturated pool conditions Similar board spacing e ects were measured in HFE-7100 under saturated conditions. As shown in Figure 4.23, both spacings resulted in about the same degree of superheat (the X-axis), for a given heat ux. Once again, note that the actual die surface temperature is higher because the uid itself has a saturation temperature of 61 C (compared to 49 C for Novec-649) at atmospheric conditions. Under subcooled conditions too, bringing the die closer does not adversely a ect thermal performance, as shown in Figure 4.24. 57 Figure 4.22: Performance comparison of the board with 25 mm and 10 mm die spacing with microporous heat sinks using Novec-649 under subcooled pool conditions Figure 4.23: Performance comparison of the board with 25 mm and 10 mm die spacing with microporous heat sinks using HFE-7100 under saturated pool conditions 58 Figure 4.24: Performance comparison of the board with 25 mm and 10 mm die spacing with microporous heat sinks using HFE-7100 under subcooled pool conditions Performance comparison between microporous heat sink and bare silicon die The plots in Figures 4.25 and 4.26 show a signi cant improvement in the performance with the use of microporous heat sink. The maximum heat ux dissipated by a bare silicon die was achieved by much reduced surface temperature of order 15 C with the use of microporous heat sinks. The highest heat ux attained was 14.4 W=cm2 with the microporous enhanced surface under subcooled conditions using HFE-7100 as the working uid. This maximum heat ux corresponds to a power dissipation of 345 W. The most signi cant results with associated surface temperatures when all four die spaced 25 mm apart were powered up are provided in Tables 4.5 and 4.6. This excellent thermal performance is made possible because of the large number of nucleation sites present on the sintered microporous surface compared to a bare silicon surface. The bubble departure diameters are very small because of the small feature size of the nucleation sites. This condition is extremely conducive to 59 breakdown of the thermal boundary layer while still allowing for surface rewetting. El-Genk and Ali [17] studied the saturation boiling of PF-6050 dielectric uid for di erent copper microporous surface coating thicknesses ranging from 95-220 m. The CHF values obtained using the coated surface were reported to be 40-70% higher than the values obtained using plain surfaces. A maximum CHF value of 27.8 W=cm2 was reported for the surface with 171 m thick microporous layer. Table 4.5: Highest power and surface temperature values recorded for the case of four die heating with die spaced 25 mm apart using bare silicon die and die augmented with micro- porous heat sink using Novec-649 Pool Condition Die Surface Highest power Surface temperature Saturated pool Bare Silicon 276 W 72.6 C Microporous surface 283.2 W 57.3 C 15 C subcooled pool Bare Silicon 266.4 W 73.1 C Microporous surface 312 W 57.6 C Table 4.6: Highest power and surface temperature values recorded for the case of four die heating with die spaced 25 mm apart using bare silicon die and die augmented with micro- porous heat sink using HFE-7100 Pool Condition Die Surface Highest power Surface temperature Saturated pool Bare Silicon 288.6 W 80.3 C Microporous surface 271.2 W 68.4 C 15 C subcooled pool Bare Silicon 307.2 W 83.5 C Microporous surface 345.6 W 68.7 C 4.3.2 Micro nned heat sinks Information on the micro nned surfaces are presented in Figure 3.13. The 25 mm x 25 mm copper heat sink had an array of 30x30 ns, as shown in Figure 3.13. The square pin ns were nominally 400 microns by 400 microns in size, spaced nominally 400 microns 60 Figure 4.25: Performance comparison between bare die and microporous heat sinks at 25 mm die spacing in Novec-649 Figure 4.26: Performance comparison between bare die and microporous heat sinks at 25 mm die spacing in HFE-7100 61 apart. Each pin n is approximately 2 mm tall. In gures 4.27 and 4.28, the data are average temperatures obtained from the six diodes on the top left die, and with all four die active. The primary observations are that the thermal performance with either heat sink is vastly superior to that with bare die. As an illustration, in Figure 4.27, which is for Novec- 649 at saturated and 15 C subcooled conditions, it can be seen that both heat-sinked surfaces result in a surface superheat of less than 10 C at a heat ux of 10 W=cm2, whereas the corresponding surface superheat for the bare die is almost 25 C. Every data set was terminated when the nucleation activity was vigorous enough that it was quite likely to be close to the point where the individual bubbles would coalesce to form a continuous vapor lm, blanketing the heat source. This was based on visual observation and high speed camera images. It should be emphasized that the actual critical heat ux was never experienced in these tests. The micro nned surface, under subcooled conditions in Novec-649, was the surface for which the highest heat ux was recorded; 18.9 W=cm2, corresponding to a power dissipation of 453.6 W from the four-die array. It can be seen that both heat-sinked surfaces result in a surface temperature of 55 C at a heat ux of 10 W=cm2, whereas the corresponding surface temperature for the bare die is almost 72 C. There is a reduction in the surface temperature of more than 15 C with the use of enhanced heat sinks. This excellent thermal performance is made possible because of the large number of nucleation sites present on the enhanced surfaces. Nucleation occurs at randomly distributed and sized pores on the sintered microporous surface and at the intersection of four neighboring micro ns on the micro nned surfaces, as reported in an earlier study by Sridhar [28]. Comparative data for all three surfaces in HFE-7100 are presented in Figure 4.28 for sat- urated and subcooled conditions, respectively. Higher surface temperatures as a consequence of higher saturation temperature, is the only noteworthy di erence when comparisons are made to Novec-649 data. The highest dissipated heat ux recorded was 18.3 W=cm2 using the micro nned surface under subcooled conditions. 62 High speed images as shown in Figure 4.29 and 4.30 were recorded for the case of single die heating using HFE-7100 to study the bubble nucleation characteristics from the micro nned surface. The small feature size of the nucleation sites means vapor bubbles are departing at very low values of departure diameter and are evident in Figure 4.30 . Figure 4.27: Performance comparison between bare die, microporous and micro nned heat sinks at 25 mm die spacing in Novec-649 4.4 Contaminated Fluid Tests The arrangement for contaminated uid testing is shown in Figure 3.15 . A 9000 ml batch of Novec-649 was intentionally contaminated using 30 ml dioctyl phthalate, resulting in a contamination level about one order of magnitude higher than would be expected in normal long-term operating conditions. As mentioned previously, the use of dicotyl phthalate at these levels required the use of a fume hood. The entire experimental rig and associated instrumentation and data acquisition was relocated to a di erent laboratory for this phase of experimentation. The pressure inside the hood was measured and was nominally unchanged 63 Figure 4.28: Performance comparison between bare die, microporous and micro nned heat sinks at 25 mm die spacing in HFE-7100 64 Figure 4.29: High-speed images showing bubble characteristics at progressively higher heat uxes on an isolated micro nned die at 25 mm die spacing board using HFE-7100 under saturated pool conditions. 65 Figure 4.30: High-speed images showing bubble characteristics at progressively higher heat uxes on an isolated micro nned die at 25 mm die spacing board using HFE-7100 under 15 C subcooled pool conditions. 66 from the pressure outside the fume hood, resulting in no change in the uid saturation temperature. The experiments were conducted on the board with microporous heat sinks spaced 25 mm apart. This heat sink was chosen since it has the smallest surface features which would make it most susceptible to changes caused by contaminant deposition. Results are presented in Figure 4.31. The data shown are recorded for the increasing heat ux portion of the cycle so as to track the e ect on nucleation incipience overshoot. As shown in the gure, the performance was severely degraded in the contaminated uid as indicated by the rightward shift of the data. The incipience overshoot is also slightly larger. This is probably due to the interaction of DOP with the nucleation sites on the heater surface. The DOP deposited on all surfaces including the heat sinks and the printed circuit board. After every run, when the uid was cooled down, the uid would turn milky. This might be due to the dissociation of DOP in Novec-649. The pH value of the milky uid was also tested to ensure that dielectric properties had not been adversely a ected and the results were reported by Kelly [27]. After testing in the contaminated uid, two bags of activated carbon were hung in the contaminated pool behind the circuit board and level with the die. (Bags containing activated carbon were contained in a vacuum sealed container before testing to ensure that the activated carbon particles remain dry before being immersed in a dielectric pool, because moist activated carbon can react with dielectric uid to form acids). Proper care was taken in immersing the activated carbon into the test uid to prevent moisture absorption before immersion. The activated carbon was allowed to rest inside that tank with contaminated uid overnight.The thermal test was then repeated. The thermal performance after activated charcoal immersion was slightly better than it was before the charcoal was introduced. The two lines close to each other in Figure 4.31 show this minor improvement. The activated charcoal probably absorbed some of the DOP as it was being circulated in the tank due to vapor movement and natural circulation, but not in su cient quantity to cause a reversal of the performance deterioration. In light of these results, use of the micro nned surface 67 Figure 4.31: Performance comparison between pristine uid and contaminated uid before and after limited activated charcoal clean-up. The surface tested was microporous heat- sinked die spaced 25 mm apart in Novec-649 under saturated conditions is preferred when high levels of contamination are anticipated since its surface structure features much larger nucleation sites which will better resist contamination. 68 Chapter 5 CONCLUSION A pool boiling study on a multichip module was experimentally investigated using two low global warming potential (GWP) dielectric uids, Novec-649 and HFE-7100. Boards comprised of four silicon dies with 25 mm and 10 mm die spacing were tested under saturated and 15C subcooled conditions. Two types of heat sinks; microporous and micro nned, were tested. Bare silicon die In Novec-649, under 15 C subcooled pool conditions, the spacing between the dies did not a ect the results as opposed to the saturated pool condition where there is slight degra- dation in the board with 10 mm die spacing at high heat ux. In HFE-7100, the board with 25 mm die spacing performs better than the board with 10 mm die spacing in both saturated and 15 C subcooled pool conditions. These di erences, however, are minor and should allow microprocessor die to be spaced within 10 mm of each other without concern, thereby reduc- ing interconnect signal delays. Heat dissipation rates of 350 W and 340 W were measured in Novec-649 and HFE-7100, respectively, at surface temperatures that ensured safe operation well below the critical heat ux for the test board with 10 mm die spacings under subcooled conditions. These results for bare die provided baseline data that are useful in initial liquid cooling implementation scheme for COTS die. The uid of choice is Novec-649 since it has low GWP and results in lower die surface temperatures for the range of variables tested. 69 Enhanced heat sinks Usage of enhanced surface heat sinks indium-attached to the bare die yielded improved results. Higher heat dissipation levels were made possible at lower die surface temperatures. The improvement in surface temperature at a heat ux of 10 W=cm2 was about 15 C which is a signi cant change. The highest heat dissipation recorded was 470 W in Novec-649 under subcooled conditions with a microporous heat sink. This value is above heat ux levels in the current generation of microprocessors. This excellent thermal performance is made possible because of the large number of nucleation sites present on the sintered microporous and micro nned surface. Moreover, the small feature size of the nucleation sites, means vapor bubbles are departing at very low values of departure diameter. This situation, a large number of small vapor bubbles, is an extremely desirable situation, resulting in breakdown of the thermal boundary layer while still allowing for surface rewetting by cooler uid. Contaminated uid tests Intentionally contaminating uids with dioctyl phthalate at levels an order of magnitude above worst-case scenarios led to a reduction in thermal performance when used with the microporous heat sinked surface. The superheat required to dissipate 10 W=cm2 was found to be 10 C higher than with clean uid. Merely suspending porous containers of activated charcoal overnight did not succeed in any substantial contaminant removal. Such a high level of contaminant is not expected in any actual practical scenario. Under severely contaminated circumstances, the use of the micro nned surface is recommended since its surface structure features much larger nucleation sites which will better resist contamination. Recommendations for future research The wide range of data obtained can be used to develop a practical two-phase immersion cooled system for data centers with reduced environmental impact. 70 An attempt was made in this current work to study the thermal performance from a microporous surface by orienting the multi-chip module horizontally. Figure 5.1 was a high speed image obtained at a very low heat ux, in Novec-649, for the test board with die spaced 10 mm apart, augmented with a microporous heat sink. This fundamental research can be continued in nding the bubble departure diameters from di erent surfaces which can serve as inputs for numerical modeling for phase change heat transfer. The current research Figure 5.1: High speed image to study the bubble nucleation characteristics on a test board oriented horizontally focused on studying the thermal performance of a single multi-chip module (processor). It can extended to several processors to simulate a server rack. Flow boiling can be introduced and building a e cient heat exchanger inside the tank can improve the thermal performance. 71 References [1] Shiro Nukiyama. The maximum and minimum values of the heat q transmitted from metal to boiling water under atmospheric pressure. International Journal of Heat and Mass Transfer, 9(12):1419{1433, 1966. [2] Thomas B Drew and Alfred C Mueller. Boiling. Trans. AIChE, 33:449, 1937. [3] Van P Carey. Liquid-vapor phase-change phenomena. 1992. [4] CarnotJET. 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American Society of Mechanical Engineers, 2012. [26] Alex Kampl. Bitcoin 2-phase immersion cooling. www.electronics-cooling.com, pages:24- 28, March 2014. [27] Alexander L Kelly. Material compatibility for passive two-phase immersion cooling applications. Master?s thesis, Auburn University, 2014. [28] Aravind Sridhar. Experimental evaluation of immersion-cooled strategies for high- powered server modules. Master?s thesis, Auburn University, 2012. 74 [29] Thomas G Beckwith, Roy D Marangoni, and John H Lienhard. Mechanical measure- ments. Pearson Prentice Hall, 2007. 75 Appendices 76 Appendix A CALIBRATION Temperature sensing diodes on the die were calibrated against a NIST-traceable ther- mistor ( 0:01 C) in a constant temperature calibration oven as explained in Chapter 3. The diodes were excited by providing an excitation current of 2.2 mA from a sourcemeter. Voltage values across the temperature sensing diodes were recorded using LabVIEW VI. The temperature of the calibration oven was increased from room temperature to a maximum of 95 C in steps of 8 C. Resistance values of the thermistor was recorded using a multimeter for every temperature point. A linear relationship between thermistor resistance and diode voltage was developed using a MATLAB program to convert recorded voltage to die surface temperature. Calibration curves were developed for each test board. Each test board has 24 diodes with 6 diodes on each die. A set of curves for each die on the test board with bare silicon die spaced 10mm apart is shown in Figure A.1, A.2, A.3 and A.4. Similar sets of curves were obtained for all test boards. 77 Figure A.1: A set of curves for test board with bare silicon die spaced 10mm apart (top left die) 78 Figure A.2: A set of curves for test board with bare silicon die spaced 10mm apart (bottom left die) 79 Figure A.3: A set of curves for test board with bare silicon die spaced 10mm apart (top right die) 80 Figure A.4: A set of curves for test board with bare silicon die spaced 10mm apart (bottom right die) 81 Appendix B LABVIEW-VIRTUAL INSTRUMENTS(VI) Labview VI was programmed to record the die surface temperature, power supplied to the die and pool temperature. Data acquisition system (DAS) cards and modules were purchased from National Instruments (NI). DAS modules NI 9205, NI 9227, and NI 9213 were used in the experimental facility for measuring the die surface temperature, current supplied and pool temperature respectively. The measurement capability of the DAS modules are listed in Table B.1. A typical labview VI window consist of two panels; front panel and block diagram. The VI was programmed using the di erent tools in the block diagram feature. A sample block diagram programmed for calibrating the diodes is shown in Figure B.1. The front panel was used to display the readings. Front panel displaying 24 indicators for surface temperature measurement and other variables is shown in Figure B.2. Table B.1: DAS modules used in the experimental facility DAS Modules Description NI 9205 Measuring voltage, Capability: 10 to+ 10 V, Number of channels: 24 NI 9227 Measuring current, Capability: 0 5 A, Number of channels: 4 NI 9213 Measuring temperature, Sensitivity upto 0.02 C Number of channels: 16 82 Figure B.1: Sample block diagram programmed for calibrating the diodes 83 Figure B.2: Front panel displaying the temperature indicators in C and a chart for moni- toring the surface temperature 84 Appendix C SINTERED MICROPOROUS SURFACES The patented 3M Microporous Metallic Boiling Enhancement Coating (MMBEC) was developed to provide optimal boiling heat transfer coe cients with 3M Novec Engineered Fluids. 3M MMBEC is made with 3M developmental material L-20227. This powder is com- posed of sub-20 m copper particles coated with 0:5wt% silver. L-20227 particles are applied to a copper substrate in a layer about 150 m thick and then fused at elevated temperature, typically 850 C in the absence of oxygen. The silver di uses into the copper, temporarily forming a eutectic that melts and re-solidi es, before cooling, as di usion progresses. This method provides: 1. High thermal conductivity ligament between particles 2. Ligaments present at all particle contact points 3. Pores size provides optimal nucleation sites for Novec uids 4. Coating properties relatively insensitive to processing conditions Below are directions for the standard 3M technique for applying and fusing L-20227 powder. Other techniques are allowed and may be preferred depending on the equipment available. Application L-20227 particles are mixed with Dow 704 silicone di usion pump oil to achieve a mix- ture that is 13% oil by weight. This mixture is applied to a at copper substrate using standard screen printing techniques and a Sefar 45-180 mesh polyester screen (45-180 W IM E11F 0.5 30d STD) with the desired pattern. The resultant coating contains 0.052 g=cm2 L20227 particles. 85 Particles may be applied dry (for example by knife coating) or using any volatile binder that will be removed in and compatible with the fusing process. Fusing Fusing is done at 0.01 milliTorr in a vacuum furnace. Temperature is raised to 300 C and paused for 20 minutes to remove the oil. Temperature is then raised to 850 C and held for 1 hour. Inert atmospheres may be used in place of or in addition to vacuum to control oxygen levels. Ramp rates and equilibrium times were dictated by oven capabilities and temperature uniformity. Higher ramp rates and shorter equilibrium times may be possible if equipment allows. Resultant coating thickness should be approximately 150 m. A minimum thickness of 100 m is required to achieve optimal performance. Heat transfer coe cients will drop precipitously as the thickness is reduced below this level. Thicknesses up to 300 m will perform well. 86 Appendix D DATA REDUCTION PROCEDURE Data generated in LabVIEW was converted into a readable .TXT le using a software FileRenamer. The raw data generated is shown in Table D.1. The data points shown here are obtained using the test board augmented with micro nned heat sinks with die spaced 25mm apart. The experiment was conducted using Novec-649 at saturated pool conditions. Remember, the saturation temperature for Novec-649 is 49 C. Data shown here are recorded during the increasing run of a data cycle. The curve ts obtained from calibration were used in a MATLAB program to generate T values from voltage values as shown in Table D.2. Voltage supplied across the die was measured using a multimeter. The measured voltage value ( V) was then manually fed into LabVIEW. Current supplied ( A) to the die was measured using DAS module NI 9227. The heat ux accross the die was calculated using, q" = ( V A)=Area of each die (D.1) where Area of each die is approximately 6 cm2. 87 Table D.1: Raw data generated by LabVIEW voltage 1 voltage 2 voltage 3 voltage 4 voltage 5 voltage 6 Heat ux 3.429 3.426 3.424 3.418 3.410 3.404 0.064 3.420 3.416 3.414 3.409 3.400 3.395 0.265 3.411 3.406 3.406 3.398 3.389 3.383 0.600 3.410 3.406 3.405 3.397 3.386 3.379 1.072 3.408 3.406 3.403 3.396 3.384 3.376 1.680 3.406 3.403 3.400 3.394 3.383 3.377 2.423 3.402 3.401 3.397 3.391 3.380 3.374 3.303 3.399 3.397 3.393 3.387 3.376 3.370 4.321 3.394 3.393 3.388 3.382 3.372 3.366 5.478 3.389 3.388 3.381 3.376 3.367 3.360 6.774 3.384 3.384 3.376 3.371 3.361 3.355 8.206 3.378 3.379 3.369 3.365 3.354 3.348 9.779 3.368 3.370 3.358 3.354 3.343 3.337 12.082 3.351 3.353 3.339 3.335 3.324 3.318 14.641 3.341 3.347 3.333 3.332 3.325 3.322 17.469 Table D.2: Processed data using MATLAB Temp 1 Temp 2 Temp 3 Temp 4 Temp 5 Temp 6 Heat ux 2.890 2.739 3.019 2.806 2.865 2.755 0.064 3.957 3.873 4.196 3.871 3.996 3.834 0.265 5.007 5.019 5.205 5.175 5.278 5.157 0.600 5.076 5.083 5.323 5.333 5.574 5.627 1.072 5.246 5.031 5.470 5.394 5.846 5.945 1.680 5.507 5.259 5.772 5.566 5.855 5.748 2.423 5.360 5.079 5.639 5.417 5.736 5.617 3.303 5.816 5.534 6.166 5.922 6.198 6.086 4.321 6.487 6.118 6.874 6.612 6.831 6.728 5.478 7.100 6.656 7.581 7.271 7.441 7.354 6.774 7.729 7.262 8.322 7.984 8.170 8.106 8.206 8.358 7.797 9.017 8.611 8.866 8.772 9.779 9.013 8.313 9.769 9.333 9.669 9.557 12.082 9.802 9.010 10.780 10.332 10.574 10.513 14.641 12.193 10.893 12.653 11.846 11.753 11.291 17.469 88 Appendix E MATLAB program for data reduction MATLAB code (shortened version) for nding the wall superheat T on the bottom left die. This program is speci c for test board augmented with micro nned heat sinks where die are spaced 25mm apart. clc clear all close k=1; %file counter max file num=15; %max data file number for i=1:max file num index=num2str(i); file type='.txt'; filename=strcat(index,file type); fileID=fopen(filename); data=textscan(fileID,'%f %f %f %f %f %f %f %f %f %f %f %f %f %f %f %f %f %f %f %f %f %f %f %f %f %f %f %f','CollectOutput',1); fclose(fileID); data=cell2mat(data); a = size(data); d = 24; % Number of diodes d for j = 1: d if j==15 z(j,:)=.01; j=j+1; else 89 n = 1; for i = 1:a(1) if data(i,j)>3 z(j,n)= data (i,j); n = n+1; end end end end [row,col]=find(z==0); x = min(col) - 1; z = z(:,1:x); numrow=size(z,1); for m=1:numrow avg = mean(z(m, :)); avgdata(m,1)=avg; end avg I = mean(data(:,25)); avg V = mean(data(:,28)); q flux = (avg I * avg V)/6; T sat = mean(data(:,27)); T7 = -114.8733*avgdata(7,1)+444.7544-T sat; T8 = -114.5276*avgdata(8,1)+443.0726-T sat; T9 = -114.0291*avgdata(9,1)+441.5195-T sat; T10 = -114.9151*avgdata(10,1)+443.6176-T sat; T11 = -114.4349*avgdata(11,1)+441.0459-T sat; T12 = -113.662*avgdata(12,1)+437.6676-T sat; avgdata(m+1,1) = q flux; avgdata(m+2:m+25,1) = [T1 T2 T3 T4 T5 T6 T7 T8 T9 T10 T11 T12 T13 T14 T15 T16 T17 T18 T19 T20 T21 T22 T23 T24]; data out(k,:)=avgdata'; k=k+1; end 90 %commands to write output to the dataout.txt file numrow=size(data out,1); numcol=size(data out,2); fid=fopen('Increasing1101.txt','w'); for k=1:numrow for n=1:numcol fprintf(fid,'%fnt',data out(k,n)); end fprintf(fid,'nn'); end status=fclose(fid); 91 Appendix F UNCERTAINTY ANALYSIS When researchers make a measurement or calculate some quantity from raw data. It is generally assumed that some exact or true value exists based on how the measured (or calculated) variable is de ned. Researchers reporting results usually specify a range of values that this true value is expected to fall within. The most common way to show the range of values is: measurement = best estimate uncertainty (F.1) Beckwith et al. [29] evaluates the uncertainty of function as the summation of discrete uncertainties as given by the following equation. (Uf) = p (Ux1(@f=@x1))2 + (Ux2(@f=@x2))2 +:::::::+ (Uxn(@f=@xn))2 (F.2) where xi is the nominal values of variables, Uxi is discrete uncertainties, Uf is the overall uncertainty of function f resulting from the individual uncertainties , According to the analysis, the equation for the uncertainty in heat ux measurement is expressed as, (Uq"=q") = p (UV=V)2 + (UI=I)2 (F.3) where Uq" is the uncertainty in heat ux, q" is the measured heat ux, UV is the uncer- tainty in voltage measured, UI is the uncertainty in current supplied, and the uncertainty in surface area is ?zero?. The uncertainty data for the power supply, multimeter and DAS modules are obtained from the manufacturer?s users manual. 92 Uncertainty in voltage measured Uncertainty of 3KW American Reliance SPS 150-20-K0E2 DC power supply = 2 mV Uncertainty of multimeter = 3 mV Therefore UV =p22 + 32 = 3:605 mV Uncertainty in current supplied Uncertainty of 3KW American Reliance SPS 150-20-K0E2 DC power supply = 18 mA Uncertainty of DAS module NI 9227 = 15 mA Therefore UA =p182 + 152 = 23:43 mA For the data point-14 from Table D.2, a heat ux value of 14.641 W=cm2, was calculated for a voltage ( V) and current ( A) value of 38.541 V and 2.28 A respectively. The area of the die is 6 cm2. The uncertainty of heat ux at that data point was found out to be, Uq" = q" ( p (0:0036=38:541)2 + (0:0234=2:28)2) = 0:15 W=cm2 (F.4) 93