Browsing by Author "Agrawal, Vishwani"

Now showing items 1-20 of 33

Alternative Timing in Digital Logic

Conover, George (2015-12-14)

For many decades using a system clock has been the go-to method of timing circuits. CPUs in particular have been at least partially defined by the speed of their clock. As technology moves forward, this is proving more and ...

Built-in Self-Test and Calibration of Mixed-signal Devices

Jiang, Wei (2011-05-05)

Wide adoption of deep sub-micron and nanoscale technologies in the modern semiconductor industry is resulted in very large complex mixed-signal devices. It has then become more difficult to estimate and control device ...

Characterizing Processors for Time and Energy Optimization

Goyal, Harshit (2016-08-05)

Energy and performance are important aspects of microprocessors and their verification and management require, measurement, estimation and analysis and these aspects are discussed through this research. A processor executes ...

Controlled Transition Density Based Power Constrained Scan-BIST with Reduced Test Time

Rashid, Farhana (2012-03-08)

Controlling power dissipation in large circuits during test sessions is one of the major concerns in VLSI testing. The reason behind the high power dissipation during test is because unlike normal mode operation of the ...

DC Parametric Test and IDDQ Test Using Advantest T2000 ATE

Ding, Jialin (2015-07-24)

For purpose of improving quality of devices before shipping to customers, VLSI testing methods have been developed to detect defective devices effectively by using automatic test equipment (ATE). To test a chip properly, ...

Design of 3.33GHz CML Processor Datapath

Owahid, Abdullah (2012-04-17)

Almost a decade processor speed has been stuck at operating frequency 2-3GHz due to excessive power consumption of CMOS logic gate at higher frequency whereas predicted speed at present was 10-15GHz. This leads the idea ...

Detection and Mitigation of Electrostatic Pull-in Instability in MEMS Parallel Plate Actuators

Stevens, Colin (2013-07-19)

Electrostatic MEMS actuators are used in a wide variety of applications including micro- machined gyroscopes, high speed mechanical switches, variable capacitors, and vibration isolation devices. MEMS parallel plate ...

Diagnostic Test Generation for Path Delay Faults in a Scan Circuit

Luo, Zeshi (2015-07-24)

With the increase of density, speed and test time of large VLSI circuits, man- ufacturers are eager to nd e cient ways to bring up yields. Often, VLSI testing only tells if a circuit is faulty but is unable to locate ...

Diagnostic Test Generation for Transition Delay Faults Using a Two-Timeframe ATPG Model

Shi, Xiaolu (2015-07-24)

Determining the location and cause of a defect in a faulty circuit plays a vital role in VLSI testing. These are critical factors in boosting product quality and reducing manufacturing costs. An automatic test generation ...

Diagnostic Test Pattern Generation and Fault Simulation for Stuck-at and Transition Faults

Zhang, Yu (2012-03-28)

In VLSI testing we need Automatic Test Pattern Generator (ATPG) to get input test vectors for Circuit Under Test (CUT). Generated test sets are usually compacted to save test time which is not good for failure diagnosis. ...

Digital Testing with Multi-Valued Logic Signals

Li, Baohu (2015-04-27)

The integrated circuit scaling has been following the Moore’s Law since 1965 [59, 60, 61]. Within these decades, researchers made great effort to shrink the transistor feature size and maximize the integration level. ...

Dual-Threshold Voltage Design of Sub-Threshold Circuits

Yao, Jia (2014-06-18)

Threshold voltage of MOSFET technology represents the value of the gate-source voltage when the current in a MOS transistor starts to increase significantly since the conduction layer just begins to appear. However, a ...

DVF4: A Dual Vth Feedback Type 4-Transistor Level Converter

Naishathrala Jayaraman, Karthik (2013-11-01)

Power dissipation in digital circuits has become one of the primary concerns in elec- tronic design. With the increasing usage of portable devices, there are severe restrictions being placed on the size, weight and power ...

An Efficient Transition Detector Exploiting Charge Sharing

Wang, Yu (2014-12-09)

Transition detectors have been widely employed for online error and metastability detection, including in Better-Than-Worst-Case (BTWC) timing design of microprocessors that are designed to allow occasional timing errors. ...

Exploiting Boundary Scan functions of FPGA on ATE

Zeng, Kunpeng (2015-07-21)

With the increase of integration density at chip level, the controllability and observability of defects become complicated, resulting in limited physical probe access to I/O pins. It is impractical to apply test stimulus ...

Finding Optimum Clock Frequencies for Aperiodic Test

Gunasekar, Sindhu (2014-04-29)

With scale down in technology, size and complexity of integrated circuits increase. The scan method is the most popular technique of testing sequential circuits today. In this method, ip- ops functionally form one or ...

High Sensitivity Signatures for Test and Diagnosis of Analog, Mixed-Signal and Radio-Frequency Circuits

Sindia, Suraj (2013-07-18)

The conventional approach, widely practiced in the industry today, for testing analog circuits is to ensure that the circuit conforms to data-sheet limits on all its speciﬁcations. However, such a speciﬁcation based ...

Hybrid Learning of Feedforward Neural Networks for Regression Problems

Wu, Xing (2014-12-12)

Inspired by the structure and functional aspects of the biological neural networks, the Artificial Neural Network (ANN) is a very popular model in the machine learning fields to learn complex relationships in the data. ...

An Improved English to Chinese Translation Search Engine of Technical Text

Zhang, Xiangyu (2017-04-17)

The English to Chinese automatic translators cannot always satisfy the requirement of users especially in technical fields. Through research, the main reason is the wrong translation of technical terminologies. The researchers ...

A Low-Power Analog Bus for On-Chip Digital Communication

Taher, Farah (2013-07-10)

At present, performance and efficiency of a system-on-chip (SoC) design depends significantly on the on-chip global communication across various modules on the chip. On-chip communication is mostly implemented using a bus ...