An efficient methodology for the partitioning of VLSI circuits using genetic algorithm

Abstract

In the recent years, with the explosive growth in the density of VLSI circuits, efficient algorithms and methodologies for circuit partitioning have been established as an important area of computer aided design for VLSI. In this thesis, I explore a novel methodology for the partitioning of VLSI circuits optimizing area, cost and performance according to the user priorities. A data graph representation of a circuit is taken and an optimum crossover point is calculated with the help of graph partitioning algorithms (METIS). This crossover point is used to mutate the individuals in the genetic algorithm to find the individual with maximum fitness. The previous methods available in the literature use random crossover points which sometimes kill competent genes, significantly increasing the time to find an optimum solution. The method proposed in this paper intelligently selects a crossover point considering the circuit given to it and then continues according to the algorithm. This method is demonstrated to be more efficient and faster than the previous approaches.