This Is AuburnElectronic Theses and Dissertations

Design and Calibration of Stress Sensors on 4H-SiC

Date

2022-03-07

Author

Chen, Jun

Type of Degree

PhD Dissertation

Department

Mechanical Engineering

Abstract

Stresses in electronic packages due to thermal and mechanical loadings can cause premature mechanical failures such as fracture of die, severing of connections, die bond failure, solder fatigue, and encapsulant cracking. Therefore, there is a desire to have some type of non-intrusive measurement device compatible with current processing techniques to effectively detect and measure the stresses in electronic packages. Stress sensors integrated on silicon ICs represent a powerful tool for experimental evaluation of die stress distributions, but silicon’s upper temperature range is limited by its relatively low bandgap energy. Stress sensors made with wide bandgap semiconductor such as 4H silicon carbide (4H-SiC) offer the advantage of much higher temperature operation and can be utilized to monitor stresses in high-voltage, high-power SiC devices and have applications in deep well drilling, geothermal plants, and automotive and aerospace systems, to name a few. In this work, the piezoresistive behavior of 4H-SiC material has been studied. The general expressions for the stress dependence of resistors and van der Pauw devices on standard 4H-SiC wafers have been established. Stress sensors were proposed to detect in-plane normal stresses, shear stress and out-of-plane normal stress. The lateral and transverse piezoresistive coefficients of 4H-SiC were calibrated using four-point bending method and the out-of-plane piezoresistive coefficients were measured using the combination of four-point bending method and hydrostatic method. The theory for the stress dependence of NMOS transistors on 4H-SiC was also developed. The stress model for NMOSFETs includes the classic mobility terms plus a new term describing changes in threshold voltage. The longitudinal and transverse piezoresistive coefficients for NMOSFETs were calibrated. It has been found that the developed model agrees well with the measurements. Since the devices are usually fabricated on the tilted 4H-SiC wafer plane, this study also evaluated the impact of the off-axis wafer plane on 4H-SiC and silicon stress sensors. The errors induced by such off-axis wafer were found to be highly dependent on the magnitude of fundamental piezoresistive coefficients and stress distributions on chips. A study on elastic properties of 4H-SiC was conducted and 4H-SiC was confirmed to be a transversely isotropic material. The in-plane elastic modulus and Poisson’s ratio were characterized using the strain gauge method, and the out-of-plane elastic modulus was measured with nanoindentation technique. The experimental results were compared with theoretical predictions made using semiconductor first principal calculations. Finally, the designed piezoresistive stress sensors were used to characterize the stresses on the die surface within an encapsulated package. Finite element simulations were also performed, and correlated well with the experimental results.