Electrical Properties of MOS devices fabricated on 4H Carbon-face SiC

Abstract

Silicon-based devices are still the mainstay of the electronics industry, with applications ranging from small chips in personal computers to large, high power switching devices. However, Si has faced greater and greater challenges for applications at high frequency, high voltage, and in high temperature environments. In order to work under these demanding conditions, silicon-base devices must be used with cumbersome, expensive cooling systems and electrical snubbers that add to circuit complexity for switching applications . Solutions for these problems have been sought for years, and one potential solution is the replacement of Si with a wide band-gap semiconductor materialsuch as silicon carbide (SiC). It has been over 20 years since research groups started to investigate SiC as the candidate to replace silicon. Many advantages of SiC over silicon have been well recognized. Its wide band-gap (3.3eV vs. 1.1eV for silicon) allows SiC to operate at higher temperature. The high thermal conductivity (4.9W/cm-.K vs. 1.5W/cm-K for silicon) can significantly reduce the amount of cooling power required in a system. In addition, SiC has a high electric breakdown field (2.1MV/cm vs. 0.3MV/cm for silicon), which enables SiC to block the same voltage as Si with a 7 times thinner layer, thereby providing a much lower drift resistance for drift layer of similar doping concentration. Moreover, among the wide band gap semiconductors, a unique property of SiC is its native oxide SiO2, which is the same as the native oxide of Si. This implies that the current silicon MOS device technology can be adopted for SiC device fabrication without much effort in the development of new processing methods. Despite all these advantages, the realistic applications of SiC in industry have been hindered by some of its disadvantages. Silicon carbides’s crystal quality is still not as good as that of silicon. Defects like micropipes and dislocations contribute to less than optimum breakdown charaxcteristics of SiC-based devices. More importantly, although the bulk electronic mobility of SiC is comparable to that of silicon (1000cm2/V.S v.s. 1400cm2/V.S), MOSFET inversion channel mobility is much lower – currently 50cm2/V-s compared to 700cm2/V-s. This low channel mobility is caused largely by a high trap density at the 4H-SiC/SiO2 interface. With its advantages and disadvantages, SiC has been widely investigated. Among many polytypes of SiC, 4H-SiC attracts much interest because this poly-type has the largest band-gap energy and a high, almost isotropic bulk mobility. The (000-1) or carbon-terminated face 4H-SiC has been much less studied than the (0001) Si-terminated face. However, the carbon face has a higher oxidation rate (x9 higher), which can significantly reduce the fabrication time for SiC MOS devices. Furthermore, Fukuda et al. reported high inversion channel mobility on the carbon face of 4H-SiC* . Such characteristics would make the carbon face 4H-SiC an ideal candidate of power MOSFETs. In this dissertation, the basic properties of SiC will be discussed in Chapter 1. The physics of MOS devices will be presented in Chapter 2, and the characteristics of SiC-based MOS devices will be discussed in chapter three. The processes and techniques used to fabricate SiC MOS devices will be described in Chapter 4. The results of measurements for MOS capacitors and MOSFETs fabricated on the 4H carbon face will be presented in Chapter 5 to provide an overview of (000-1) characteristics compared to (0001). Both implanted and epitaxial layers are used to build MOSFETs. The oxide layer is grown thermally at 1150oC, followed by post-oxidation annealing to passivate the O-S interface. High-purity Mo is sputtered as the gate metal, and source and drain ohmic contacts for the lateral test MOSFETs are produced by sputtering Ni on heavily implanted regions (nitrogen at 6E19/cm3), followed by an anneal at 850oC for 4min in Ar. Hi-lo capacitance-voltage measurements at both 23oC and 300oC are used to obtain the interface trap density (Dit). Current-voltage measurements at room temperature are used to collect information about oxide leakage and breakdown field (Ebd). A three-probe I-V system is employed to determine Id-Vg characteristics of the MOSFETs at room temperature, and the inversion channel mobility (μ) is extracted from these characteristics. Results are compared for different post-oxidation interface passivation anneals, with the combination of nitric oxide (NO) and H2 giving the lowest trap density (Dit¬) in the upper half of the band gap . Wet-reoxidation plus NO passivation produces the most reliable oxide, but the measured breakdown field of 6MV/cm is still approximately 2MV/cm lower than the average field measured for the silicon face. Compared with the values reported by Fukuda, et al., our low field mobility value is not remarkable. However, the high field mobilities are similar. It was observed that the presence of mobile ions can increase our low field channel mobility significantly. For example, after negative bias stress at 250oC to remove positive mobile ions from the O-S interface, the mobility peak value drops from 65cm2/V-s to 35cm2/V-s. These results suggest that the effective channel mobility for carbon face may not be significantly higher compared to the silicon face.