A Novel Through-Silicon-Via (TSV) Fabrication Method

Abstract

The Through Silicon Via (TSV) is expected to be the future of 3-D chip stacking technology for electronic devices. The structure of the TSV interconnect is developed by first etching deep vias into the surface of a wafer, and later filling those vias with a desired metal. Currently, copper based TSVs are the most cost effective mass producible TSVs. Vias filled with copper provide the interconnect ―through‖ the wafer, once both the top and the bottom of the vias are exposed. This provides a solid robust interconnect isolated and protected by the wafer. It also provides the interconnect using much less volume, while reducing the need for a majority of the packaging associated with modern microelectronic packages. Copper based TSVs were produced in this work using two methods, the ADE method and the blind-via method. The ADE method introduces a unique process that is potentially compatible with post-microelectronic manufacturing. The fabricated TSVs from both methods were cross-sectioned for analysis, which revealed successful formation of solid copper TSVs.