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Compact Modeling of SiGe HBTs Using Verilog-A


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dc.contributor.advisorNiu, Guofu
dc.contributor.advisorWilamowski, Bodganen_US
dc.contributor.advisorRiggs, Lloyden_US
dc.contributor.authorFeng, Zhimingen_US
dc.date.accessioned2008-09-09T21:16:29Z
dc.date.available2008-09-09T21:16:29Z
dc.date.issued2006-08-15en_US
dc.identifier.urihttp://hdl.handle.net/10415/321
dc.description.abstractSiGe HBTs, integrated with CMOS, have demonstrated their usefulness in digital and analog circuit designs for wired and wireless telecommunication applications over the past decade. Of critical importance to successful circuit design is the availability of accurate device compact models and a good understanding of internal device characteristics, especially for analog RFIC designs. A technique that is beginning to be applied in research on device physics and compact modeling based on the Verilog-A hardware language is presented in this thesis. This new Verilog-A based model can be easily modi?ed and implemented into circuit simulators such as Cadence and Agilent ADS without the need to interface with simulators. Moreover, the internal currents, charges, and noise sources are accessible, which is not the case when built-in models are used in circuit simulators. Using the Verilog-A based VBIC model, three applications for SiGe HBT noise modeling and VBIC temperature mapping models are presented. First, a new inverse circuit simulation based low frequency noise extraction method is proposed based on the Verilog-A based VBIC model. The low frequency noise of device biasing at high currents can be measured more accurately through this method. Secondly, in order to better understand the di?erent phase noise upconversion mechanisms involved in the base current 1/f noise and base current short noise in oscillator designs, the internal IBE and the internal ICE were separated from the external IBE and the external ICE using the Verilog-A based VBIC model. Clearly, the noise generating current, IBE, is only a small portion of the terminal IB. In the third application, a group of improved temperature mapping models that can be used to model of DC currents down to 43 K are presented. The new VBIC based model was implemented using Verilog-A, compiled into binary code, and dynamically linked to a circuit simulator through its compact modeling interface. Excellent Gummel and output ?tting across a wide temperature range from 300 K down to 43 K were achieved on a 50 GHz SiGe HBT device. Finally, the intermodulation linearity simulation capability of the VBIC, HICUM and Mextram models were evaluated using harmonic balance in a 200 GHz SiGe HBT technology. The impact of avalanche and selfheating on IIP3 were examined and a weak avalanche shown to have a signi?cant impact on IIP3. These results provide valuable new insights into the device physics underlying linearity behavior and the use of quanti ?ed simulations for data comparison of linearity that will be useful for both designers and modelers.en_US
dc.language.isoen_USen_US
dc.subjectElectrical and Computer Engineeringen_US
dc.titleCompact Modeling of SiGe HBTs Using Verilog-Aen_US
dc.typeThesisen_US
dc.embargo.lengthNO_RESTRICTIONen_US
dc.embargo.statusNOT_EMBARGOEDen_US

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