Digital Reverse Time Chaos and Matched Filter Decoding
Type of DegreeDissertation
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The use of reverse time chaos allows the realization of hardware chaotic systems that can operate at speeds equivalent to existing state of the art while requiring significantly less complex circuitry. Unlike traditional chaotic systems, which require significant analog hardware that is difficult to realize at high speed, the reverse time system can be realized with only a FPGA calculating a digital iterated map that drives a simple series RLC filter. Because the dynamics of this system are determined by an iterated map, both Lorenz-like and Rössler-like dynamics can be implemented without requiring any hardware adjustments. Precise control of this system can also be maintained by adjusting the initial condition of the iterated map. Matched filter decoding is also possible for the reverse time system due to its possession of a closed form solution formed partially by a linear basis pulse. Coefficients have been calculated to realize the matched filter digitally as a FIR filter. Numerical simulations confirm that this correctly implements a matched filter that can be used for detection of the chaotic signal. In addition, the direct form of the FIR filter has been implemented in HDL with demonstrated performance in agreement with numerical results.