Accelerated Life-Cycle Testing of Various Lead-Free Solder Alloys by Mechanical Shock and Thermal Cycling Techniques
Type of DegreePhD Dissertation
Industrial and Systems Engineering
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For the last couple of decades, our inclination towards computer technology has increased broadly. Personal device assistants also known as PDA's have become a part of our daily needs. Hence, the reliability of these handheld electronic devices has become a major concern for the manufacturers as they are subjected to drop, shock and thermal cycling conditions during their day-to-day operation. Board level drop impact testing is one of the most important methods of evaluating the reliability of electronic assemblies. The first phase of this study examines the drop impact performance of no-aged and isothermally aged flip chip packages on laminate assemblies for various doped lead-free solder paste alloys. A potential solution to replace the industrial standard solder paste Sn96.5 Ag3.0 Cu0.5 (SAC305) is carried out. The test vehicle consists of 16 ball grid array packages (BGA) which are 15mm chip array ball grid array's (CABGA208) with perimeter solder balls on 0.8mm pitch. In this experimental study, SAC305 solder spheres and SAC305 solder paste are selected to be the baseline, Solder pastes with 12 different dopants are investigated in comparison with the baseline to determine their reliability. Two sets of printed circuit boards (PCB) are manufactured, the first being no-aged and the second set of boards are isothermally aged at 125C for 6 months prior to testing. The boards are further categorized into 3 different reflow temperatures and 2 different stencil thicknesses, 4 mil and 6 mil respectively. JEDEC BS111 test standard is followed to conduct the drop testing where the half sine impact pulse duration of 0.5ms with peak acceleration at 1500G's is maintained. The boards are subjected to accelerated life testing where the test end state is 300 drops, and the data is collected at an interval of every 20 drops. The results of no-aged and aged samples are categorized and compared using data analytics and Weibull analysis. Failure analysis is carried out to determine best solder paste, solder ball, reflow temperature profile and stencil size. In the second phase of the study, the reliability performance of various electronic assemblies during thermal cycling testing are investigated. Best performed doped low creep lead free solder alloys designed for high-temperature reliability from phase 1 testing are used. The test boards are 0.200” thick power computing printed circuit boards with MEGTRON6 substrate material and OSP coating. Single-sided assemblies are built separately for the Top-side and Bottom-side of the boards. JEDEC JESD22-A104-B test standard is followed; the test boards are subjected for thermal cycling between the temperatures -400C and +1250C respectively, 120-minute cycle profile with 45-minute transitions and 15-minute dwells at peak temperatures is maintained. The test assemblies include surface mount resistors, 5mm, 6mm, 13mm, 15mm, 17mm, 31mm, 35mm and 45mm ball grid array packages respectively. The failure data of the test assemblies are used in this study to understand the effect of solder paste composition on the solder joint reliability during thermal cycling testing.