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dc.contributor.advisorDai, Fa
dc.contributor.authorWang, Hechen
dc.date.accessioned2018-04-17T18:21:35Z
dc.date.available2018-04-17T18:21:35Z
dc.date.issued2018-04-17
dc.identifier.urihttp://hdl.handle.net/10415/6107
dc.description.abstractThis work explores time to digital conversion techniques, designs and applications for time domain signal processing. Though the time-to-digital conversion devices and integrated circuits (IC) have been invented for decades, recent designs have been revolutionized with the advancements in deep sub-micron CMOS processes. Many of the performance limitations highlighted in early literature, such as the transition speed and power consumption of the transistors, no longer apply to designs in modern IC processes. Two time-to-digital converter (TDC) designs with spiral comparator arrangement, ΔΣ modulations (SDMs) and ring structure are proposed in this dissertation to offer pico-second (ps) level temporal resolution with wide detectable range, ultra linear transfer function and low power consumption. With the aid of high performance TDCs, an all-digital phase-locked-loop (ADPLL) with automatic TDC linearization is presented to prove the fading gap between digital PLL and analog PLL. The proposed ADPLL achieves an in-band phase noise of -107 dBc/Hz and a highest close in fractional spur level of -55 dBc. Owing to pico-second and even sub-pico-second time interval detectability, TDCs pave the ways for the time domain signal processing towards many different potential research directions. Two communication system related time domain signal processing applications: TDC based digital super-regenerative bidirectional IoT node and hybrid time assist data convertor for direct radio frequency (RF) polar receiver system, are included in this work.en_US
dc.rightsEMBARGO_GLOBALen_US
dc.subjectElectrical and Computer Engineeringen_US
dc.titleIntegrated Circuit for Time Domain Mixed Signal Processingen_US
dc.typePhD Dissertationen_US
dc.embargo.lengthen_US
dc.embargo.lengthMONTHS_WITHHELD:60en_US
dc.embargo.statusEMBARGOEDen_US
dc.embargo.enddate2023-04-17en_US
dc.contributor.committeeWilamowski, Bogdan
dc.contributor.committeeNiu, Guofu
dc.contributor.committeeHamilton, Michael
dc.creator.orcidhttps://orcid.org/0000-0001-8437-7726en_US


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