A Parallel Implementation of Fault Simulation on a Cluster of Workstations
Type of DegreeThesis
Electrical and Computer Engineering
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Parallel simulation on a cluster workstations is one method by which fault simulation time for large circuits can be reduced significantly. To get near-linear speedups from parallel processing, parallelization methods should result in an even computational load distribution among processors in a cluster workstations. Fault simulation can be parallelized by partitioning fault list, the test vector or both. In the thesis, parallel fault simulation algorithm called PAUSIM has been developed. This algorithm consists of logic simulation and two steps of fault simulation for sequential logic circuits. Compared to the other algorithms, PAUSIM-CY avoids redundant work by a judicious task decomposition. Also, it adopts a cyclic fault partitioning method based on the LOG partitioning and local redistribution, resulting in a well-balanced load distribution. The parallel implementations were done using the MPI library on a cluster of workstations. The results show a significant speed-up by PAUSIM-CY over other existing parallel algorithms.