Characterization of Thermally Induced Stress in IC Packages using Piezoresistive Sensors

Abstract

This thesis presents the characterization of thermally induced stress in IC packages using CMOS sensor circuits. In various applications, the IC packages are exposed to extreme environments. The knowledge of the thermally induced stress in the packages aids the prediction of degradation/failure of the device and calibration of the devices for such environments. Change in resistance is caused by the mismatch in coefficients of thermal resistance for different materials. These circuits are highly sensitive to stress and provide well localized stress measurements than the traditional resistor rosettes and also provide direct current outputs. The sensors are oriented in such a way that the effects of certain stress components are isolated. These sensors are also temperature compensated so that only the effect of stress components is counted. The experiments in this work are conducted in the temperature range of -180 C to 80 C.

Piezoresistive coefficients for p material that can be used for obtaining the normal stress components are extracted by using a four point bending fixture. The die is attached to the beam and a force is applied using the bending fixture at different temperatures. The stress components obtained from the simulations along with output from the PMOS sensor cells are used to extract the piezoresistive coefficients. The range of coefficient values are also confirmed by using a number of samples.

Thermally induced shear stress components in the packages are obtained by using NMOS sensor cells. The packages are cycled through the temperature range and at each temperature, the current from the sensor cells are measured. The current readings along with the piezoresistive coefficients for the n material is used to extract the shear stress component in the package. Finite element analysis using temperature dependent material properties was also done for the comparison of the results.