RF Linearity Analysis In Nano Scale CMOS Using Harmonic Balance Device Simulations
Metadata Field | Value | Language |
---|---|---|
dc.contributor.advisor | Niu, Guofu | |
dc.contributor.advisor | Singh, Adit | en_US |
dc.contributor.advisor | Dai, Fa Foster | en_US |
dc.contributor.author | Kopalle, Deepika | en_US |
dc.date.accessioned | 2008-09-09T21:17:47Z | |
dc.date.available | 2008-09-09T21:17:47Z | |
dc.date.issued | 2005-12-15 | en_US |
dc.identifier.uri | http://hdl.handle.net/10415/427 | |
dc.description.abstract | In this thesis, Intermodulation Linearity characteristics of CMOS have been analyzed using power series and Harmonic Balance(HB) Method. Harmonic Bal- ance method is a frequency domain steady state analysis method used for solving nonlinear circuits. This method is extended to semiconductor device simulation using Taurus-Device tool. Third order Input Intermodulation Product (IIP3), a measure for linearity is characterized as a function of channel length, oxide thick- ness, drain and gate voltages using 130nm, 100nm and 90nm MOS devices. The effect of Polysilicon gate depletion on linearity is studied and analyzed for dif- ferent doping concentrations. Further, the simulated IIP3 values obtained from Harmonic Balance method are compared to the theoretical values calculated using power series. | en_US |
dc.language.iso | en_US | en_US |
dc.subject | Electrical and Computer Engineering | en_US |
dc.title | RF Linearity Analysis In Nano Scale CMOS Using Harmonic Balance Device Simulations | en_US |
dc.type | Thesis | en_US |
dc.embargo.length | NO_RESTRICTION | en_US |
dc.embargo.status | NOT_EMBARGOED | en_US |